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/Linux-v4.19/arch/c6x/lib/
Dcsum_64plus.S36 AND .S1 3,A4,A1
38 OR .L2X B0,A1,B0 ; non aligned condition
41 || MV .D1X B5,A1 ; words condition
42 [!A1] B .S1 L8
59 ZERO .D1 A1
63 [!A1] BNOP .S1 L8,5
300 || ZERO .D1 A1
304 || [A0] LDBU .D1T1 *A4++,A1
309 || SHL .S1 A0,8,A1
321 || ADD .L1 A0,A1,A1
[all …]
Ddivi.S22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
25 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
41 || cmpgt .l1 0, A4, A1
44 [A1] neg .l1 A4, A4
46 || xor .s1x A1, B1, A1
47 [A1] addkpc .s2 _divu_ret, B3, 4
Dmemcpy_64plus.S17 || AND .S1 0x2,A6,A1
23 [A1] LDB .D2T1 *B4++,A7
24 [A1] LDB .D2T1 *B4++,A8
31 [A1] STB .D1T1 A7,*A3++
32 [A1] STB .D1T1 A8,*A3++
Dremi.S22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
25 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
41 || cmpgt .l1 0, A4, A1
46 [A1] neg .l1 A4, A4
48 || xor .s2x B2, A1, B0
Dllshl.S24 mv .l1x B4,A1
25 [!A1] b .s2 B3 ; just return if zero shift
27 sub .d1 A0,A1,A0
31 || [A2] shl .s1 A5,A1,A5
35 [A2] shl .s1 A4,A1,A4
Dllshr.S24 mv .l1x B4,A1
25 [!A1] b .s2 B3 ; return if zero shift count
27 sub .d1 A0,A1,A0
32 || [A2] shru .s1 A4,A1,A4
36 [A2] shr .s1 A5,A1,A5
Dllshru.S24 mv .l1x B4,A1
25 [!A1] b .s2 B3 ; return if zero shift count
27 sub .d1 A0,A1,A0
32 || [A2] shru .s1 A4,A1,A4
36 [A2] shru .s1 A5,A1,A5
Dremu.S22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
25 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
51 cmpltu .l1x A4, B4, A1
52 [!A1] sub .l1x A4, B4, A4
Ddivu.S22 ;; __c6xabi_divi A0,A1,A2,A4,A6,B0,B1,B2,B4,B5
23 ;; __c6xabi_divu A0,A1,A2,A4,A6,B0,B1,B2,B4
24 ;; __c6xabi_remi A1,A2,A4,A5,A6,B0,B1,B2,B4
25 ;; __c6xabi_remu A1,A4,A5,A7,B0,B1,B2,B4
90 || mvk .s1 32, A1
91 sub .l1 A1, A6, A6
Ddivremi.S23 || cmpgt .l1 0, A4, A1
28 [A1] neg .l1 A4, A4
30 || xor .s2x B2, A1, B0
Dstrasgi.S27 ldw .d2t1 *B4++, A1
41 || mv .s2x A1, B5
48 [B0] ldw .d2t1 *B4++, A1
78 [B0] stw .d1t1 A1, *A4++
Dmpyll.S40 mpy32u .m1x A4,B4,A1:A0 ; X0*Y0
48 add .s1 A1,A5,A5
/Linux-v4.19/tools/testing/selftests/ftrace/test.d/kprobe/
Dprobepoint.tc14 A1=`dec_addr $1`
18 PREV=`expr $A1 - $A2` # offset to previous symbol
25 set_offs `grep -A1 -B1 ${TARGET_FUNC} /proc/kallsyms | cut -f 1 -d " " | xargs`
/Linux-v4.19/scripts/kconfig/tests/auto_submenu/
DKconfig19 config A1 config
20 bool "A1"
28 depends on A1
Dexpected_stdout4 A1 (A1) [Y/n/?] (NEW)
/Linux-v4.19/arch/mips/mm/
Dpage.c43 #define A1 5 macro
370 uasm_i_ld(buf, reg, off, A1); in build_copy_load()
372 uasm_i_lw(buf, reg, off, A1); in build_copy_load()
391 _uasm_i_pref(buf, pref_src_mode, pref_bias_copy_load + off, A1); in build_copy_load_pref()
492 pg_addiu(&buf, A1, A1, 2 * off); in build_copy_page()
537 pg_addiu(&buf, A1, A1, 2 * off); in build_copy_page()
575 pg_addiu(&buf, A1, A1, 2 * off); in build_copy_page()
/Linux-v4.19/Documentation/device-mapper/
Ddm-raid.txt98 A1 A1 A1 A1 A2 A1 A1 A2 A2
112 A1 A2 A1 A2 A3 A1 A2 A3 A4
116 A2 A1 A3 A1 A2 A2 A1 A4 A3
125 A1 A2 A1 A2 A3 A1 A2 A3 A4
126 A2 A1 A3 A1 A2 A2 A1 A4 A3
/Linux-v4.19/arch/arm/boot/dts/
Darmada-388-clearfog-pro.dts3 * Device Tree file for SolidRun Clearfog Pro revision A1 rev 2.0 (88F6828)
10 model = "SolidRun Clearfog Pro A1";
Darmada-388-clearfog-base.dts3 * Device Tree file for SolidRun Clearfog Base revision A1 rev 2.0 (88F6828)
12 model = "SolidRun Clearfog Base A1";
/Linux-v4.19/arch/m68k/fpsp040/
Dsatan.S317 |--U + A1*U*V*(A2 + V*(A3 + V)), V = U*U
319 |--THE NATURAL FORM IS U + U*V*(A1 + V*(A2 + V*A3))
320 |--WHAT WE HAVE HERE IS MERELY A1 = A3, A2 = A1/A3, A3 = A2/A3.
322 |--PARTS A1*U*V AND (A2 + ... STUFF) MORE LOAD-BALANCED
332 fmuld ATANA1,%fp1 | ...A1*U*V
333 fmulx %fp2,%fp1 | ...A1*U*V*(A2+V*(A3+V))
/Linux-v4.19/arch/c6x/kernel/
Dentry.S94 || STDW .D1T1 A1:A0,*A15--[1]
151 LDDW .D1T1 *++A15[1],A1:A0
258 MVKL .S1 schedule,A1
259 MVKH .S1 schedule,A1
260 B .S2X A1
313 MVK .S1 _TIF_WORK_MASK,A1
316 AND .D1 A1,A2,A0
Dswitch_to.S53 || LDDW .D1T1 *+A5(THREAD_RICL_ICL),A1:A0
71 || MV .L2X A1,B1
/Linux-v4.19/Documentation/devicetree/bindings/pwm/
Drenesas,tpu-pwm.txt7 - "renesas,tpu-r8a7740": for R8A7740 (R-Mobile A1) compatible PWM controller.
23 Example: R8A7740 (R-Mobile A1) TPU controller node
/Linux-v4.19/Documentation/devicetree/bindings/clock/
Drenesas,rz-cpg-clocks.txt1 * Renesas RZ/A1 Clock Pulse Generator (CPG)
3 The CPG generates core clocks for the RZ/A1 SoCs. It includes the PLL, variable
/Linux-v4.19/arch/h8300/lib/
Dudivsi3.S13 divxu.w A1,A2P
15 divxu.w A1,A0P

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