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Searched refs:MASK (Results 1 – 25 of 98) sorted by relevance

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/Linux-v4.19/include/linux/soc/ti/
Dknav_dma.h25 #define MASK(x) (BIT(x) - 1) macro
26 #define KNAV_DMA_DESC_PKT_LEN_MASK MASK(22)
30 #define KNAV_DMA_DESC_TAG_MASK MASK(8)
38 #define KNAV_DMA_DESC_PSLEN_MASK MASK(6)
40 #define KNAV_DMA_DESC_ERR_FLAG_MASK MASK(4)
42 #define KNAV_DMA_DESC_PSFLAG_MASK MASK(4)
44 #define KNAV_DMA_DESC_RETQ_MASK MASK(14)
45 #define KNAV_DMA_DESC_BUF_LEN_MASK MASK(22)
46 #define KNAV_DMA_DESC_EFLAGS_MASK MASK(4)
/Linux-v4.19/arch/x86/kernel/cpu/mcheck/
Dmce-severity.c60 #define MASK(x, y) .mask = x, .result = y macro
98 NOSER, MASK(MCI_STATUS_UC|MCI_STATUS_DEFERRED|MCI_STATUS_POISON, MCI_STATUS_DEFERRED)
114 SER, MASK(MCI_STATUS_OVER|MCI_UC_AR|MCACOD_SCRUBMSK, MCI_STATUS_UC|MCACOD_SCRUB)
118 SER, MASK(MCI_STATUS_OVER|MCI_UC_AR|MCACOD, MCI_STATUS_UC|MCACOD_L3WB)
124 SER, MASK(MCI_UC_SAR, MCI_STATUS_UC)
129 MASK(MCI_STATUS_OVER|MCI_UC_SAR, MCI_STATUS_UC|MCI_STATUS_AR)
145 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR, MCI_UC_SAR|MCI_ADDR),
150 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
155 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_DATA),
160 SER, MASK(MCI_STATUS_OVER|MCI_UC_SAR|MCI_ADDR|MCACOD, MCI_UC_SAR|MCI_ADDR|MCACOD_INSTR),
[all …]
/Linux-v4.19/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dgk20a.h30 #define MASK(w) ((1 << (w)) - 1) macro
49 (MASK(GPCPLL_CFG3_VCO_CTRL_WIDTH) << GPCPLL_CFG3_VCO_CTRL_SHIFT)
59 (MASK(GPCPLL_COEFF_N_WIDTH) << GPCPLL_COEFF_N_SHIFT)
87 #define GPC2CLK_OUT_VCODIV_MASK (MASK(GPC2CLK_OUT_VCODIV_WIDTH) << \
92 #define GPC2CLK_OUT_INIT_MASK ((MASK(GPC2CLK_OUT_SDIV14_INDIV4_WIDTH) << \
94 | (MASK(GPC2CLK_OUT_VCODIV_WIDTH) << GPC2CLK_OUT_VCODIV_SHIFT)\
95 | (MASK(GPC2CLK_OUT_BYPDIV_WIDTH) << GPC2CLK_OUT_BYPDIV_SHIFT))
Dgm20b.c41 (MASK(GPCPLL_CFG2_SDM_DIN_WIDTH) << GPCPLL_CFG2_SDM_DIN_SHIFT)
45 (MASK(GPCPLL_CFG2_SDM_DIN_NEW_WIDTH) << GPCPLL_CFG2_SDM_DIN_NEW_SHIFT)
53 (MASK(GPCPLL_DVFS0_DFS_COEFF_WIDTH) << GPCPLL_DVFS0_DFS_COEFF_SHIFT)
57 (MASK(GPCPLL_DVFS0_DFS_DET_MAX_WIDTH) << GPCPLL_DVFS0_DFS_DET_MAX_SHIFT)
169 MASK(GPCPLL_CFG2_SDM_DIN_WIDTH); in gm20b_pllg_read_mnp()
201 dvfs->dfs_coeff = min_t(u32, coeff, MASK(GPCPLL_DVFS0_DFS_COEFF_WIDTH)); in gm20b_dvfs_calc_det_coeff()
254 rem = ((u32)n) & MASK(DFS_DET_RANGE); in gm20b_dvfs_calc_ndiv()
259 *sdm_din = (rem >> BITS_PER_BYTE) & MASK(GPCPLL_CFG2_SDM_DIN_WIDTH); in gm20b_dvfs_calc_ndiv()
536 nvkm_mask(device, GPC_BCAST_GPCPLL_DVFS2, MASK(DFS_DET_RANGE + 1), in gm20b_dvfs_program_ext_cal()
788 data &= MASK(GPCPLL_CFG3_PLL_DFS_TESTOUT_WIDTH); in gm20b_clk_init_dvfs()
[all …]
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/gpio/
Dhw_gpio.c45 REG_GET(MASK_reg, MASK, &gpio->store.mask); in store_registers()
54 REG_UPDATE(MASK_reg, MASK, gpio->store.mask); in restore_registers()
152 REG_UPDATE(MASK_reg, MASK, 1); in dal_hw_gpio_config_mode()
158 REG_UPDATE(MASK_reg, MASK, 1); in dal_hw_gpio_config_mode()
164 REG_UPDATE(MASK_reg, MASK, 1); in dal_hw_gpio_config_mode()
168 REG_UPDATE(MASK_reg, MASK, 0); in dal_hw_gpio_config_mode()
172 REG_UPDATE(MASK_reg, MASK, 0); in dal_hw_gpio_config_mode()
Dddc_regs.h41 DDC_GPIO_REG_LIST_ENTRY(MASK,cd,id),\
58 DDC_GPIO_VGA_REG_LIST_ENTRY(MASK,cd),\
75 DDC_GPIO_I2C_REG_LIST_ENTRY(MASK,cd),\
/Linux-v4.19/tools/testing/selftests/bpf/
Dtest_pkt_md_access.c16 #define TEST_FIELD(TYPE, FIELD, MASK) \ argument
19 if (tmp != ((*(volatile __u32 *)&skb->FIELD) & MASK)) \
24 #define TEST_FIELD(TYPE, FIELD, MASK) \ argument
28 if (tmp != ((*(volatile __u32 *)&skb->FIELD) & MASK)) \
/Linux-v4.19/drivers/scsi/sym53c8xx_2/
Dsym_fw2.h241 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
329 SCR_INT ^ IFTRUE (MASK (HX_DMAP_DIRTY, HX_DMAP_DIRTY)),
361 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
451 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
475 SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
534 SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),
694 SCR_JUMP ^ IFFALSE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
911 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
917 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
1086 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
[all …]
Dsym_fw1.h249 SCR_INT ^ IFTRUE (MASK (SEM, SEM)),
376 SCR_JUMPR ^ IFFALSE (MASK (HF_HINT_IARB, HF_HINT_IARB)),
466 SCR_JUMPR ^ IFTRUE (MASK (IRST, IRST)),
491 SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
551 SCR_JUMP ^ IFTRUE (MASK (WSS, WSS)),
717 SCR_JUMP ^ IFFALSE (MASK (0 ,(HF_SENSE|HF_EXT_ERR))),
962 SCR_JUMP ^ IFTRUE (MASK (0x80, 0xbf)),
968 SCR_INT ^ IFFALSE (MASK (0x80, 0x80)),
1200 SCR_JUMP ^ IFFALSE (MASK (HF_DATA_IN, HF_DATA_IN)),
1220 SCR_JUMP ^ IFTRUE (MASK (HF_DATA_IN, HF_DATA_IN)),
[all …]
/Linux-v4.19/include/linux/irqchip/
Darm-gic-v3.h157 GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK)
159 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK)
184 GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK)
186 GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK)
242 GIC_BASER_CACHEABILITY(GICR_VPROPBASER, INNER, MASK)
244 GIC_BASER_CACHEABILITY(GICR_VPROPBASER, OUTER, MASK)
268 GIC_BASER_CACHEABILITY(GICR_VPENDBASER, INNER, MASK)
270 GIC_BASER_CACHEABILITY(GICR_VPENDBASER, OUTER, MASK)
343 GIC_BASER_CACHEABILITY(GITS_CBASER, INNER, MASK)
345 GIC_BASER_CACHEABILITY(GITS_CBASER, OUTER, MASK)
[all …]
/Linux-v4.19/drivers/gpu/drm/hisilicon/kirin/
Dkirin_ade_reg.h17 #define MASK(x) (BIT(x) - 1) macro
21 #define FRM_END_START_MASK MASK(2)
54 #define CH_OVLY_SEL_MASK MASK(2)
103 #define QOSGENERATOR_MODE_MASK MASK(2)
/Linux-v4.19/net/openvswitch/
Ddatapath.h253 #define OVS_MASKED(OLD, KEY, MASK) ((KEY) | ((OLD) & ~(MASK))) argument
254 #define OVS_SET_MASKED(OLD, KEY, MASK) ((OLD) = OVS_MASKED(OLD, KEY, MASK)) argument
/Linux-v4.19/drivers/scsi/
Dvmw_pvscsi.h33 #define MASK(n) ((1 << (n)) - 1) /* make an n-bit mask */ macro
412 #define PVSCSI_INTR_CMPL_MASK MASK(2)
416 #define PVSCSI_INTR_MSG_MASK (MASK(2) << 2)
418 #define PVSCSI_INTR_ALL_SUPPORTED MASK(4)
/Linux-v4.19/drivers/clk/tegra/
Dclk-tegra-periph.c144 #define MASK(x) (BIT(x) - 1) macro
149 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP, \
156 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
163 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
169 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
175 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_ROUND_UP,\
182 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
189 30, MASK(2), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
196 29, MASK(3), 0, 0, 8, 1, TEGRA_DIVIDER_INT| \
203 30, MASK(2), 0, 0, 16, 1, TEGRA_DIVIDER_UART| \
[all …]
/Linux-v4.19/arch/arm/crypto/
Dghash-ce-core.S58 MASK .req d28
136 vmull.p64 T1, XL_L, MASK
143 vmull.p64 XL, T1_H, MASK
218 vmov.i8 MASK, #0xe1
219 vshl.u64 MASK, MASK, #57
/Linux-v4.19/lib/raid6/
Dint.uc69 * The MASK() operation returns 0xFF in any byte for which the high
72 static inline __attribute_const__ unative_t MASK(unative_t v)
99 w2$$ = MASK(wq$$);
129 w2$$ = MASK(wq$$);
137 w2$$ = MASK(wq$$);
Ds390vx.uc38 * For each of the 16 bytes in the vector register y the MASK()
43 static inline void MASK(int x, int y)
101 MASK(16+$$,8+$$);
135 MASK(16+$$,8+$$);
145 MASK(16+$$,8+$$);
Dneon.uc44 * The MASK() operation returns 0xFF in any byte for which the high
47 static inline unative_t MASK(unative_t v)
75 w2$$ = MASK(wq$$);
109 w2$$ = MASK(wq$$);
141 w2$$ = MASK(wq$$);
/Linux-v4.19/drivers/dma/dw/
Dcore.c190 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
191 channel_set_bit(dw, MASK.ERROR, dwc->mask); in dwc_initialize()
588 channel_set_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_tasklet()
589 channel_set_bit(dw, MASK.ERROR, dw->all_chan_mask); in dw_dma_tasklet()
612 channel_clear_bit(dw, MASK.XFER, dw->all_chan_mask); in dw_dma_interrupt()
613 channel_clear_bit(dw, MASK.BLOCK, dw->all_chan_mask); in dw_dma_interrupt()
614 channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask); in dw_dma_interrupt()
623 channel_clear_bit(dw, MASK.XFER, (1 << 8) - 1); in dw_dma_interrupt()
624 channel_clear_bit(dw, MASK.BLOCK, (1 << 8) - 1); in dw_dma_interrupt()
625 channel_clear_bit(dw, MASK.SRC_TRAN, (1 << 8) - 1); in dw_dma_interrupt()
[all …]
/Linux-v4.19/scripts/
Dgfp-translate79 MASK=`echo $LINE | awk '{print $3}'`
80 if [ $(($GFPMASK&$MASK)) -ne 0 ]; then
/Linux-v4.19/include/video/
Dgbe.h83 #define MASK(msb, lsb) \ macro
86 ( ((u32)(v) & MASK(msb,lsb)) >> (lsb) )
88 ( (v) = ((v)&~MASK(msb,lsb)) | (( (u32)(f)<<(lsb) ) & MASK(msb,lsb)) )
/Linux-v4.19/drivers/gpu/drm/i915/
Di915_syncmap.c33 #define MASK (KSYNCMAP - 1) macro
114 return (id >> p->height) & MASK; in __sync_branch_idx()
121 return id & MASK; in __sync_leaf_idx()
305 idx = p->prefix >> (above - SHIFT) & MASK; in __sync_set()
/Linux-v4.19/arch/arm64/crypto/
Dghash-ce-core.S18 MASK .req v4
161 movi MASK.16b, #0xe1
162 shl MASK.2d, MASK.2d, #57
203 pmull T2.1q, XL.1d, MASK.1d
211 pmull XL.1q, XL.1d, MASK.1d
406 movi MASK.16b, #0xe1
410 shl MASK.2d, MASK.2d, #57
497 pmull T2.1q, XL.1d, MASK.1d
510 pmull XL.1q, XL.1d, MASK.1d
/Linux-v4.19/drivers/staging/xgifb/
Dvb_struct.h58 unsigned short MASK; member
64 unsigned short MASK; member
/Linux-v4.19/drivers/gpu/drm/nouveau/dispnv04/
Dcursor.c47 MASK(NV_CIO_CRE_HCUR_ASI) | in nv04_cursor_set_offset()
53 MASK(NV_CIO_CRE_HCUR_ADDR1_CUR_DBL); in nv04_cursor_set_offset()

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