1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * vsp1_rpf.c -- R-Car VSP1 Read Pixel Formatter
4 *
5 * Copyright (C) 2013-2014 Renesas Electronics Corporation
6 *
7 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8 */
9
10 #include <linux/device.h>
11
12 #include <media/v4l2-subdev.h>
13
14 #include "vsp1.h"
15 #include "vsp1_dl.h"
16 #include "vsp1_pipe.h"
17 #include "vsp1_rwpf.h"
18 #include "vsp1_video.h"
19
20 #define RPF_MAX_WIDTH 8190
21 #define RPF_MAX_HEIGHT 8190
22
23 /* Pre extended display list command data structure. */
24 struct vsp1_extcmd_auto_fld_body {
25 u32 top_y0;
26 u32 bottom_y0;
27 u32 top_c0;
28 u32 bottom_c0;
29 u32 top_c1;
30 u32 bottom_c1;
31 u32 reserved0;
32 u32 reserved1;
33 } __packed;
34
35 /* -----------------------------------------------------------------------------
36 * Device Access
37 */
38
vsp1_rpf_write(struct vsp1_rwpf * rpf,struct vsp1_dl_body * dlb,u32 reg,u32 data)39 static inline void vsp1_rpf_write(struct vsp1_rwpf *rpf,
40 struct vsp1_dl_body *dlb, u32 reg, u32 data)
41 {
42 vsp1_dl_body_write(dlb, reg + rpf->entity.index * VI6_RPF_OFFSET,
43 data);
44 }
45
46 /* -----------------------------------------------------------------------------
47 * V4L2 Subdevice Operations
48 */
49
50 static const struct v4l2_subdev_ops rpf_ops = {
51 .pad = &vsp1_rwpf_pad_ops,
52 };
53
54 /* -----------------------------------------------------------------------------
55 * VSP1 Entity Operations
56 */
57
rpf_configure_stream(struct vsp1_entity * entity,struct vsp1_pipeline * pipe,struct vsp1_dl_body * dlb)58 static void rpf_configure_stream(struct vsp1_entity *entity,
59 struct vsp1_pipeline *pipe,
60 struct vsp1_dl_body *dlb)
61 {
62 struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev);
63 const struct vsp1_format_info *fmtinfo = rpf->fmtinfo;
64 const struct v4l2_pix_format_mplane *format = &rpf->format;
65 const struct v4l2_mbus_framefmt *source_format;
66 const struct v4l2_mbus_framefmt *sink_format;
67 unsigned int left = 0;
68 unsigned int top = 0;
69 u32 pstride;
70 u32 infmt;
71
72 /* Stride */
73 pstride = format->plane_fmt[0].bytesperline
74 << VI6_RPF_SRCM_PSTRIDE_Y_SHIFT;
75 if (format->num_planes > 1)
76 pstride |= format->plane_fmt[1].bytesperline
77 << VI6_RPF_SRCM_PSTRIDE_C_SHIFT;
78
79 /*
80 * pstride has both STRIDE_Y and STRIDE_C, but multiplying the whole
81 * of pstride by 2 is conveniently OK here as we are multiplying both
82 * values.
83 */
84 if (pipe->interlaced)
85 pstride *= 2;
86
87 vsp1_rpf_write(rpf, dlb, VI6_RPF_SRCM_PSTRIDE, pstride);
88
89 /* Format */
90 sink_format = vsp1_entity_get_pad_format(&rpf->entity,
91 rpf->entity.config,
92 RWPF_PAD_SINK);
93 source_format = vsp1_entity_get_pad_format(&rpf->entity,
94 rpf->entity.config,
95 RWPF_PAD_SOURCE);
96
97 infmt = VI6_RPF_INFMT_CIPM
98 | (fmtinfo->hwfmt << VI6_RPF_INFMT_RDFMT_SHIFT);
99
100 if (fmtinfo->swap_yc)
101 infmt |= VI6_RPF_INFMT_SPYCS;
102 if (fmtinfo->swap_uv)
103 infmt |= VI6_RPF_INFMT_SPUVS;
104
105 if (sink_format->code != source_format->code)
106 infmt |= VI6_RPF_INFMT_CSC;
107
108 vsp1_rpf_write(rpf, dlb, VI6_RPF_INFMT, infmt);
109 vsp1_rpf_write(rpf, dlb, VI6_RPF_DSWAP, fmtinfo->swap);
110
111 /* Output location */
112 if (pipe->brx) {
113 const struct v4l2_rect *compose;
114
115 compose = vsp1_entity_get_pad_selection(pipe->brx,
116 pipe->brx->config,
117 rpf->brx_input,
118 V4L2_SEL_TGT_COMPOSE);
119 left = compose->left;
120 top = compose->top;
121 }
122
123 if (pipe->interlaced)
124 top /= 2;
125
126 vsp1_rpf_write(rpf, dlb, VI6_RPF_LOC,
127 (left << VI6_RPF_LOC_HCOORD_SHIFT) |
128 (top << VI6_RPF_LOC_VCOORD_SHIFT));
129
130 /*
131 * On Gen2 use the alpha channel (extended to 8 bits) when available or
132 * a fixed alpha value set through the V4L2_CID_ALPHA_COMPONENT control
133 * otherwise.
134 *
135 * The Gen3 RPF has extended alpha capability and can both multiply the
136 * alpha channel by a fixed global alpha value, and multiply the pixel
137 * components to convert the input to premultiplied alpha.
138 *
139 * As alpha premultiplication is available in the BRx for both Gen2 and
140 * Gen3 we handle it there and use the Gen3 alpha multiplier for global
141 * alpha multiplication only. This however prevents conversion to
142 * premultiplied alpha if no BRx is present in the pipeline. If that use
143 * case turns out to be useful we will revisit the implementation (for
144 * Gen3 only).
145 *
146 * We enable alpha multiplication on Gen3 using the fixed alpha value
147 * set through the V4L2_CID_ALPHA_COMPONENT control when the input
148 * contains an alpha channel. On Gen2 the global alpha is ignored in
149 * that case.
150 *
151 * In all cases, disable color keying.
152 */
153 vsp1_rpf_write(rpf, dlb, VI6_RPF_ALPH_SEL, VI6_RPF_ALPH_SEL_AEXT_EXT |
154 (fmtinfo->alpha ? VI6_RPF_ALPH_SEL_ASEL_PACKED
155 : VI6_RPF_ALPH_SEL_ASEL_FIXED));
156
157 if (entity->vsp1->info->gen == 3) {
158 u32 mult;
159
160 if (fmtinfo->alpha) {
161 /*
162 * When the input contains an alpha channel enable the
163 * alpha multiplier. If the input is premultiplied we
164 * need to multiply both the alpha channel and the pixel
165 * components by the global alpha value to keep them
166 * premultiplied. Otherwise multiply the alpha channel
167 * only.
168 */
169 bool premultiplied = format->flags
170 & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
171
172 mult = VI6_RPF_MULT_ALPHA_A_MMD_RATIO
173 | (premultiplied ?
174 VI6_RPF_MULT_ALPHA_P_MMD_RATIO :
175 VI6_RPF_MULT_ALPHA_P_MMD_NONE);
176 } else {
177 /*
178 * When the input doesn't contain an alpha channel the
179 * global alpha value is applied in the unpacking unit,
180 * the alpha multiplier isn't needed and must be
181 * disabled.
182 */
183 mult = VI6_RPF_MULT_ALPHA_A_MMD_NONE
184 | VI6_RPF_MULT_ALPHA_P_MMD_NONE;
185 }
186
187 rpf->mult_alpha = mult;
188 }
189
190 vsp1_rpf_write(rpf, dlb, VI6_RPF_MSK_CTRL, 0);
191 vsp1_rpf_write(rpf, dlb, VI6_RPF_CKEY_CTRL, 0);
192
193 }
194
vsp1_rpf_configure_autofld(struct vsp1_rwpf * rpf,struct vsp1_dl_list * dl)195 static void vsp1_rpf_configure_autofld(struct vsp1_rwpf *rpf,
196 struct vsp1_dl_list *dl)
197 {
198 const struct v4l2_pix_format_mplane *format = &rpf->format;
199 struct vsp1_dl_ext_cmd *cmd;
200 struct vsp1_extcmd_auto_fld_body *auto_fld;
201 u32 offset_y, offset_c;
202
203 cmd = vsp1_dl_get_pre_cmd(dl);
204 if (WARN_ONCE(!cmd, "Failed to obtain an autofld cmd"))
205 return;
206
207 /* Re-index our auto_fld to match the current RPF. */
208 auto_fld = cmd->data;
209 auto_fld = &auto_fld[rpf->entity.index];
210
211 auto_fld->top_y0 = rpf->mem.addr[0];
212 auto_fld->top_c0 = rpf->mem.addr[1];
213 auto_fld->top_c1 = rpf->mem.addr[2];
214
215 offset_y = format->plane_fmt[0].bytesperline;
216 offset_c = format->plane_fmt[1].bytesperline;
217
218 auto_fld->bottom_y0 = rpf->mem.addr[0] + offset_y;
219 auto_fld->bottom_c0 = rpf->mem.addr[1] + offset_c;
220 auto_fld->bottom_c1 = rpf->mem.addr[2] + offset_c;
221
222 cmd->flags |= VI6_DL_EXT_AUTOFLD_INT | BIT(16 + rpf->entity.index);
223 }
224
rpf_configure_frame(struct vsp1_entity * entity,struct vsp1_pipeline * pipe,struct vsp1_dl_list * dl,struct vsp1_dl_body * dlb)225 static void rpf_configure_frame(struct vsp1_entity *entity,
226 struct vsp1_pipeline *pipe,
227 struct vsp1_dl_list *dl,
228 struct vsp1_dl_body *dlb)
229 {
230 struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev);
231
232 vsp1_rpf_write(rpf, dlb, VI6_RPF_VRTCOL_SET,
233 rpf->alpha << VI6_RPF_VRTCOL_SET_LAYA_SHIFT);
234 vsp1_rpf_write(rpf, dlb, VI6_RPF_MULT_ALPHA, rpf->mult_alpha |
235 (rpf->alpha << VI6_RPF_MULT_ALPHA_RATIO_SHIFT));
236
237 vsp1_pipeline_propagate_alpha(pipe, dlb, rpf->alpha);
238 }
239
rpf_configure_partition(struct vsp1_entity * entity,struct vsp1_pipeline * pipe,struct vsp1_dl_list * dl,struct vsp1_dl_body * dlb)240 static void rpf_configure_partition(struct vsp1_entity *entity,
241 struct vsp1_pipeline *pipe,
242 struct vsp1_dl_list *dl,
243 struct vsp1_dl_body *dlb)
244 {
245 struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev);
246 struct vsp1_rwpf_memory mem = rpf->mem;
247 struct vsp1_device *vsp1 = rpf->entity.vsp1;
248 const struct vsp1_format_info *fmtinfo = rpf->fmtinfo;
249 const struct v4l2_pix_format_mplane *format = &rpf->format;
250 struct v4l2_rect crop;
251
252 /*
253 * Source size and crop offsets.
254 *
255 * The crop offsets correspond to the location of the crop
256 * rectangle top left corner in the plane buffer. Only two
257 * offsets are needed, as planes 2 and 3 always have identical
258 * strides.
259 */
260 crop = *vsp1_rwpf_get_crop(rpf, rpf->entity.config);
261
262 /*
263 * Partition Algorithm Control
264 *
265 * The partition algorithm can split this frame into multiple
266 * slices. We must scale our partition window based on the pipe
267 * configuration to match the destination partition window.
268 * To achieve this, we adjust our crop to provide a 'sub-crop'
269 * matching the expected partition window. Only 'left' and
270 * 'width' need to be adjusted.
271 */
272 if (pipe->partitions > 1) {
273 crop.width = pipe->partition->rpf.width;
274 crop.left += pipe->partition->rpf.left;
275 }
276
277 if (pipe->interlaced) {
278 crop.height = round_down(crop.height / 2, fmtinfo->vsub);
279 crop.top = round_down(crop.top / 2, fmtinfo->vsub);
280 }
281
282 vsp1_rpf_write(rpf, dlb, VI6_RPF_SRC_BSIZE,
283 (crop.width << VI6_RPF_SRC_BSIZE_BHSIZE_SHIFT) |
284 (crop.height << VI6_RPF_SRC_BSIZE_BVSIZE_SHIFT));
285 vsp1_rpf_write(rpf, dlb, VI6_RPF_SRC_ESIZE,
286 (crop.width << VI6_RPF_SRC_ESIZE_EHSIZE_SHIFT) |
287 (crop.height << VI6_RPF_SRC_ESIZE_EVSIZE_SHIFT));
288
289 mem.addr[0] += crop.top * format->plane_fmt[0].bytesperline
290 + crop.left * fmtinfo->bpp[0] / 8;
291
292 if (format->num_planes > 1) {
293 unsigned int offset;
294
295 offset = crop.top * format->plane_fmt[1].bytesperline
296 + crop.left / fmtinfo->hsub
297 * fmtinfo->bpp[1] / 8;
298 mem.addr[1] += offset;
299 mem.addr[2] += offset;
300 }
301
302 /*
303 * On Gen3 hardware the SPUVS bit has no effect on 3-planar
304 * formats. Swap the U and V planes manually in that case.
305 */
306 if (vsp1->info->gen == 3 && format->num_planes == 3 &&
307 fmtinfo->swap_uv)
308 swap(mem.addr[1], mem.addr[2]);
309
310 /*
311 * Interlaced pipelines will use the extended pre-cmd to process
312 * SRCM_ADDR_{Y,C0,C1}
313 */
314 if (pipe->interlaced) {
315 vsp1_rpf_configure_autofld(rpf, dl);
316 } else {
317 vsp1_rpf_write(rpf, dlb, VI6_RPF_SRCM_ADDR_Y, mem.addr[0]);
318 vsp1_rpf_write(rpf, dlb, VI6_RPF_SRCM_ADDR_C0, mem.addr[1]);
319 vsp1_rpf_write(rpf, dlb, VI6_RPF_SRCM_ADDR_C1, mem.addr[2]);
320 }
321 }
322
rpf_partition(struct vsp1_entity * entity,struct vsp1_pipeline * pipe,struct vsp1_partition * partition,unsigned int partition_idx,struct vsp1_partition_window * window)323 static void rpf_partition(struct vsp1_entity *entity,
324 struct vsp1_pipeline *pipe,
325 struct vsp1_partition *partition,
326 unsigned int partition_idx,
327 struct vsp1_partition_window *window)
328 {
329 partition->rpf = *window;
330 }
331
332 static const struct vsp1_entity_operations rpf_entity_ops = {
333 .configure_stream = rpf_configure_stream,
334 .configure_frame = rpf_configure_frame,
335 .configure_partition = rpf_configure_partition,
336 .partition = rpf_partition,
337 };
338
339 /* -----------------------------------------------------------------------------
340 * Initialization and Cleanup
341 */
342
vsp1_rpf_create(struct vsp1_device * vsp1,unsigned int index)343 struct vsp1_rwpf *vsp1_rpf_create(struct vsp1_device *vsp1, unsigned int index)
344 {
345 struct vsp1_rwpf *rpf;
346 char name[6];
347 int ret;
348
349 rpf = devm_kzalloc(vsp1->dev, sizeof(*rpf), GFP_KERNEL);
350 if (rpf == NULL)
351 return ERR_PTR(-ENOMEM);
352
353 rpf->max_width = RPF_MAX_WIDTH;
354 rpf->max_height = RPF_MAX_HEIGHT;
355
356 rpf->entity.ops = &rpf_entity_ops;
357 rpf->entity.type = VSP1_ENTITY_RPF;
358 rpf->entity.index = index;
359
360 sprintf(name, "rpf.%u", index);
361 ret = vsp1_entity_init(vsp1, &rpf->entity, name, 2, &rpf_ops,
362 MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER);
363 if (ret < 0)
364 return ERR_PTR(ret);
365
366 /* Initialize the control handler. */
367 ret = vsp1_rwpf_init_ctrls(rpf, 0);
368 if (ret < 0) {
369 dev_err(vsp1->dev, "rpf%u: failed to initialize controls\n",
370 index);
371 goto error;
372 }
373
374 v4l2_ctrl_handler_setup(&rpf->ctrls);
375
376 return rpf;
377
378 error:
379 vsp1_entity_destroy(&rpf->entity);
380 return ERR_PTR(ret);
381 }
382
