1USB xHCI controllers 2 3Required properties: 4 - compatible: should be one or more of 5 6 - "generic-xhci" for generic XHCI device 7 - "marvell,armada3700-xhci" for Armada 37xx SoCs 8 - "marvell,armada-375-xhci" for Armada 375 SoCs 9 - "marvell,armada-380-xhci" for Armada 38x SoCs 10 - "renesas,xhci-r8a7743" for r8a7743 SoC 11 - "renesas,xhci-r8a7744" for r8a7744 SoC 12 - "renesas,xhci-r8a774a1" for r8a774a1 SoC 13 - "renesas,xhci-r8a774c0" for r8a774c0 SoC 14 - "renesas,xhci-r8a7790" for r8a7790 SoC 15 - "renesas,xhci-r8a7791" for r8a7791 SoC 16 - "renesas,xhci-r8a7793" for r8a7793 SoC 17 - "renesas,xhci-r8a7795" for r8a7795 SoC 18 - "renesas,xhci-r8a7796" for r8a7796 SoC 19 - "renesas,xhci-r8a77965" for r8a77965 SoC 20 - "renesas,xhci-r8a77990" for r8a77990 SoC 21 - "renesas,rcar-gen2-xhci" for a generic R-Car Gen2 or RZ/G1 compatible 22 device 23 - "renesas,rcar-gen3-xhci" for a generic R-Car Gen3 or RZ/G2 compatible 24 device 25 - "xhci-platform" (deprecated) 26 27 When compatible with the generic version, nodes must list the 28 SoC-specific version corresponding to the platform first 29 followed by the generic version. 30 31 - reg: should contain address and length of the standard XHCI 32 register set for the device. 33 - interrupts: one XHCI interrupt should be described here. 34 35Optional properties: 36 - clocks: reference to the clocks 37 - clock-names: mandatory if there is a second clock, in this case 38 the name must be "core" for the first clock and "reg" for the 39 second one 40 - usb2-lpm-disable: indicate if we don't want to enable USB2 HW LPM 41 - usb3-lpm-capable: determines if platform is USB3 LPM capable 42 - quirk-broken-port-ped: set if the controller has broken port disable mechanism 43 - imod-interval-ns: default interrupt moderation interval is 5000ns 44 - phys : see usb-hcd.yaml in the current directory 45 46additionally the properties from usb-hcd.yaml (in the current directory) are 47supported. 48 49 50Example: 51 usb@f0931000 { 52 compatible = "generic-xhci"; 53 reg = <0xf0931000 0x8c8>; 54 interrupts = <0x0 0x4e 0x0>; 55 }; 56