1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * DTS file for all SPEAr1340 SoCs
4 *
5 * Copyright 2012 Viresh Kumar <vireshk@kernel.org>
6 */
7
8/include/ "spear13xx.dtsi"
9
10/ {
11	compatible = "st,spear1340";
12
13	ahb {
14
15		spics: spics@e0700000{
16			compatible = "st,spear-spics-gpio";
17			reg = <0xe0700000 0x1000>;
18			st-spics,peripcfg-reg = <0x42c>;
19			st-spics,sw-enable-bit = <21>;
20			st-spics,cs-value-bit = <20>;
21			st-spics,cs-enable-mask = <3>;
22			st-spics,cs-enable-shift = <18>;
23			gpio-controller;
24			#gpio-cells = <2>;
25			status = "disabled";
26		};
27
28		miphy0: miphy@eb800000 {
29			compatible = "st,spear1340-miphy";
30			reg = <0xeb800000 0x4000>;
31			misc = <&misc>;
32			#phy-cells = <1>;
33			status = "disabled";
34		};
35
36		ahci0: ahci@b1000000 {
37			compatible = "snps,spear-ahci";
38			reg = <0xb1000000 0x10000>;
39			interrupts = <0 72 0x4>;
40			phys = <&miphy0 0>;
41			phy-names = "sata-phy";
42			status = "disabled";
43		};
44
45		pcie0: pcie@b1000000 {
46			compatible = "st,spear1340-pcie", "snps,dw-pcie";
47			reg = <0xb1000000 0x4000>, <0x80000000 0x20000>;
48			reg-names = "dbi", "config";
49			interrupts = <0 68 0x4>;
50			interrupt-map-mask = <0 0 0 0>;
51			interrupt-map = <0x0 0 &gic 0 68 0x4>;
52			num-lanes = <1>;
53			phys = <&miphy0 1>;
54			phy-names = "pcie-phy";
55			#address-cells = <3>;
56			#size-cells = <2>;
57			device_type = "pci";
58			ranges = <0x81000000 0 0	 0x80020000 0 0x00010000   /* downstream I/O */
59				0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */
60			bus-range = <0x00 0xff>;
61			status = "disabled";
62		};
63
64		i2s-play@b2400000 {
65			compatible = "snps,designware-i2s";
66			reg = <0xb2400000 0x10000>;
67			interrupt-names = "play_irq";
68			interrupts = <0 98 0x4
69				      0 99 0x4>;
70			play;
71			channel = <8>;
72			status = "disabled";
73		};
74
75		i2s-rec@b2000000 {
76			compatible = "snps,designware-i2s";
77			reg = <0xb2000000 0x10000>;
78			interrupt-names = "record_irq";
79			interrupts = <0 100  0x4
80				      0 101 0x4>;
81			record;
82			channel = <8>;
83			status = "disabled";
84		};
85
86		pinmux: pinmux@e0700000 {
87			compatible = "st,spear1340-pinmux";
88			reg = <0xe0700000 0x1000>;
89			#gpio-range-cells = <3>;
90		};
91
92		pwm: pwm@e0180000 {
93			compatible ="st,spear13xx-pwm";
94			reg = <0xe0180000 0x1000>;
95			#pwm-cells = <2>;
96			status = "disabled";
97		};
98
99		spdif-in@d0100000 {
100			compatible = "st,spdif-in";
101			reg = < 0xd0100000 0x20000
102				0xd0110000 0x10000 >;
103			interrupts = <0 84 0x4>;
104			status = "disabled";
105		};
106
107		spdif-out@d0000000 {
108			compatible = "st,spdif-out";
109			reg = <0xd0000000 0x20000>;
110			interrupts = <0 85 0x4>;
111			status = "disabled";
112		};
113
114		spi1: spi@5d400000 {
115			compatible = "arm,pl022", "arm,primecell";
116			reg = <0x5d400000 0x1000>;
117			#address-cells = <1>;
118			#size-cells = <0>;
119			interrupts = <0 99 0x4>;
120			status = "disabled";
121		};
122
123		apb {
124			i2c1: i2c@b4000000 {
125				#address-cells = <1>;
126				#size-cells = <0>;
127				compatible = "snps,designware-i2c";
128				reg = <0xb4000000 0x1000>;
129				interrupts = <0 104 0x4>;
130				write-16bit;
131				status = "disabled";
132			};
133
134			serial@b4100000 {
135				compatible = "arm,pl011", "arm,primecell";
136				reg = <0xb4100000 0x1000>;
137				interrupts = <0 105 0x4>;
138				status = "disabled";
139				dmas = <&dwdma0 12 0 1>,
140					<&dwdma0 13 1 0>;
141				dma-names = "tx", "rx";
142			};
143
144			thermal@e07008c4 {
145				st,thermal-flags = <0x2a00>;
146			};
147
148			gpiopinctrl: gpio@e2800000 {
149				compatible = "st,spear-plgpio";
150				reg = <0xe2800000 0x1000>;
151				interrupts = <0 107 0x4>;
152				#interrupt-cells = <1>;
153				interrupt-controller;
154				gpio-controller;
155				#gpio-cells = <2>;
156				gpio-ranges = <&pinmux 0 0 252>;
157				status = "disabled";
158
159				st-plgpio,ngpio = <250>;
160				st-plgpio,wdata-reg = <0x40>;
161				st-plgpio,dir-reg = <0x00>;
162				st-plgpio,ie-reg = <0x80>;
163				st-plgpio,rdata-reg = <0x20>;
164				st-plgpio,mis-reg = <0xa0>;
165				st-plgpio,eit-reg = <0x60>;
166			};
167		};
168	};
169};
170