1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * ALSA SoC TWL4030 codec driver
4 *
5 * Author: Steve Sakoman, <steve@sakoman.com>
6 */
7
8 #include <linux/module.h>
9 #include <linux/moduleparam.h>
10 #include <linux/init.h>
11 #include <linux/delay.h>
12 #include <linux/pm.h>
13 #include <linux/i2c.h>
14 #include <linux/platform_device.h>
15 #include <linux/of.h>
16 #include <linux/of_gpio.h>
17 #include <linux/mfd/twl.h>
18 #include <linux/slab.h>
19 #include <linux/gpio.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/soc.h>
24 #include <sound/initval.h>
25 #include <sound/tlv.h>
26
27 /* Register descriptions are here */
28 #include <linux/mfd/twl4030-audio.h>
29
30 /* TWL4030 PMBR1 Register */
31 #define TWL4030_PMBR1_REG 0x0D
32 /* TWL4030 PMBR1 Register GPIO6 mux bits */
33 #define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
34
35 #define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
36
37 struct twl4030_board_params {
38 unsigned int digimic_delay; /* in ms */
39 unsigned int ramp_delay_value;
40 unsigned int offset_cncl_path;
41 unsigned int hs_extmute:1;
42 int hs_extmute_gpio;
43 };
44
45 /* codec private data */
46 struct twl4030_priv {
47 unsigned int codec_powered;
48
49 /* reference counts of AIF/APLL users */
50 unsigned int apll_enabled;
51
52 struct snd_pcm_substream *master_substream;
53 struct snd_pcm_substream *slave_substream;
54
55 unsigned int configured;
56 unsigned int rate;
57 unsigned int sample_bits;
58 unsigned int channels;
59
60 unsigned int sysclk;
61
62 /* Output (with associated amp) states */
63 u8 hsl_enabled, hsr_enabled;
64 u8 earpiece_enabled;
65 u8 predrivel_enabled, predriver_enabled;
66 u8 carkitl_enabled, carkitr_enabled;
67 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
68
69 struct twl4030_board_params *board_params;
70 };
71
tw4030_init_ctl_cache(struct twl4030_priv * twl4030)72 static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
73 {
74 int i;
75 u8 byte;
76
77 for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
78 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
79 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
80 }
81 }
82
twl4030_read(struct snd_soc_component * component,unsigned int reg)83 static unsigned int twl4030_read(struct snd_soc_component *component, unsigned int reg)
84 {
85 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
86 u8 value = 0;
87
88 if (reg >= TWL4030_CACHEREGNUM)
89 return -EIO;
90
91 switch (reg) {
92 case TWL4030_REG_EAR_CTL:
93 case TWL4030_REG_PREDL_CTL:
94 case TWL4030_REG_PREDR_CTL:
95 case TWL4030_REG_PRECKL_CTL:
96 case TWL4030_REG_PRECKR_CTL:
97 case TWL4030_REG_HS_GAIN_SET:
98 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
99 break;
100 default:
101 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
102 break;
103 }
104
105 return value;
106 }
107
twl4030_can_write_to_chip(struct twl4030_priv * twl4030,unsigned int reg)108 static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030,
109 unsigned int reg)
110 {
111 bool write_to_reg = false;
112
113 /* Decide if the given register can be written */
114 switch (reg) {
115 case TWL4030_REG_EAR_CTL:
116 if (twl4030->earpiece_enabled)
117 write_to_reg = true;
118 break;
119 case TWL4030_REG_PREDL_CTL:
120 if (twl4030->predrivel_enabled)
121 write_to_reg = true;
122 break;
123 case TWL4030_REG_PREDR_CTL:
124 if (twl4030->predriver_enabled)
125 write_to_reg = true;
126 break;
127 case TWL4030_REG_PRECKL_CTL:
128 if (twl4030->carkitl_enabled)
129 write_to_reg = true;
130 break;
131 case TWL4030_REG_PRECKR_CTL:
132 if (twl4030->carkitr_enabled)
133 write_to_reg = true;
134 break;
135 case TWL4030_REG_HS_GAIN_SET:
136 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
137 write_to_reg = true;
138 break;
139 default:
140 /* All other register can be written */
141 write_to_reg = true;
142 break;
143 }
144
145 return write_to_reg;
146 }
147
twl4030_write(struct snd_soc_component * component,unsigned int reg,unsigned int value)148 static int twl4030_write(struct snd_soc_component *component, unsigned int reg,
149 unsigned int value)
150 {
151 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
152
153 /* Update the ctl cache */
154 switch (reg) {
155 case TWL4030_REG_EAR_CTL:
156 case TWL4030_REG_PREDL_CTL:
157 case TWL4030_REG_PREDR_CTL:
158 case TWL4030_REG_PRECKL_CTL:
159 case TWL4030_REG_PRECKR_CTL:
160 case TWL4030_REG_HS_GAIN_SET:
161 twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
162 break;
163 default:
164 break;
165 }
166
167 if (twl4030_can_write_to_chip(twl4030, reg))
168 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
169
170 return 0;
171 }
172
twl4030_wait_ms(int time)173 static inline void twl4030_wait_ms(int time)
174 {
175 if (time < 60) {
176 time *= 1000;
177 usleep_range(time, time + 500);
178 } else {
179 msleep(time);
180 }
181 }
182
twl4030_codec_enable(struct snd_soc_component * component,int enable)183 static void twl4030_codec_enable(struct snd_soc_component *component, int enable)
184 {
185 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
186 int mode;
187
188 if (enable == twl4030->codec_powered)
189 return;
190
191 if (enable)
192 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
193 else
194 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
195
196 if (mode >= 0)
197 twl4030->codec_powered = enable;
198
199 /* REVISIT: this delay is present in TI sample drivers */
200 /* but there seems to be no TRM requirement for it */
201 udelay(10);
202 }
203
204 static void
twl4030_get_board_param_values(struct twl4030_board_params * board_params,struct device_node * node)205 twl4030_get_board_param_values(struct twl4030_board_params *board_params,
206 struct device_node *node)
207 {
208 int value;
209
210 of_property_read_u32(node, "ti,digimic_delay", &board_params->digimic_delay);
211 of_property_read_u32(node, "ti,ramp_delay_value", &board_params->ramp_delay_value);
212 of_property_read_u32(node, "ti,offset_cncl_path", &board_params->offset_cncl_path);
213 if (!of_property_read_u32(node, "ti,hs_extmute", &value))
214 board_params->hs_extmute = value;
215
216 board_params->hs_extmute_gpio = of_get_named_gpio(node, "ti,hs_extmute_gpio", 0);
217 if (gpio_is_valid(board_params->hs_extmute_gpio))
218 board_params->hs_extmute = 1;
219 }
220
221 static struct twl4030_board_params*
twl4030_get_board_params(struct snd_soc_component * component)222 twl4030_get_board_params(struct snd_soc_component *component)
223 {
224 struct twl4030_board_params *board_params = NULL;
225 struct device_node *twl4030_codec_node = NULL;
226
227 twl4030_codec_node = of_get_child_by_name(component->dev->parent->of_node,
228 "codec");
229
230 if (twl4030_codec_node) {
231 board_params = devm_kzalloc(component->dev,
232 sizeof(struct twl4030_board_params),
233 GFP_KERNEL);
234 if (!board_params) {
235 of_node_put(twl4030_codec_node);
236 return NULL;
237 }
238 twl4030_get_board_param_values(board_params, twl4030_codec_node);
239 of_node_put(twl4030_codec_node);
240 }
241
242 return board_params;
243 }
244
twl4030_init_chip(struct snd_soc_component * component)245 static void twl4030_init_chip(struct snd_soc_component *component)
246 {
247 struct twl4030_board_params *board_params;
248 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
249 u8 reg, byte;
250 int i = 0;
251
252 board_params = twl4030_get_board_params(component);
253
254 if (board_params && board_params->hs_extmute) {
255 if (gpio_is_valid(board_params->hs_extmute_gpio)) {
256 int ret;
257
258 if (!board_params->hs_extmute_gpio)
259 dev_warn(component->dev,
260 "Extmute GPIO is 0 is this correct?\n");
261
262 ret = gpio_request_one(board_params->hs_extmute_gpio,
263 GPIOF_OUT_INIT_LOW,
264 "hs_extmute");
265 if (ret) {
266 dev_err(component->dev,
267 "Failed to get hs_extmute GPIO\n");
268 board_params->hs_extmute_gpio = -1;
269 }
270 } else {
271 u8 pin_mux;
272
273 /* Set TWL4030 GPIO6 as EXTMUTE signal */
274 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
275 TWL4030_PMBR1_REG);
276 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
277 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
278 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
279 TWL4030_PMBR1_REG);
280 }
281 }
282
283 /* Initialize the local ctl register cache */
284 tw4030_init_ctl_cache(twl4030);
285
286 /* anti-pop when changing analog gain */
287 reg = twl4030_read(component, TWL4030_REG_MISC_SET_1);
288 twl4030_write(component, TWL4030_REG_MISC_SET_1,
289 reg | TWL4030_SMOOTH_ANAVOL_EN);
290
291 twl4030_write(component, TWL4030_REG_OPTION,
292 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
293 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
294
295 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
296 twl4030_write(component, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
297
298 /* Machine dependent setup */
299 if (!board_params)
300 return;
301
302 twl4030->board_params = board_params;
303
304 reg = twl4030_read(component, TWL4030_REG_HS_POPN_SET);
305 reg &= ~TWL4030_RAMP_DELAY;
306 reg |= (board_params->ramp_delay_value << 2);
307 twl4030_write(component, TWL4030_REG_HS_POPN_SET, reg);
308
309 /* initiate offset cancellation */
310 twl4030_codec_enable(component, 1);
311
312 reg = twl4030_read(component, TWL4030_REG_ANAMICL);
313 reg &= ~TWL4030_OFFSET_CNCL_SEL;
314 reg |= board_params->offset_cncl_path;
315 twl4030_write(component, TWL4030_REG_ANAMICL,
316 reg | TWL4030_CNCL_OFFSET_START);
317
318 /*
319 * Wait for offset cancellation to complete.
320 * Since this takes a while, do not slam the i2c.
321 * Start polling the status after ~20ms.
322 */
323 msleep(20);
324 do {
325 usleep_range(1000, 2000);
326 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
327 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
328 TWL4030_REG_ANAMICL);
329 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
330 } while ((i++ < 100) &&
331 ((byte & TWL4030_CNCL_OFFSET_START) ==
332 TWL4030_CNCL_OFFSET_START));
333
334 twl4030_codec_enable(component, 0);
335 }
336
twl4030_apll_enable(struct snd_soc_component * component,int enable)337 static void twl4030_apll_enable(struct snd_soc_component *component, int enable)
338 {
339 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
340
341 if (enable) {
342 twl4030->apll_enabled++;
343 if (twl4030->apll_enabled == 1)
344 twl4030_audio_enable_resource(
345 TWL4030_AUDIO_RES_APLL);
346 } else {
347 twl4030->apll_enabled--;
348 if (!twl4030->apll_enabled)
349 twl4030_audio_disable_resource(
350 TWL4030_AUDIO_RES_APLL);
351 }
352 }
353
354 /* Earpiece */
355 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
356 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
357 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
358 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
359 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
360 };
361
362 /* PreDrive Left */
363 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
364 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
365 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
366 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
367 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
368 };
369
370 /* PreDrive Right */
371 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
372 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
373 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
374 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
375 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
376 };
377
378 /* Headset Left */
379 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
380 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
381 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
382 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
383 };
384
385 /* Headset Right */
386 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
387 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
388 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
389 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
390 };
391
392 /* Carkit Left */
393 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
394 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
395 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
396 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
397 };
398
399 /* Carkit Right */
400 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
401 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
402 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
403 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
404 };
405
406 /* Handsfree Left */
407 static const char *twl4030_handsfreel_texts[] =
408 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
409
410 static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum,
411 TWL4030_REG_HFL_CTL, 0,
412 twl4030_handsfreel_texts);
413
414 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
415 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
416
417 /* Handsfree Left virtual mute */
418 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
419 SOC_DAPM_SINGLE_VIRT("Switch", 1);
420
421 /* Handsfree Right */
422 static const char *twl4030_handsfreer_texts[] =
423 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
424
425 static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum,
426 TWL4030_REG_HFR_CTL, 0,
427 twl4030_handsfreer_texts);
428
429 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
430 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
431
432 /* Handsfree Right virtual mute */
433 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
434 SOC_DAPM_SINGLE_VIRT("Switch", 1);
435
436 /* Vibra */
437 /* Vibra audio path selection */
438 static const char *twl4030_vibra_texts[] =
439 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
440
441 static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum,
442 TWL4030_REG_VIBRA_CTL, 2,
443 twl4030_vibra_texts);
444
445 static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
446 SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
447
448 /* Vibra path selection: local vibrator (PWM) or audio driven */
449 static const char *twl4030_vibrapath_texts[] =
450 {"Local vibrator", "Audio"};
451
452 static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum,
453 TWL4030_REG_VIBRA_CTL, 4,
454 twl4030_vibrapath_texts);
455
456 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
457 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
458
459 /* Left analog microphone selection */
460 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
461 SOC_DAPM_SINGLE("Main Mic Capture Switch",
462 TWL4030_REG_ANAMICL, 0, 1, 0),
463 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
464 TWL4030_REG_ANAMICL, 1, 1, 0),
465 SOC_DAPM_SINGLE("AUXL Capture Switch",
466 TWL4030_REG_ANAMICL, 2, 1, 0),
467 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
468 TWL4030_REG_ANAMICL, 3, 1, 0),
469 };
470
471 /* Right analog microphone selection */
472 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
473 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
474 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
475 };
476
477 /* TX1 L/R Analog/Digital microphone selection */
478 static const char *twl4030_micpathtx1_texts[] =
479 {"Analog", "Digimic0"};
480
481 static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum,
482 TWL4030_REG_ADCMICSEL, 0,
483 twl4030_micpathtx1_texts);
484
485 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
486 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
487
488 /* TX2 L/R Analog/Digital microphone selection */
489 static const char *twl4030_micpathtx2_texts[] =
490 {"Analog", "Digimic1"};
491
492 static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum,
493 TWL4030_REG_ADCMICSEL, 2,
494 twl4030_micpathtx2_texts);
495
496 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
497 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
498
499 /* Analog bypass for AudioR1 */
500 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
501 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
502
503 /* Analog bypass for AudioL1 */
504 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
505 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
506
507 /* Analog bypass for AudioR2 */
508 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
509 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
510
511 /* Analog bypass for AudioL2 */
512 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
513 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
514
515 /* Analog bypass for Voice */
516 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
517 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
518
519 /* Digital bypass gain, mute instead of -30dB */
520 static const DECLARE_TLV_DB_RANGE(twl4030_dapm_dbypass_tlv,
521 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
522 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
523 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0)
524 );
525
526 /* Digital bypass left (TX1L -> RX2L) */
527 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
528 SOC_DAPM_SINGLE_TLV("Volume",
529 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
530 twl4030_dapm_dbypass_tlv);
531
532 /* Digital bypass right (TX1R -> RX2R) */
533 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
534 SOC_DAPM_SINGLE_TLV("Volume",
535 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
536 twl4030_dapm_dbypass_tlv);
537
538 /*
539 * Voice Sidetone GAIN volume control:
540 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
541 */
542 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
543
544 /* Digital bypass voice: sidetone (VUL -> VDL)*/
545 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
546 SOC_DAPM_SINGLE_TLV("Volume",
547 TWL4030_REG_VSTPGA, 0, 0x29, 0,
548 twl4030_dapm_dbypassv_tlv);
549
550 /*
551 * Output PGA builder:
552 * Handle the muting and unmuting of the given output (turning off the
553 * amplifier associated with the output pin)
554 * On mute bypass the reg_cache and write 0 to the register
555 * On unmute: restore the register content from the reg_cache
556 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
557 */
558 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
559 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
560 struct snd_kcontrol *kcontrol, int event) \
561 { \
562 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); \
563 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component); \
564 \
565 switch (event) { \
566 case SND_SOC_DAPM_POST_PMU: \
567 twl4030->pin_name##_enabled = 1; \
568 twl4030_write(component, reg, twl4030_read(component, reg)); \
569 break; \
570 case SND_SOC_DAPM_POST_PMD: \
571 twl4030->pin_name##_enabled = 0; \
572 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \
573 break; \
574 } \
575 return 0; \
576 }
577
578 TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
579 TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
580 TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
581 TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
582 TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
583
handsfree_ramp(struct snd_soc_component * component,int reg,int ramp)584 static void handsfree_ramp(struct snd_soc_component *component, int reg, int ramp)
585 {
586 unsigned char hs_ctl;
587
588 hs_ctl = twl4030_read(component, reg);
589
590 if (ramp) {
591 /* HF ramp-up */
592 hs_ctl |= TWL4030_HF_CTL_REF_EN;
593 twl4030_write(component, reg, hs_ctl);
594 udelay(10);
595 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
596 twl4030_write(component, reg, hs_ctl);
597 udelay(40);
598 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
599 hs_ctl |= TWL4030_HF_CTL_HB_EN;
600 twl4030_write(component, reg, hs_ctl);
601 } else {
602 /* HF ramp-down */
603 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
604 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
605 twl4030_write(component, reg, hs_ctl);
606 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
607 twl4030_write(component, reg, hs_ctl);
608 udelay(40);
609 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
610 twl4030_write(component, reg, hs_ctl);
611 }
612 }
613
handsfreelpga_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)614 static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
615 struct snd_kcontrol *kcontrol, int event)
616 {
617 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
618
619 switch (event) {
620 case SND_SOC_DAPM_POST_PMU:
621 handsfree_ramp(component, TWL4030_REG_HFL_CTL, 1);
622 break;
623 case SND_SOC_DAPM_POST_PMD:
624 handsfree_ramp(component, TWL4030_REG_HFL_CTL, 0);
625 break;
626 }
627 return 0;
628 }
629
handsfreerpga_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)630 static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
631 struct snd_kcontrol *kcontrol, int event)
632 {
633 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
634
635 switch (event) {
636 case SND_SOC_DAPM_POST_PMU:
637 handsfree_ramp(component, TWL4030_REG_HFR_CTL, 1);
638 break;
639 case SND_SOC_DAPM_POST_PMD:
640 handsfree_ramp(component, TWL4030_REG_HFR_CTL, 0);
641 break;
642 }
643 return 0;
644 }
645
vibramux_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)646 static int vibramux_event(struct snd_soc_dapm_widget *w,
647 struct snd_kcontrol *kcontrol, int event)
648 {
649 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
650
651 twl4030_write(component, TWL4030_REG_VIBRA_SET, 0xff);
652 return 0;
653 }
654
apll_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)655 static int apll_event(struct snd_soc_dapm_widget *w,
656 struct snd_kcontrol *kcontrol, int event)
657 {
658 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
659
660 switch (event) {
661 case SND_SOC_DAPM_PRE_PMU:
662 twl4030_apll_enable(component, 1);
663 break;
664 case SND_SOC_DAPM_POST_PMD:
665 twl4030_apll_enable(component, 0);
666 break;
667 }
668 return 0;
669 }
670
aif_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)671 static int aif_event(struct snd_soc_dapm_widget *w,
672 struct snd_kcontrol *kcontrol, int event)
673 {
674 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
675 u8 audio_if;
676
677 audio_if = twl4030_read(component, TWL4030_REG_AUDIO_IF);
678 switch (event) {
679 case SND_SOC_DAPM_PRE_PMU:
680 /* Enable AIF */
681 /* enable the PLL before we use it to clock the DAI */
682 twl4030_apll_enable(component, 1);
683
684 twl4030_write(component, TWL4030_REG_AUDIO_IF,
685 audio_if | TWL4030_AIF_EN);
686 break;
687 case SND_SOC_DAPM_POST_PMD:
688 /* disable the DAI before we stop it's source PLL */
689 twl4030_write(component, TWL4030_REG_AUDIO_IF,
690 audio_if & ~TWL4030_AIF_EN);
691 twl4030_apll_enable(component, 0);
692 break;
693 }
694 return 0;
695 }
696
headset_ramp(struct snd_soc_component * component,int ramp)697 static void headset_ramp(struct snd_soc_component *component, int ramp)
698 {
699 unsigned char hs_gain, hs_pop;
700 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
701 struct twl4030_board_params *board_params = twl4030->board_params;
702 /* Base values for ramp delay calculation: 2^19 - 2^26 */
703 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
704 8388608, 16777216, 33554432, 67108864};
705 unsigned int delay;
706
707 hs_gain = twl4030_read(component, TWL4030_REG_HS_GAIN_SET);
708 hs_pop = twl4030_read(component, TWL4030_REG_HS_POPN_SET);
709 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
710 twl4030->sysclk) + 1;
711
712 /* Enable external mute control, this dramatically reduces
713 * the pop-noise */
714 if (board_params && board_params->hs_extmute) {
715 if (gpio_is_valid(board_params->hs_extmute_gpio)) {
716 gpio_set_value(board_params->hs_extmute_gpio, 1);
717 } else {
718 hs_pop |= TWL4030_EXTMUTE;
719 twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
720 }
721 }
722
723 if (ramp) {
724 /* Headset ramp-up according to the TRM */
725 hs_pop |= TWL4030_VMID_EN;
726 twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
727 /* Actually write to the register */
728 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
729 TWL4030_REG_HS_GAIN_SET);
730 hs_pop |= TWL4030_RAMP_EN;
731 twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
732 /* Wait ramp delay time + 1, so the VMID can settle */
733 twl4030_wait_ms(delay);
734 } else {
735 /* Headset ramp-down _not_ according to
736 * the TRM, but in a way that it is working */
737 hs_pop &= ~TWL4030_RAMP_EN;
738 twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
739 /* Wait ramp delay time + 1, so the VMID can settle */
740 twl4030_wait_ms(delay);
741 /* Bypass the reg_cache to mute the headset */
742 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
743 TWL4030_REG_HS_GAIN_SET);
744
745 hs_pop &= ~TWL4030_VMID_EN;
746 twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
747 }
748
749 /* Disable external mute */
750 if (board_params && board_params->hs_extmute) {
751 if (gpio_is_valid(board_params->hs_extmute_gpio)) {
752 gpio_set_value(board_params->hs_extmute_gpio, 0);
753 } else {
754 hs_pop &= ~TWL4030_EXTMUTE;
755 twl4030_write(component, TWL4030_REG_HS_POPN_SET, hs_pop);
756 }
757 }
758 }
759
headsetlpga_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)760 static int headsetlpga_event(struct snd_soc_dapm_widget *w,
761 struct snd_kcontrol *kcontrol, int event)
762 {
763 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
764 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
765
766 switch (event) {
767 case SND_SOC_DAPM_POST_PMU:
768 /* Do the ramp-up only once */
769 if (!twl4030->hsr_enabled)
770 headset_ramp(component, 1);
771
772 twl4030->hsl_enabled = 1;
773 break;
774 case SND_SOC_DAPM_POST_PMD:
775 /* Do the ramp-down only if both headsetL/R is disabled */
776 if (!twl4030->hsr_enabled)
777 headset_ramp(component, 0);
778
779 twl4030->hsl_enabled = 0;
780 break;
781 }
782 return 0;
783 }
784
headsetrpga_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)785 static int headsetrpga_event(struct snd_soc_dapm_widget *w,
786 struct snd_kcontrol *kcontrol, int event)
787 {
788 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
789 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
790
791 switch (event) {
792 case SND_SOC_DAPM_POST_PMU:
793 /* Do the ramp-up only once */
794 if (!twl4030->hsl_enabled)
795 headset_ramp(component, 1);
796
797 twl4030->hsr_enabled = 1;
798 break;
799 case SND_SOC_DAPM_POST_PMD:
800 /* Do the ramp-down only if both headsetL/R is disabled */
801 if (!twl4030->hsl_enabled)
802 headset_ramp(component, 0);
803
804 twl4030->hsr_enabled = 0;
805 break;
806 }
807 return 0;
808 }
809
digimic_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)810 static int digimic_event(struct snd_soc_dapm_widget *w,
811 struct snd_kcontrol *kcontrol, int event)
812 {
813 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
814 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
815 struct twl4030_board_params *board_params = twl4030->board_params;
816
817 if (board_params && board_params->digimic_delay)
818 twl4030_wait_ms(board_params->digimic_delay);
819 return 0;
820 }
821
822 /*
823 * Some of the gain controls in TWL (mostly those which are associated with
824 * the outputs) are implemented in an interesting way:
825 * 0x0 : Power down (mute)
826 * 0x1 : 6dB
827 * 0x2 : 0 dB
828 * 0x3 : -6 dB
829 * Inverting not going to help with these.
830 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
831 */
snd_soc_get_volsw_twl4030(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)832 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
833 struct snd_ctl_elem_value *ucontrol)
834 {
835 struct soc_mixer_control *mc =
836 (struct soc_mixer_control *)kcontrol->private_value;
837 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
838 unsigned int reg = mc->reg;
839 unsigned int shift = mc->shift;
840 unsigned int rshift = mc->rshift;
841 int max = mc->max;
842 int mask = (1 << fls(max)) - 1;
843
844 ucontrol->value.integer.value[0] =
845 (twl4030_read(component, reg) >> shift) & mask;
846 if (ucontrol->value.integer.value[0])
847 ucontrol->value.integer.value[0] =
848 max + 1 - ucontrol->value.integer.value[0];
849
850 if (shift != rshift) {
851 ucontrol->value.integer.value[1] =
852 (twl4030_read(component, reg) >> rshift) & mask;
853 if (ucontrol->value.integer.value[1])
854 ucontrol->value.integer.value[1] =
855 max + 1 - ucontrol->value.integer.value[1];
856 }
857
858 return 0;
859 }
860
snd_soc_put_volsw_twl4030(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)861 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
862 struct snd_ctl_elem_value *ucontrol)
863 {
864 struct soc_mixer_control *mc =
865 (struct soc_mixer_control *)kcontrol->private_value;
866 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
867 unsigned int reg = mc->reg;
868 unsigned int shift = mc->shift;
869 unsigned int rshift = mc->rshift;
870 int max = mc->max;
871 int mask = (1 << fls(max)) - 1;
872 unsigned short val, val2, val_mask;
873
874 val = (ucontrol->value.integer.value[0] & mask);
875
876 val_mask = mask << shift;
877 if (val)
878 val = max + 1 - val;
879 val = val << shift;
880 if (shift != rshift) {
881 val2 = (ucontrol->value.integer.value[1] & mask);
882 val_mask |= mask << rshift;
883 if (val2)
884 val2 = max + 1 - val2;
885 val |= val2 << rshift;
886 }
887 return snd_soc_component_update_bits(component, reg, val_mask, val);
888 }
889
snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)890 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
891 struct snd_ctl_elem_value *ucontrol)
892 {
893 struct soc_mixer_control *mc =
894 (struct soc_mixer_control *)kcontrol->private_value;
895 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
896 unsigned int reg = mc->reg;
897 unsigned int reg2 = mc->rreg;
898 unsigned int shift = mc->shift;
899 int max = mc->max;
900 int mask = (1<<fls(max))-1;
901
902 ucontrol->value.integer.value[0] =
903 (twl4030_read(component, reg) >> shift) & mask;
904 ucontrol->value.integer.value[1] =
905 (twl4030_read(component, reg2) >> shift) & mask;
906
907 if (ucontrol->value.integer.value[0])
908 ucontrol->value.integer.value[0] =
909 max + 1 - ucontrol->value.integer.value[0];
910 if (ucontrol->value.integer.value[1])
911 ucontrol->value.integer.value[1] =
912 max + 1 - ucontrol->value.integer.value[1];
913
914 return 0;
915 }
916
snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)917 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
918 struct snd_ctl_elem_value *ucontrol)
919 {
920 struct soc_mixer_control *mc =
921 (struct soc_mixer_control *)kcontrol->private_value;
922 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
923 unsigned int reg = mc->reg;
924 unsigned int reg2 = mc->rreg;
925 unsigned int shift = mc->shift;
926 int max = mc->max;
927 int mask = (1 << fls(max)) - 1;
928 int err;
929 unsigned short val, val2, val_mask;
930
931 val_mask = mask << shift;
932 val = (ucontrol->value.integer.value[0] & mask);
933 val2 = (ucontrol->value.integer.value[1] & mask);
934
935 if (val)
936 val = max + 1 - val;
937 if (val2)
938 val2 = max + 1 - val2;
939
940 val = val << shift;
941 val2 = val2 << shift;
942
943 err = snd_soc_component_update_bits(component, reg, val_mask, val);
944 if (err < 0)
945 return err;
946
947 err = snd_soc_component_update_bits(component, reg2, val_mask, val2);
948 return err;
949 }
950
951 /* Codec operation modes */
952 static const char *twl4030_op_modes_texts[] = {
953 "Option 2 (voice/audio)", "Option 1 (audio)"
954 };
955
956 static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum,
957 TWL4030_REG_CODEC_MODE, 0,
958 twl4030_op_modes_texts);
959
snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)960 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
961 struct snd_ctl_elem_value *ucontrol)
962 {
963 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
964 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
965
966 if (twl4030->configured) {
967 dev_err(component->dev,
968 "operation mode cannot be changed on-the-fly\n");
969 return -EBUSY;
970 }
971
972 return snd_soc_put_enum_double(kcontrol, ucontrol);
973 }
974
975 /*
976 * FGAIN volume control:
977 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
978 */
979 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
980
981 /*
982 * CGAIN volume control:
983 * 0 dB to 12 dB in 6 dB steps
984 * value 2 and 3 means 12 dB
985 */
986 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
987
988 /*
989 * Voice Downlink GAIN volume control:
990 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
991 */
992 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
993
994 /*
995 * Analog playback gain
996 * -24 dB to 12 dB in 2 dB steps
997 */
998 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
999
1000 /*
1001 * Gain controls tied to outputs
1002 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1003 */
1004 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1005
1006 /*
1007 * Gain control for earpiece amplifier
1008 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1009 */
1010 static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1011
1012 /*
1013 * Capture gain after the ADCs
1014 * from 0 dB to 31 dB in 1 dB steps
1015 */
1016 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1017
1018 /*
1019 * Gain control for input amplifiers
1020 * 0 dB to 30 dB in 6 dB steps
1021 */
1022 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1023
1024 /* AVADC clock priority */
1025 static const char *twl4030_avadc_clk_priority_texts[] = {
1026 "Voice high priority", "HiFi high priority"
1027 };
1028
1029 static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum,
1030 TWL4030_REG_AVADC_CTL, 2,
1031 twl4030_avadc_clk_priority_texts);
1032
1033 static const char *twl4030_rampdelay_texts[] = {
1034 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1035 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1036 "3495/2581/1748 ms"
1037 };
1038
1039 static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum,
1040 TWL4030_REG_HS_POPN_SET, 2,
1041 twl4030_rampdelay_texts);
1042
1043 /* Vibra H-bridge direction mode */
1044 static const char *twl4030_vibradirmode_texts[] = {
1045 "Vibra H-bridge direction", "Audio data MSB",
1046 };
1047
1048 static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum,
1049 TWL4030_REG_VIBRA_CTL, 5,
1050 twl4030_vibradirmode_texts);
1051
1052 /* Vibra H-bridge direction */
1053 static const char *twl4030_vibradir_texts[] = {
1054 "Positive polarity", "Negative polarity",
1055 };
1056
1057 static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum,
1058 TWL4030_REG_VIBRA_CTL, 1,
1059 twl4030_vibradir_texts);
1060
1061 /* Digimic Left and right swapping */
1062 static const char *twl4030_digimicswap_texts[] = {
1063 "Not swapped", "Swapped",
1064 };
1065
1066 static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum,
1067 TWL4030_REG_MISC_SET_1, 0,
1068 twl4030_digimicswap_texts);
1069
1070 static const struct snd_kcontrol_new twl4030_snd_controls[] = {
1071 /* Codec operation mode control */
1072 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1073 snd_soc_get_enum_double,
1074 snd_soc_put_twl4030_opmode_enum_double),
1075
1076 /* Common playback gain controls */
1077 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1078 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1079 0, 0x3f, 0, digital_fine_tlv),
1080 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1081 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1082 0, 0x3f, 0, digital_fine_tlv),
1083
1084 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1085 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1086 6, 0x2, 0, digital_coarse_tlv),
1087 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1088 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1089 6, 0x2, 0, digital_coarse_tlv),
1090
1091 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1092 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1093 3, 0x12, 1, analog_tlv),
1094 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1095 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1096 3, 0x12, 1, analog_tlv),
1097 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1098 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1099 1, 1, 0),
1100 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1101 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1102 1, 1, 0),
1103
1104 /* Common voice downlink gain controls */
1105 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1106 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1107
1108 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1109 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1110
1111 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1112 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1113
1114 /* Separate output gain controls */
1115 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
1116 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1117 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1118 snd_soc_put_volsw_r2_twl4030, output_tvl),
1119
1120 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1121 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1122 snd_soc_put_volsw_twl4030, output_tvl),
1123
1124 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
1125 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1126 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1127 snd_soc_put_volsw_r2_twl4030, output_tvl),
1128
1129 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1130 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1131 snd_soc_put_volsw_twl4030, output_ear_tvl),
1132
1133 /* Common capture gain controls */
1134 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1135 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1136 0, 0x1f, 0, digital_capture_tlv),
1137 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1138 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1139 0, 0x1f, 0, digital_capture_tlv),
1140
1141 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
1142 0, 3, 5, 0, input_gain_tlv),
1143
1144 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1145
1146 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
1147
1148 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1149 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
1150
1151 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
1152 };
1153
1154 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
1155 /* Left channel inputs */
1156 SND_SOC_DAPM_INPUT("MAINMIC"),
1157 SND_SOC_DAPM_INPUT("HSMIC"),
1158 SND_SOC_DAPM_INPUT("AUXL"),
1159 SND_SOC_DAPM_INPUT("CARKITMIC"),
1160 /* Right channel inputs */
1161 SND_SOC_DAPM_INPUT("SUBMIC"),
1162 SND_SOC_DAPM_INPUT("AUXR"),
1163 /* Digital microphones (Stereo) */
1164 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1165 SND_SOC_DAPM_INPUT("DIGIMIC1"),
1166
1167 /* Outputs */
1168 SND_SOC_DAPM_OUTPUT("EARPIECE"),
1169 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1170 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1171 SND_SOC_DAPM_OUTPUT("HSOL"),
1172 SND_SOC_DAPM_OUTPUT("HSOR"),
1173 SND_SOC_DAPM_OUTPUT("CARKITL"),
1174 SND_SOC_DAPM_OUTPUT("CARKITR"),
1175 SND_SOC_DAPM_OUTPUT("HFL"),
1176 SND_SOC_DAPM_OUTPUT("HFR"),
1177 SND_SOC_DAPM_OUTPUT("VIBRA"),
1178
1179 /* AIF and APLL clocks for running DAIs (including loopback) */
1180 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1181 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1182 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1183
1184 /* DACs */
1185 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
1186 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
1187 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
1188 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
1189 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
1190
1191 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
1192 TWL4030_REG_VOICE_IF, 6, 0),
1193
1194 /* Analog bypasses */
1195 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1196 &twl4030_dapm_abypassr1_control),
1197 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1198 &twl4030_dapm_abypassl1_control),
1199 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1200 &twl4030_dapm_abypassr2_control),
1201 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1202 &twl4030_dapm_abypassl2_control),
1203 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1204 &twl4030_dapm_abypassv_control),
1205
1206 /* Master analog loopback switch */
1207 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1208 NULL, 0),
1209
1210 /* Digital bypasses */
1211 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1212 &twl4030_dapm_dbypassl_control),
1213 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1214 &twl4030_dapm_dbypassr_control),
1215 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1216 &twl4030_dapm_dbypassv_control),
1217
1218 /* Digital mixers, power control for the physical DACs */
1219 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1220 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1221 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1222 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1223 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1224 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1225 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1226 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1227 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1228 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1229
1230 /* Analog mixers, power control for the physical PGAs */
1231 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1232 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1233 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1234 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1235 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1236 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1237 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1238 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1239 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1240 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
1241
1242 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1243 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1244
1245 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1246 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1247
1248 /* Output MIXER controls */
1249 /* Earpiece */
1250 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1251 &twl4030_dapm_earpiece_controls[0],
1252 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
1253 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1254 0, 0, NULL, 0, earpiecepga_event,
1255 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1256 /* PreDrivL/R */
1257 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1258 &twl4030_dapm_predrivel_controls[0],
1259 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1260 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1261 0, 0, NULL, 0, predrivelpga_event,
1262 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1263 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1264 &twl4030_dapm_predriver_controls[0],
1265 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
1266 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1267 0, 0, NULL, 0, predriverpga_event,
1268 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1269 /* HeadsetL/R */
1270 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
1271 &twl4030_dapm_hsol_controls[0],
1272 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1273 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1274 0, 0, NULL, 0, headsetlpga_event,
1275 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1276 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1277 &twl4030_dapm_hsor_controls[0],
1278 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
1279 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1280 0, 0, NULL, 0, headsetrpga_event,
1281 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1282 /* CarkitL/R */
1283 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1284 &twl4030_dapm_carkitl_controls[0],
1285 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1286 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1287 0, 0, NULL, 0, carkitlpga_event,
1288 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1289 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1290 &twl4030_dapm_carkitr_controls[0],
1291 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1292 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1293 0, 0, NULL, 0, carkitrpga_event,
1294 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1295
1296 /* Output MUX controls */
1297 /* HandsfreeL/R */
1298 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1299 &twl4030_dapm_handsfreel_control),
1300 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
1301 &twl4030_dapm_handsfreelmute_control),
1302 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1303 0, 0, NULL, 0, handsfreelpga_event,
1304 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1305 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1306 &twl4030_dapm_handsfreer_control),
1307 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
1308 &twl4030_dapm_handsfreermute_control),
1309 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1310 0, 0, NULL, 0, handsfreerpga_event,
1311 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1312 /* Vibra */
1313 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1314 &twl4030_dapm_vibra_control, vibramux_event,
1315 SND_SOC_DAPM_PRE_PMU),
1316 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1317 &twl4030_dapm_vibrapath_control),
1318
1319 /* Introducing four virtual ADC, since TWL4030 have four channel for
1320 capture */
1321 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
1322 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
1323 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
1324 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
1325
1326 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
1327 TWL4030_REG_VOICE_IF, 5, 0),
1328
1329 /* Analog/Digital mic path selection.
1330 TX1 Left/Right: either analog Left/Right or Digimic0
1331 TX2 Left/Right: either analog Left/Right or Digimic1 */
1332 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1333 &twl4030_dapm_micpathtx1_control),
1334 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1335 &twl4030_dapm_micpathtx2_control),
1336
1337 /* Analog input mixers for the capture amplifiers */
1338 SND_SOC_DAPM_MIXER("Analog Left",
1339 TWL4030_REG_ANAMICL, 4, 0,
1340 &twl4030_dapm_analoglmic_controls[0],
1341 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
1342 SND_SOC_DAPM_MIXER("Analog Right",
1343 TWL4030_REG_ANAMICR, 4, 0,
1344 &twl4030_dapm_analogrmic_controls[0],
1345 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
1346
1347 SND_SOC_DAPM_PGA("ADC Physical Left",
1348 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1349 SND_SOC_DAPM_PGA("ADC Physical Right",
1350 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
1351
1352 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1353 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1354 digimic_event, SND_SOC_DAPM_POST_PMU),
1355 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1356 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1357 digimic_event, SND_SOC_DAPM_POST_PMU),
1358
1359 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1360 NULL, 0),
1361 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1362 NULL, 0),
1363
1364 /* Microphone bias */
1365 SND_SOC_DAPM_SUPPLY("Mic Bias 1",
1366 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
1367 SND_SOC_DAPM_SUPPLY("Mic Bias 2",
1368 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
1369 SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
1370 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
1371
1372 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
1373 };
1374
1375 static const struct snd_soc_dapm_route intercon[] = {
1376 /* Stream -> DAC mapping */
1377 {"DAC Right1", NULL, "HiFi Playback"},
1378 {"DAC Left1", NULL, "HiFi Playback"},
1379 {"DAC Right2", NULL, "HiFi Playback"},
1380 {"DAC Left2", NULL, "HiFi Playback"},
1381 {"DAC Voice", NULL, "VAIFIN"},
1382
1383 /* ADC -> Stream mapping */
1384 {"HiFi Capture", NULL, "ADC Virtual Left1"},
1385 {"HiFi Capture", NULL, "ADC Virtual Right1"},
1386 {"HiFi Capture", NULL, "ADC Virtual Left2"},
1387 {"HiFi Capture", NULL, "ADC Virtual Right2"},
1388 {"VAIFOUT", NULL, "ADC Virtual Left2"},
1389 {"VAIFOUT", NULL, "ADC Virtual Right2"},
1390 {"VAIFOUT", NULL, "VIF Enable"},
1391
1392 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1393 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1394 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1395 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1396 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
1397
1398 /* Supply for the digital part (APLL) */
1399 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1400
1401 {"DAC Left1", NULL, "AIF Enable"},
1402 {"DAC Right1", NULL, "AIF Enable"},
1403 {"DAC Left2", NULL, "AIF Enable"},
1404 {"DAC Right1", NULL, "AIF Enable"},
1405 {"DAC Voice", NULL, "VIF Enable"},
1406
1407 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1408 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1409
1410 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1411 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1412 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1413 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1414 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
1415
1416 /* Internal playback routings */
1417 /* Earpiece */
1418 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1419 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1420 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1421 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1422 {"Earpiece PGA", NULL, "Earpiece Mixer"},
1423 /* PreDrivL */
1424 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1425 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1426 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1427 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1428 {"PredriveL PGA", NULL, "PredriveL Mixer"},
1429 /* PreDrivR */
1430 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1431 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1432 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1433 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1434 {"PredriveR PGA", NULL, "PredriveR Mixer"},
1435 /* HeadsetL */
1436 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1437 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1438 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1439 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
1440 /* HeadsetR */
1441 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1442 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1443 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1444 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
1445 /* CarkitL */
1446 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1447 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1448 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1449 {"CarkitL PGA", NULL, "CarkitL Mixer"},
1450 /* CarkitR */
1451 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1452 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1453 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1454 {"CarkitR PGA", NULL, "CarkitR Mixer"},
1455 /* HandsfreeL */
1456 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1457 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1458 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1459 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1460 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1461 {"HandsfreeL PGA", NULL, "HandsfreeL"},
1462 /* HandsfreeR */
1463 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1464 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1465 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1466 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1467 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1468 {"HandsfreeR PGA", NULL, "HandsfreeR"},
1469 /* Vibra */
1470 {"Vibra Mux", "AudioL1", "DAC Left1"},
1471 {"Vibra Mux", "AudioR1", "DAC Right1"},
1472 {"Vibra Mux", "AudioL2", "DAC Left2"},
1473 {"Vibra Mux", "AudioR2", "DAC Right2"},
1474
1475 /* outputs */
1476 /* Must be always connected (for AIF and APLL) */
1477 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1478 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1479 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1480 {"Virtual HiFi OUT", NULL, "DAC Right2"},
1481 /* Must be always connected (for APLL) */
1482 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1483 /* Physical outputs */
1484 {"EARPIECE", NULL, "Earpiece PGA"},
1485 {"PREDRIVEL", NULL, "PredriveL PGA"},
1486 {"PREDRIVER", NULL, "PredriveR PGA"},
1487 {"HSOL", NULL, "HeadsetL PGA"},
1488 {"HSOR", NULL, "HeadsetR PGA"},
1489 {"CARKITL", NULL, "CarkitL PGA"},
1490 {"CARKITR", NULL, "CarkitR PGA"},
1491 {"HFL", NULL, "HandsfreeL PGA"},
1492 {"HFR", NULL, "HandsfreeR PGA"},
1493 {"Vibra Route", "Audio", "Vibra Mux"},
1494 {"VIBRA", NULL, "Vibra Route"},
1495
1496 /* Capture path */
1497 /* Must be always connected (for AIF and APLL) */
1498 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1499 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1500 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1501 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1502 /* Physical inputs */
1503 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1504 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1505 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1506 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1507
1508 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1509 {"Analog Right", "AUXR Capture Switch", "AUXR"},
1510
1511 {"ADC Physical Left", NULL, "Analog Left"},
1512 {"ADC Physical Right", NULL, "Analog Right"},
1513
1514 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1515 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1516
1517 {"DIGIMIC0", NULL, "micbias1 select"},
1518 {"DIGIMIC1", NULL, "micbias2 select"},
1519
1520 /* TX1 Left capture path */
1521 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1522 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1523 /* TX1 Right capture path */
1524 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1525 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1526 /* TX2 Left capture path */
1527 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1528 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1529 /* TX2 Right capture path */
1530 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1531 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1532
1533 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1534 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1535 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1536 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1537
1538 {"ADC Virtual Left1", NULL, "AIF Enable"},
1539 {"ADC Virtual Right1", NULL, "AIF Enable"},
1540 {"ADC Virtual Left2", NULL, "AIF Enable"},
1541 {"ADC Virtual Right2", NULL, "AIF Enable"},
1542
1543 /* Analog bypass routes */
1544 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1545 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1546 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1547 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1548 {"Voice Analog Loopback", "Switch", "Analog Left"},
1549
1550 /* Supply for the Analog loopbacks */
1551 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1552 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1553 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1554 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1555 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1556
1557 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1558 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1559 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1560 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
1561 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
1562
1563 /* Digital bypass routes */
1564 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1565 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1566 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1567
1568 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1569 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1570 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
1571
1572 };
1573
twl4030_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)1574 static int twl4030_set_bias_level(struct snd_soc_component *component,
1575 enum snd_soc_bias_level level)
1576 {
1577 switch (level) {
1578 case SND_SOC_BIAS_ON:
1579 break;
1580 case SND_SOC_BIAS_PREPARE:
1581 break;
1582 case SND_SOC_BIAS_STANDBY:
1583 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF)
1584 twl4030_codec_enable(component, 1);
1585 break;
1586 case SND_SOC_BIAS_OFF:
1587 twl4030_codec_enable(component, 0);
1588 break;
1589 }
1590
1591 return 0;
1592 }
1593
twl4030_constraints(struct twl4030_priv * twl4030,struct snd_pcm_substream * mst_substream)1594 static void twl4030_constraints(struct twl4030_priv *twl4030,
1595 struct snd_pcm_substream *mst_substream)
1596 {
1597 struct snd_pcm_substream *slv_substream;
1598
1599 /* Pick the stream, which need to be constrained */
1600 if (mst_substream == twl4030->master_substream)
1601 slv_substream = twl4030->slave_substream;
1602 else if (mst_substream == twl4030->slave_substream)
1603 slv_substream = twl4030->master_substream;
1604 else /* This should not happen.. */
1605 return;
1606
1607 /* Set the constraints according to the already configured stream */
1608 snd_pcm_hw_constraint_single(slv_substream->runtime,
1609 SNDRV_PCM_HW_PARAM_RATE,
1610 twl4030->rate);
1611
1612 snd_pcm_hw_constraint_single(slv_substream->runtime,
1613 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1614 twl4030->sample_bits);
1615
1616 snd_pcm_hw_constraint_single(slv_substream->runtime,
1617 SNDRV_PCM_HW_PARAM_CHANNELS,
1618 twl4030->channels);
1619 }
1620
1621 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1622 * capture has to be enabled/disabled. */
twl4030_tdm_enable(struct snd_soc_component * component,int direction,int enable)1623 static void twl4030_tdm_enable(struct snd_soc_component *component, int direction,
1624 int enable)
1625 {
1626 u8 reg, mask;
1627
1628 reg = twl4030_read(component, TWL4030_REG_OPTION);
1629
1630 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1631 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1632 else
1633 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1634
1635 if (enable)
1636 reg |= mask;
1637 else
1638 reg &= ~mask;
1639
1640 twl4030_write(component, TWL4030_REG_OPTION, reg);
1641 }
1642
twl4030_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1643 static int twl4030_startup(struct snd_pcm_substream *substream,
1644 struct snd_soc_dai *dai)
1645 {
1646 struct snd_soc_component *component = dai->component;
1647 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1648
1649 if (twl4030->master_substream) {
1650 twl4030->slave_substream = substream;
1651 /* The DAI has one configuration for playback and capture, so
1652 * if the DAI has been already configured then constrain this
1653 * substream to match it. */
1654 if (twl4030->configured)
1655 twl4030_constraints(twl4030, twl4030->master_substream);
1656 } else {
1657 if (!(twl4030_read(component, TWL4030_REG_CODEC_MODE) &
1658 TWL4030_OPTION_1)) {
1659 /* In option2 4 channel is not supported, set the
1660 * constraint for the first stream for channels, the
1661 * second stream will 'inherit' this cosntraint */
1662 snd_pcm_hw_constraint_single(substream->runtime,
1663 SNDRV_PCM_HW_PARAM_CHANNELS,
1664 2);
1665 }
1666 twl4030->master_substream = substream;
1667 }
1668
1669 return 0;
1670 }
1671
twl4030_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1672 static void twl4030_shutdown(struct snd_pcm_substream *substream,
1673 struct snd_soc_dai *dai)
1674 {
1675 struct snd_soc_component *component = dai->component;
1676 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1677
1678 if (twl4030->master_substream == substream)
1679 twl4030->master_substream = twl4030->slave_substream;
1680
1681 twl4030->slave_substream = NULL;
1682
1683 /* If all streams are closed, or the remaining stream has not yet
1684 * been configured than set the DAI as not configured. */
1685 if (!twl4030->master_substream)
1686 twl4030->configured = 0;
1687 else if (!twl4030->master_substream->runtime->channels)
1688 twl4030->configured = 0;
1689
1690 /* If the closing substream had 4 channel, do the necessary cleanup */
1691 if (substream->runtime->channels == 4)
1692 twl4030_tdm_enable(component, substream->stream, 0);
1693 }
1694
twl4030_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)1695 static int twl4030_hw_params(struct snd_pcm_substream *substream,
1696 struct snd_pcm_hw_params *params,
1697 struct snd_soc_dai *dai)
1698 {
1699 struct snd_soc_component *component = dai->component;
1700 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1701 u8 mode, old_mode, format, old_format;
1702
1703 /* If the substream has 4 channel, do the necessary setup */
1704 if (params_channels(params) == 4) {
1705 format = twl4030_read(component, TWL4030_REG_AUDIO_IF);
1706 mode = twl4030_read(component, TWL4030_REG_CODEC_MODE);
1707
1708 /* Safety check: are we in the correct operating mode and
1709 * the interface is in TDM mode? */
1710 if ((mode & TWL4030_OPTION_1) &&
1711 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
1712 twl4030_tdm_enable(component, substream->stream, 1);
1713 else
1714 return -EINVAL;
1715 }
1716
1717 if (twl4030->configured)
1718 /* Ignoring hw_params for already configured DAI */
1719 return 0;
1720
1721 /* bit rate */
1722 old_mode = twl4030_read(component,
1723 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1724 mode = old_mode & ~TWL4030_APLL_RATE;
1725
1726 switch (params_rate(params)) {
1727 case 8000:
1728 mode |= TWL4030_APLL_RATE_8000;
1729 break;
1730 case 11025:
1731 mode |= TWL4030_APLL_RATE_11025;
1732 break;
1733 case 12000:
1734 mode |= TWL4030_APLL_RATE_12000;
1735 break;
1736 case 16000:
1737 mode |= TWL4030_APLL_RATE_16000;
1738 break;
1739 case 22050:
1740 mode |= TWL4030_APLL_RATE_22050;
1741 break;
1742 case 24000:
1743 mode |= TWL4030_APLL_RATE_24000;
1744 break;
1745 case 32000:
1746 mode |= TWL4030_APLL_RATE_32000;
1747 break;
1748 case 44100:
1749 mode |= TWL4030_APLL_RATE_44100;
1750 break;
1751 case 48000:
1752 mode |= TWL4030_APLL_RATE_48000;
1753 break;
1754 case 96000:
1755 mode |= TWL4030_APLL_RATE_96000;
1756 break;
1757 default:
1758 dev_err(component->dev, "%s: unknown rate %d\n", __func__,
1759 params_rate(params));
1760 return -EINVAL;
1761 }
1762
1763 /* sample size */
1764 old_format = twl4030_read(component, TWL4030_REG_AUDIO_IF);
1765 format = old_format;
1766 format &= ~TWL4030_DATA_WIDTH;
1767 switch (params_width(params)) {
1768 case 16:
1769 format |= TWL4030_DATA_WIDTH_16S_16W;
1770 break;
1771 case 32:
1772 format |= TWL4030_DATA_WIDTH_32S_24W;
1773 break;
1774 default:
1775 dev_err(component->dev, "%s: unsupported bits/sample %d\n",
1776 __func__, params_width(params));
1777 return -EINVAL;
1778 }
1779
1780 if (format != old_format || mode != old_mode) {
1781 if (twl4030->codec_powered) {
1782 /*
1783 * If the codec is powered, than we need to toggle the
1784 * codec power.
1785 */
1786 twl4030_codec_enable(component, 0);
1787 twl4030_write(component, TWL4030_REG_CODEC_MODE, mode);
1788 twl4030_write(component, TWL4030_REG_AUDIO_IF, format);
1789 twl4030_codec_enable(component, 1);
1790 } else {
1791 twl4030_write(component, TWL4030_REG_CODEC_MODE, mode);
1792 twl4030_write(component, TWL4030_REG_AUDIO_IF, format);
1793 }
1794 }
1795
1796 /* Store the important parameters for the DAI configuration and set
1797 * the DAI as configured */
1798 twl4030->configured = 1;
1799 twl4030->rate = params_rate(params);
1800 twl4030->sample_bits = hw_param_interval(params,
1801 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1802 twl4030->channels = params_channels(params);
1803
1804 /* If both playback and capture streams are open, and one of them
1805 * is setting the hw parameters right now (since we are here), set
1806 * constraints to the other stream to match the current one. */
1807 if (twl4030->slave_substream)
1808 twl4030_constraints(twl4030, substream);
1809
1810 return 0;
1811 }
1812
twl4030_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)1813 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
1814 unsigned int freq, int dir)
1815 {
1816 struct snd_soc_component *component = codec_dai->component;
1817 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1818
1819 switch (freq) {
1820 case 19200000:
1821 case 26000000:
1822 case 38400000:
1823 break;
1824 default:
1825 dev_err(component->dev, "Unsupported HFCLKIN: %u\n", freq);
1826 return -EINVAL;
1827 }
1828
1829 if ((freq / 1000) != twl4030->sysclk) {
1830 dev_err(component->dev,
1831 "Mismatch in HFCLKIN: %u (configured: %u)\n",
1832 freq, twl4030->sysclk * 1000);
1833 return -EINVAL;
1834 }
1835
1836 return 0;
1837 }
1838
twl4030_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)1839 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
1840 {
1841 struct snd_soc_component *component = codec_dai->component;
1842 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1843 u8 old_format, format;
1844
1845 /* get format */
1846 old_format = twl4030_read(component, TWL4030_REG_AUDIO_IF);
1847 format = old_format;
1848
1849 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
1850 case SND_SOC_DAIFMT_CBP_CFP:
1851 format &= ~(TWL4030_AIF_SLAVE_EN);
1852 format &= ~(TWL4030_CLK256FS_EN);
1853 break;
1854 case SND_SOC_DAIFMT_CBC_CFC:
1855 format |= TWL4030_AIF_SLAVE_EN;
1856 format |= TWL4030_CLK256FS_EN;
1857 break;
1858 default:
1859 return -EINVAL;
1860 }
1861
1862 /* interface format */
1863 format &= ~TWL4030_AIF_FORMAT;
1864 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1865 case SND_SOC_DAIFMT_I2S:
1866 format |= TWL4030_AIF_FORMAT_CODEC;
1867 break;
1868 case SND_SOC_DAIFMT_DSP_A:
1869 format |= TWL4030_AIF_FORMAT_TDM;
1870 break;
1871 default:
1872 return -EINVAL;
1873 }
1874
1875 if (format != old_format) {
1876 if (twl4030->codec_powered) {
1877 /*
1878 * If the codec is powered, than we need to toggle the
1879 * codec power.
1880 */
1881 twl4030_codec_enable(component, 0);
1882 twl4030_write(component, TWL4030_REG_AUDIO_IF, format);
1883 twl4030_codec_enable(component, 1);
1884 } else {
1885 twl4030_write(component, TWL4030_REG_AUDIO_IF, format);
1886 }
1887 }
1888
1889 return 0;
1890 }
1891
twl4030_set_tristate(struct snd_soc_dai * dai,int tristate)1892 static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1893 {
1894 struct snd_soc_component *component = dai->component;
1895 u8 reg = twl4030_read(component, TWL4030_REG_AUDIO_IF);
1896
1897 if (tristate)
1898 reg |= TWL4030_AIF_TRI_EN;
1899 else
1900 reg &= ~TWL4030_AIF_TRI_EN;
1901
1902 return twl4030_write(component, TWL4030_REG_AUDIO_IF, reg);
1903 }
1904
1905 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1906 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
twl4030_voice_enable(struct snd_soc_component * component,int direction,int enable)1907 static void twl4030_voice_enable(struct snd_soc_component *component, int direction,
1908 int enable)
1909 {
1910 u8 reg, mask;
1911
1912 reg = twl4030_read(component, TWL4030_REG_OPTION);
1913
1914 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1915 mask = TWL4030_ARXL1_VRX_EN;
1916 else
1917 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1918
1919 if (enable)
1920 reg |= mask;
1921 else
1922 reg &= ~mask;
1923
1924 twl4030_write(component, TWL4030_REG_OPTION, reg);
1925 }
1926
twl4030_voice_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1927 static int twl4030_voice_startup(struct snd_pcm_substream *substream,
1928 struct snd_soc_dai *dai)
1929 {
1930 struct snd_soc_component *component = dai->component;
1931 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1932 u8 mode;
1933
1934 /* If the system master clock is not 26MHz, the voice PCM interface is
1935 * not available.
1936 */
1937 if (twl4030->sysclk != 26000) {
1938 dev_err(component->dev,
1939 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
1940 __func__, twl4030->sysclk);
1941 return -EINVAL;
1942 }
1943
1944 /* If the codec mode is not option2, the voice PCM interface is not
1945 * available.
1946 */
1947 mode = twl4030_read(component, TWL4030_REG_CODEC_MODE)
1948 & TWL4030_OPT_MODE;
1949
1950 if (mode != TWL4030_OPTION_2) {
1951 dev_err(component->dev, "%s: the codec mode is not option2\n",
1952 __func__);
1953 return -EINVAL;
1954 }
1955
1956 return 0;
1957 }
1958
twl4030_voice_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1959 static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
1960 struct snd_soc_dai *dai)
1961 {
1962 struct snd_soc_component *component = dai->component;
1963
1964 /* Enable voice digital filters */
1965 twl4030_voice_enable(component, substream->stream, 0);
1966 }
1967
twl4030_voice_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)1968 static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
1969 struct snd_pcm_hw_params *params,
1970 struct snd_soc_dai *dai)
1971 {
1972 struct snd_soc_component *component = dai->component;
1973 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
1974 u8 old_mode, mode;
1975
1976 /* Enable voice digital filters */
1977 twl4030_voice_enable(component, substream->stream, 1);
1978
1979 /* bit rate */
1980 old_mode = twl4030_read(component,
1981 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1982 mode = old_mode;
1983
1984 switch (params_rate(params)) {
1985 case 8000:
1986 mode &= ~(TWL4030_SEL_16K);
1987 break;
1988 case 16000:
1989 mode |= TWL4030_SEL_16K;
1990 break;
1991 default:
1992 dev_err(component->dev, "%s: unknown rate %d\n", __func__,
1993 params_rate(params));
1994 return -EINVAL;
1995 }
1996
1997 if (mode != old_mode) {
1998 if (twl4030->codec_powered) {
1999 /*
2000 * If the codec is powered, than we need to toggle the
2001 * codec power.
2002 */
2003 twl4030_codec_enable(component, 0);
2004 twl4030_write(component, TWL4030_REG_CODEC_MODE, mode);
2005 twl4030_codec_enable(component, 1);
2006 } else {
2007 twl4030_write(component, TWL4030_REG_CODEC_MODE, mode);
2008 }
2009 }
2010
2011 return 0;
2012 }
2013
twl4030_voice_set_dai_sysclk(struct snd_soc_dai * codec_dai,int clk_id,unsigned int freq,int dir)2014 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2015 int clk_id, unsigned int freq, int dir)
2016 {
2017 struct snd_soc_component *component = codec_dai->component;
2018 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
2019
2020 if (freq != 26000000) {
2021 dev_err(component->dev,
2022 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
2023 __func__, freq / 1000);
2024 return -EINVAL;
2025 }
2026 if ((freq / 1000) != twl4030->sysclk) {
2027 dev_err(component->dev,
2028 "Mismatch in HFCLKIN: %u (configured: %u)\n",
2029 freq, twl4030->sysclk * 1000);
2030 return -EINVAL;
2031 }
2032 return 0;
2033 }
2034
twl4030_voice_set_dai_fmt(struct snd_soc_dai * codec_dai,unsigned int fmt)2035 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2036 unsigned int fmt)
2037 {
2038 struct snd_soc_component *component = codec_dai->component;
2039 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
2040 u8 old_format, format;
2041
2042 /* get format */
2043 old_format = twl4030_read(component, TWL4030_REG_VOICE_IF);
2044 format = old_format;
2045
2046 switch (fmt & SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK) {
2047 case SND_SOC_DAIFMT_CBP_CFP:
2048 format &= ~(TWL4030_VIF_SLAVE_EN);
2049 break;
2050 case SND_SOC_DAIFMT_CBS_CFS:
2051 format |= TWL4030_VIF_SLAVE_EN;
2052 break;
2053 default:
2054 return -EINVAL;
2055 }
2056
2057 /* clock inversion */
2058 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2059 case SND_SOC_DAIFMT_IB_NF:
2060 format &= ~(TWL4030_VIF_FORMAT);
2061 break;
2062 case SND_SOC_DAIFMT_NB_IF:
2063 format |= TWL4030_VIF_FORMAT;
2064 break;
2065 default:
2066 return -EINVAL;
2067 }
2068
2069 if (format != old_format) {
2070 if (twl4030->codec_powered) {
2071 /*
2072 * If the codec is powered, than we need to toggle the
2073 * codec power.
2074 */
2075 twl4030_codec_enable(component, 0);
2076 twl4030_write(component, TWL4030_REG_VOICE_IF, format);
2077 twl4030_codec_enable(component, 1);
2078 } else {
2079 twl4030_write(component, TWL4030_REG_VOICE_IF, format);
2080 }
2081 }
2082
2083 return 0;
2084 }
2085
twl4030_voice_set_tristate(struct snd_soc_dai * dai,int tristate)2086 static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2087 {
2088 struct snd_soc_component *component = dai->component;
2089 u8 reg = twl4030_read(component, TWL4030_REG_VOICE_IF);
2090
2091 if (tristate)
2092 reg |= TWL4030_VIF_TRI_EN;
2093 else
2094 reg &= ~TWL4030_VIF_TRI_EN;
2095
2096 return twl4030_write(component, TWL4030_REG_VOICE_IF, reg);
2097 }
2098
2099 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
2100 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2101
2102 static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
2103 .startup = twl4030_startup,
2104 .shutdown = twl4030_shutdown,
2105 .hw_params = twl4030_hw_params,
2106 .set_sysclk = twl4030_set_dai_sysclk,
2107 .set_fmt = twl4030_set_dai_fmt,
2108 .set_tristate = twl4030_set_tristate,
2109 };
2110
2111 static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2112 .startup = twl4030_voice_startup,
2113 .shutdown = twl4030_voice_shutdown,
2114 .hw_params = twl4030_voice_hw_params,
2115 .set_sysclk = twl4030_voice_set_dai_sysclk,
2116 .set_fmt = twl4030_voice_set_dai_fmt,
2117 .set_tristate = twl4030_voice_set_tristate,
2118 };
2119
2120 static struct snd_soc_dai_driver twl4030_dai[] = {
2121 {
2122 .name = "twl4030-hifi",
2123 .playback = {
2124 .stream_name = "HiFi Playback",
2125 .channels_min = 2,
2126 .channels_max = 4,
2127 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
2128 .formats = TWL4030_FORMATS,
2129 .sig_bits = 24,},
2130 .capture = {
2131 .stream_name = "HiFi Capture",
2132 .channels_min = 2,
2133 .channels_max = 4,
2134 .rates = TWL4030_RATES,
2135 .formats = TWL4030_FORMATS,
2136 .sig_bits = 24,},
2137 .ops = &twl4030_dai_hifi_ops,
2138 },
2139 {
2140 .name = "twl4030-voice",
2141 .playback = {
2142 .stream_name = "Voice Playback",
2143 .channels_min = 1,
2144 .channels_max = 1,
2145 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2146 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2147 .capture = {
2148 .stream_name = "Voice Capture",
2149 .channels_min = 1,
2150 .channels_max = 2,
2151 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2152 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2153 .ops = &twl4030_dai_voice_ops,
2154 },
2155 };
2156
twl4030_soc_probe(struct snd_soc_component * component)2157 static int twl4030_soc_probe(struct snd_soc_component *component)
2158 {
2159 struct twl4030_priv *twl4030;
2160
2161 twl4030 = devm_kzalloc(component->dev, sizeof(struct twl4030_priv),
2162 GFP_KERNEL);
2163 if (!twl4030)
2164 return -ENOMEM;
2165 snd_soc_component_set_drvdata(component, twl4030);
2166 /* Set the defaults, and power up the codec */
2167 twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
2168
2169 twl4030_init_chip(component);
2170
2171 return 0;
2172 }
2173
twl4030_soc_remove(struct snd_soc_component * component)2174 static void twl4030_soc_remove(struct snd_soc_component *component)
2175 {
2176 struct twl4030_priv *twl4030 = snd_soc_component_get_drvdata(component);
2177 struct twl4030_board_params *board_params = twl4030->board_params;
2178
2179 if (board_params && board_params->hs_extmute &&
2180 gpio_is_valid(board_params->hs_extmute_gpio))
2181 gpio_free(board_params->hs_extmute_gpio);
2182 }
2183
2184 static const struct snd_soc_component_driver soc_component_dev_twl4030 = {
2185 .probe = twl4030_soc_probe,
2186 .remove = twl4030_soc_remove,
2187 .read = twl4030_read,
2188 .write = twl4030_write,
2189 .set_bias_level = twl4030_set_bias_level,
2190 .controls = twl4030_snd_controls,
2191 .num_controls = ARRAY_SIZE(twl4030_snd_controls),
2192 .dapm_widgets = twl4030_dapm_widgets,
2193 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
2194 .dapm_routes = intercon,
2195 .num_dapm_routes = ARRAY_SIZE(intercon),
2196 .use_pmdown_time = 1,
2197 .endianness = 1,
2198 };
2199
twl4030_codec_probe(struct platform_device * pdev)2200 static int twl4030_codec_probe(struct platform_device *pdev)
2201 {
2202 return devm_snd_soc_register_component(&pdev->dev,
2203 &soc_component_dev_twl4030,
2204 twl4030_dai, ARRAY_SIZE(twl4030_dai));
2205 }
2206
2207 MODULE_ALIAS("platform:twl4030-codec");
2208
2209 static struct platform_driver twl4030_codec_driver = {
2210 .probe = twl4030_codec_probe,
2211 .driver = {
2212 .name = "twl4030-codec",
2213 },
2214 };
2215
2216 module_platform_driver(twl4030_codec_driver);
2217
2218 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2219 MODULE_AUTHOR("Steve Sakoman");
2220 MODULE_LICENSE("GPL");
2221