1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /***************************************************************************
3 *
4 * Copyright (C) 2004-2008 SMSC
5 * Copyright (C) 2005-2008 ARM
6 *
7 ***************************************************************************
8 * Rewritten, heavily based on smsc911x simple driver by SMSC.
9 * Partly uses io macros from smc91x.c by Nicolas Pitre
10 *
11 * Supported devices:
12 * LAN9115, LAN9116, LAN9117, LAN9118
13 * LAN9215, LAN9216, LAN9217, LAN9218
14 * LAN9210, LAN9211
15 * LAN9220, LAN9221
16 * LAN89218,LAN9250
17 */
18
19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
21 #include <linux/crc32.h>
22 #include <linux/clk.h>
23 #include <linux/delay.h>
24 #include <linux/errno.h>
25 #include <linux/etherdevice.h>
26 #include <linux/ethtool.h>
27 #include <linux/init.h>
28 #include <linux/interrupt.h>
29 #include <linux/ioport.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/netdevice.h>
33 #include <linux/platform_device.h>
34 #include <linux/regulator/consumer.h>
35 #include <linux/sched.h>
36 #include <linux/timer.h>
37 #include <linux/bug.h>
38 #include <linux/bitops.h>
39 #include <linux/irq.h>
40 #include <linux/io.h>
41 #include <linux/swab.h>
42 #include <linux/phy.h>
43 #include <linux/smsc911x.h>
44 #include <linux/device.h>
45 #include <linux/of.h>
46 #include <linux/of_device.h>
47 #include <linux/of_gpio.h>
48 #include <linux/of_net.h>
49 #include <linux/acpi.h>
50 #include <linux/pm_runtime.h>
51 #include <linux/property.h>
52 #include <linux/gpio/consumer.h>
53
54 #include "smsc911x.h"
55
56 #define SMSC_CHIPNAME "smsc911x"
57 #define SMSC_MDIONAME "smsc911x-mdio"
58 #define SMSC_DRV_VERSION "2008-10-21"
59
60 MODULE_LICENSE("GPL");
61 MODULE_VERSION(SMSC_DRV_VERSION);
62 MODULE_ALIAS("platform:smsc911x");
63
64 #if USE_DEBUG > 0
65 static int debug = 16;
66 #else
67 static int debug = 3;
68 #endif
69
70 module_param(debug, int, 0);
71 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
72
73 struct smsc911x_data;
74
75 struct smsc911x_ops {
76 u32 (*reg_read)(struct smsc911x_data *pdata, u32 reg);
77 void (*reg_write)(struct smsc911x_data *pdata, u32 reg, u32 val);
78 void (*rx_readfifo)(struct smsc911x_data *pdata,
79 unsigned int *buf, unsigned int wordcount);
80 void (*tx_writefifo)(struct smsc911x_data *pdata,
81 unsigned int *buf, unsigned int wordcount);
82 };
83
84 #define SMSC911X_NUM_SUPPLIES 2
85
86 struct smsc911x_data {
87 void __iomem *ioaddr;
88
89 unsigned int idrev;
90
91 /* used to decide which workarounds apply */
92 unsigned int generation;
93
94 /* device configuration (copied from platform_data during probe) */
95 struct smsc911x_platform_config config;
96
97 /* This needs to be acquired before calling any of below:
98 * smsc911x_mac_read(), smsc911x_mac_write()
99 */
100 spinlock_t mac_lock;
101
102 /* spinlock to ensure register accesses are serialised */
103 spinlock_t dev_lock;
104
105 struct mii_bus *mii_bus;
106 unsigned int using_extphy;
107 int last_duplex;
108 int last_carrier;
109
110 u32 msg_enable;
111 unsigned int gpio_setting;
112 unsigned int gpio_orig_setting;
113 struct net_device *dev;
114 struct napi_struct napi;
115
116 unsigned int software_irq_signal;
117
118 #ifdef USE_PHY_WORK_AROUND
119 #define MIN_PACKET_SIZE (64)
120 char loopback_tx_pkt[MIN_PACKET_SIZE];
121 char loopback_rx_pkt[MIN_PACKET_SIZE];
122 unsigned int resetcount;
123 #endif
124
125 /* Members for Multicast filter workaround */
126 unsigned int multicast_update_pending;
127 unsigned int set_bits_mask;
128 unsigned int clear_bits_mask;
129 unsigned int hashhi;
130 unsigned int hashlo;
131
132 /* register access functions */
133 const struct smsc911x_ops *ops;
134
135 /* regulators */
136 struct regulator_bulk_data supplies[SMSC911X_NUM_SUPPLIES];
137
138 /* Reset GPIO */
139 struct gpio_desc *reset_gpiod;
140
141 /* clock */
142 struct clk *clk;
143 };
144
145 /* Easy access to information */
146 #define __smsc_shift(pdata, reg) ((reg) << ((pdata)->config.shift))
147
__smsc911x_reg_read(struct smsc911x_data * pdata,u32 reg)148 static inline u32 __smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
149 {
150 if (pdata->config.flags & SMSC911X_USE_32BIT)
151 return readl(pdata->ioaddr + reg);
152
153 if (pdata->config.flags & SMSC911X_USE_16BIT)
154 return ((readw(pdata->ioaddr + reg) & 0xFFFF) |
155 ((readw(pdata->ioaddr + reg + 2) & 0xFFFF) << 16));
156
157 BUG();
158 return 0;
159 }
160
161 static inline u32
__smsc911x_reg_read_shift(struct smsc911x_data * pdata,u32 reg)162 __smsc911x_reg_read_shift(struct smsc911x_data *pdata, u32 reg)
163 {
164 if (pdata->config.flags & SMSC911X_USE_32BIT)
165 return readl(pdata->ioaddr + __smsc_shift(pdata, reg));
166
167 if (pdata->config.flags & SMSC911X_USE_16BIT)
168 return (readw(pdata->ioaddr +
169 __smsc_shift(pdata, reg)) & 0xFFFF) |
170 ((readw(pdata->ioaddr +
171 __smsc_shift(pdata, reg + 2)) & 0xFFFF) << 16);
172
173 BUG();
174 return 0;
175 }
176
smsc911x_reg_read(struct smsc911x_data * pdata,u32 reg)177 static inline u32 smsc911x_reg_read(struct smsc911x_data *pdata, u32 reg)
178 {
179 u32 data;
180 unsigned long flags;
181
182 spin_lock_irqsave(&pdata->dev_lock, flags);
183 data = pdata->ops->reg_read(pdata, reg);
184 spin_unlock_irqrestore(&pdata->dev_lock, flags);
185
186 return data;
187 }
188
__smsc911x_reg_write(struct smsc911x_data * pdata,u32 reg,u32 val)189 static inline void __smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
190 u32 val)
191 {
192 if (pdata->config.flags & SMSC911X_USE_32BIT) {
193 writel(val, pdata->ioaddr + reg);
194 return;
195 }
196
197 if (pdata->config.flags & SMSC911X_USE_16BIT) {
198 writew(val & 0xFFFF, pdata->ioaddr + reg);
199 writew((val >> 16) & 0xFFFF, pdata->ioaddr + reg + 2);
200 return;
201 }
202
203 BUG();
204 }
205
206 static inline void
__smsc911x_reg_write_shift(struct smsc911x_data * pdata,u32 reg,u32 val)207 __smsc911x_reg_write_shift(struct smsc911x_data *pdata, u32 reg, u32 val)
208 {
209 if (pdata->config.flags & SMSC911X_USE_32BIT) {
210 writel(val, pdata->ioaddr + __smsc_shift(pdata, reg));
211 return;
212 }
213
214 if (pdata->config.flags & SMSC911X_USE_16BIT) {
215 writew(val & 0xFFFF,
216 pdata->ioaddr + __smsc_shift(pdata, reg));
217 writew((val >> 16) & 0xFFFF,
218 pdata->ioaddr + __smsc_shift(pdata, reg + 2));
219 return;
220 }
221
222 BUG();
223 }
224
smsc911x_reg_write(struct smsc911x_data * pdata,u32 reg,u32 val)225 static inline void smsc911x_reg_write(struct smsc911x_data *pdata, u32 reg,
226 u32 val)
227 {
228 unsigned long flags;
229
230 spin_lock_irqsave(&pdata->dev_lock, flags);
231 pdata->ops->reg_write(pdata, reg, val);
232 spin_unlock_irqrestore(&pdata->dev_lock, flags);
233 }
234
235 /* Writes a packet to the TX_DATA_FIFO */
236 static inline void
smsc911x_tx_writefifo(struct smsc911x_data * pdata,unsigned int * buf,unsigned int wordcount)237 smsc911x_tx_writefifo(struct smsc911x_data *pdata, unsigned int *buf,
238 unsigned int wordcount)
239 {
240 unsigned long flags;
241
242 spin_lock_irqsave(&pdata->dev_lock, flags);
243
244 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
245 while (wordcount--)
246 __smsc911x_reg_write(pdata, TX_DATA_FIFO,
247 swab32(*buf++));
248 goto out;
249 }
250
251 if (pdata->config.flags & SMSC911X_USE_32BIT) {
252 iowrite32_rep(pdata->ioaddr + TX_DATA_FIFO, buf, wordcount);
253 goto out;
254 }
255
256 if (pdata->config.flags & SMSC911X_USE_16BIT) {
257 while (wordcount--)
258 __smsc911x_reg_write(pdata, TX_DATA_FIFO, *buf++);
259 goto out;
260 }
261
262 BUG();
263 out:
264 spin_unlock_irqrestore(&pdata->dev_lock, flags);
265 }
266
267 /* Writes a packet to the TX_DATA_FIFO - shifted version */
268 static inline void
smsc911x_tx_writefifo_shift(struct smsc911x_data * pdata,unsigned int * buf,unsigned int wordcount)269 smsc911x_tx_writefifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
270 unsigned int wordcount)
271 {
272 unsigned long flags;
273
274 spin_lock_irqsave(&pdata->dev_lock, flags);
275
276 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
277 while (wordcount--)
278 __smsc911x_reg_write_shift(pdata, TX_DATA_FIFO,
279 swab32(*buf++));
280 goto out;
281 }
282
283 if (pdata->config.flags & SMSC911X_USE_32BIT) {
284 iowrite32_rep(pdata->ioaddr + __smsc_shift(pdata,
285 TX_DATA_FIFO), buf, wordcount);
286 goto out;
287 }
288
289 if (pdata->config.flags & SMSC911X_USE_16BIT) {
290 while (wordcount--)
291 __smsc911x_reg_write_shift(pdata,
292 TX_DATA_FIFO, *buf++);
293 goto out;
294 }
295
296 BUG();
297 out:
298 spin_unlock_irqrestore(&pdata->dev_lock, flags);
299 }
300
301 /* Reads a packet out of the RX_DATA_FIFO */
302 static inline void
smsc911x_rx_readfifo(struct smsc911x_data * pdata,unsigned int * buf,unsigned int wordcount)303 smsc911x_rx_readfifo(struct smsc911x_data *pdata, unsigned int *buf,
304 unsigned int wordcount)
305 {
306 unsigned long flags;
307
308 spin_lock_irqsave(&pdata->dev_lock, flags);
309
310 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
311 while (wordcount--)
312 *buf++ = swab32(__smsc911x_reg_read(pdata,
313 RX_DATA_FIFO));
314 goto out;
315 }
316
317 if (pdata->config.flags & SMSC911X_USE_32BIT) {
318 ioread32_rep(pdata->ioaddr + RX_DATA_FIFO, buf, wordcount);
319 goto out;
320 }
321
322 if (pdata->config.flags & SMSC911X_USE_16BIT) {
323 while (wordcount--)
324 *buf++ = __smsc911x_reg_read(pdata, RX_DATA_FIFO);
325 goto out;
326 }
327
328 BUG();
329 out:
330 spin_unlock_irqrestore(&pdata->dev_lock, flags);
331 }
332
333 /* Reads a packet out of the RX_DATA_FIFO - shifted version */
334 static inline void
smsc911x_rx_readfifo_shift(struct smsc911x_data * pdata,unsigned int * buf,unsigned int wordcount)335 smsc911x_rx_readfifo_shift(struct smsc911x_data *pdata, unsigned int *buf,
336 unsigned int wordcount)
337 {
338 unsigned long flags;
339
340 spin_lock_irqsave(&pdata->dev_lock, flags);
341
342 if (pdata->config.flags & SMSC911X_SWAP_FIFO) {
343 while (wordcount--)
344 *buf++ = swab32(__smsc911x_reg_read_shift(pdata,
345 RX_DATA_FIFO));
346 goto out;
347 }
348
349 if (pdata->config.flags & SMSC911X_USE_32BIT) {
350 ioread32_rep(pdata->ioaddr + __smsc_shift(pdata,
351 RX_DATA_FIFO), buf, wordcount);
352 goto out;
353 }
354
355 if (pdata->config.flags & SMSC911X_USE_16BIT) {
356 while (wordcount--)
357 *buf++ = __smsc911x_reg_read_shift(pdata,
358 RX_DATA_FIFO);
359 goto out;
360 }
361
362 BUG();
363 out:
364 spin_unlock_irqrestore(&pdata->dev_lock, flags);
365 }
366
367 /*
368 * enable regulator and clock resources.
369 */
smsc911x_enable_resources(struct platform_device * pdev)370 static int smsc911x_enable_resources(struct platform_device *pdev)
371 {
372 struct net_device *ndev = platform_get_drvdata(pdev);
373 struct smsc911x_data *pdata = netdev_priv(ndev);
374 int ret = 0;
375
376 ret = regulator_bulk_enable(ARRAY_SIZE(pdata->supplies),
377 pdata->supplies);
378 if (ret)
379 netdev_err(ndev, "failed to enable regulators %d\n",
380 ret);
381
382 if (!IS_ERR(pdata->clk)) {
383 ret = clk_prepare_enable(pdata->clk);
384 if (ret < 0)
385 netdev_err(ndev, "failed to enable clock %d\n", ret);
386 }
387
388 return ret;
389 }
390
391 /*
392 * disable resources, currently just regulators.
393 */
smsc911x_disable_resources(struct platform_device * pdev)394 static int smsc911x_disable_resources(struct platform_device *pdev)
395 {
396 struct net_device *ndev = platform_get_drvdata(pdev);
397 struct smsc911x_data *pdata = netdev_priv(ndev);
398 int ret = 0;
399
400 ret = regulator_bulk_disable(ARRAY_SIZE(pdata->supplies),
401 pdata->supplies);
402
403 if (!IS_ERR(pdata->clk))
404 clk_disable_unprepare(pdata->clk);
405
406 return ret;
407 }
408
409 /*
410 * Request resources, currently just regulators.
411 *
412 * The SMSC911x has two power pins: vddvario and vdd33a, in designs where
413 * these are not always-on we need to request regulators to be turned on
414 * before we can try to access the device registers.
415 */
smsc911x_request_resources(struct platform_device * pdev)416 static int smsc911x_request_resources(struct platform_device *pdev)
417 {
418 struct net_device *ndev = platform_get_drvdata(pdev);
419 struct smsc911x_data *pdata = netdev_priv(ndev);
420 int ret = 0;
421
422 /* Request regulators */
423 pdata->supplies[0].supply = "vdd33a";
424 pdata->supplies[1].supply = "vddvario";
425 ret = regulator_bulk_get(&pdev->dev,
426 ARRAY_SIZE(pdata->supplies),
427 pdata->supplies);
428 if (ret) {
429 /*
430 * Retry on deferrals, else just report the error
431 * and try to continue.
432 */
433 if (ret == -EPROBE_DEFER)
434 return ret;
435 netdev_err(ndev, "couldn't get regulators %d\n",
436 ret);
437 }
438
439 /* Request optional RESET GPIO */
440 pdata->reset_gpiod = devm_gpiod_get_optional(&pdev->dev,
441 "reset",
442 GPIOD_OUT_LOW);
443
444 /* Request clock */
445 pdata->clk = clk_get(&pdev->dev, NULL);
446 if (IS_ERR(pdata->clk))
447 dev_dbg(&pdev->dev, "couldn't get clock %li\n",
448 PTR_ERR(pdata->clk));
449
450 return ret;
451 }
452
453 /*
454 * Free resources, currently just regulators.
455 *
456 */
smsc911x_free_resources(struct platform_device * pdev)457 static void smsc911x_free_resources(struct platform_device *pdev)
458 {
459 struct net_device *ndev = platform_get_drvdata(pdev);
460 struct smsc911x_data *pdata = netdev_priv(ndev);
461
462 /* Free regulators */
463 regulator_bulk_free(ARRAY_SIZE(pdata->supplies),
464 pdata->supplies);
465
466 /* Free clock */
467 if (!IS_ERR(pdata->clk)) {
468 clk_put(pdata->clk);
469 pdata->clk = NULL;
470 }
471 }
472
473 /* waits for MAC not busy, with timeout. Only called by smsc911x_mac_read
474 * and smsc911x_mac_write, so assumes mac_lock is held */
smsc911x_mac_complete(struct smsc911x_data * pdata)475 static int smsc911x_mac_complete(struct smsc911x_data *pdata)
476 {
477 int i;
478 u32 val;
479
480 SMSC_ASSERT_MAC_LOCK(pdata);
481
482 for (i = 0; i < 40; i++) {
483 val = smsc911x_reg_read(pdata, MAC_CSR_CMD);
484 if (!(val & MAC_CSR_CMD_CSR_BUSY_))
485 return 0;
486 }
487 SMSC_WARN(pdata, hw, "Timed out waiting for MAC not BUSY. "
488 "MAC_CSR_CMD: 0x%08X", val);
489 return -EIO;
490 }
491
492 /* Fetches a MAC register value. Assumes mac_lock is acquired */
smsc911x_mac_read(struct smsc911x_data * pdata,unsigned int offset)493 static u32 smsc911x_mac_read(struct smsc911x_data *pdata, unsigned int offset)
494 {
495 unsigned int temp;
496
497 SMSC_ASSERT_MAC_LOCK(pdata);
498
499 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
500 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
501 SMSC_WARN(pdata, hw, "MAC busy at entry");
502 return 0xFFFFFFFF;
503 }
504
505 /* Send the MAC cmd */
506 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
507 MAC_CSR_CMD_CSR_BUSY_ | MAC_CSR_CMD_R_NOT_W_));
508
509 /* Workaround for hardware read-after-write restriction */
510 temp = smsc911x_reg_read(pdata, BYTE_TEST);
511
512 /* Wait for the read to complete */
513 if (likely(smsc911x_mac_complete(pdata) == 0))
514 return smsc911x_reg_read(pdata, MAC_CSR_DATA);
515
516 SMSC_WARN(pdata, hw, "MAC busy after read");
517 return 0xFFFFFFFF;
518 }
519
520 /* Set a mac register, mac_lock must be acquired before calling */
smsc911x_mac_write(struct smsc911x_data * pdata,unsigned int offset,u32 val)521 static void smsc911x_mac_write(struct smsc911x_data *pdata,
522 unsigned int offset, u32 val)
523 {
524 unsigned int temp;
525
526 SMSC_ASSERT_MAC_LOCK(pdata);
527
528 temp = smsc911x_reg_read(pdata, MAC_CSR_CMD);
529 if (unlikely(temp & MAC_CSR_CMD_CSR_BUSY_)) {
530 SMSC_WARN(pdata, hw,
531 "smsc911x_mac_write failed, MAC busy at entry");
532 return;
533 }
534
535 /* Send data to write */
536 smsc911x_reg_write(pdata, MAC_CSR_DATA, val);
537
538 /* Write the actual data */
539 smsc911x_reg_write(pdata, MAC_CSR_CMD, ((offset & 0xFF) |
540 MAC_CSR_CMD_CSR_BUSY_));
541
542 /* Workaround for hardware read-after-write restriction */
543 temp = smsc911x_reg_read(pdata, BYTE_TEST);
544
545 /* Wait for the write to complete */
546 if (likely(smsc911x_mac_complete(pdata) == 0))
547 return;
548
549 SMSC_WARN(pdata, hw, "smsc911x_mac_write failed, MAC busy after write");
550 }
551
552 /* Get a phy register */
smsc911x_mii_read(struct mii_bus * bus,int phyaddr,int regidx)553 static int smsc911x_mii_read(struct mii_bus *bus, int phyaddr, int regidx)
554 {
555 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
556 unsigned long flags;
557 unsigned int addr;
558 int i, reg;
559
560 pm_runtime_get_sync(bus->parent);
561 spin_lock_irqsave(&pdata->mac_lock, flags);
562
563 /* Confirm MII not busy */
564 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
565 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_read???");
566 reg = -EIO;
567 goto out;
568 }
569
570 /* Set the address, index & direction (read from PHY) */
571 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6);
572 smsc911x_mac_write(pdata, MII_ACC, addr);
573
574 /* Wait for read to complete w/ timeout */
575 for (i = 0; i < 100; i++)
576 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
577 reg = smsc911x_mac_read(pdata, MII_DATA);
578 goto out;
579 }
580
581 SMSC_WARN(pdata, hw, "Timed out waiting for MII read to finish");
582 reg = -EIO;
583
584 out:
585 spin_unlock_irqrestore(&pdata->mac_lock, flags);
586 pm_runtime_put(bus->parent);
587 return reg;
588 }
589
590 /* Set a phy register */
smsc911x_mii_write(struct mii_bus * bus,int phyaddr,int regidx,u16 val)591 static int smsc911x_mii_write(struct mii_bus *bus, int phyaddr, int regidx,
592 u16 val)
593 {
594 struct smsc911x_data *pdata = (struct smsc911x_data *)bus->priv;
595 unsigned long flags;
596 unsigned int addr;
597 int i, reg;
598
599 pm_runtime_get_sync(bus->parent);
600 spin_lock_irqsave(&pdata->mac_lock, flags);
601
602 /* Confirm MII not busy */
603 if (unlikely(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
604 SMSC_WARN(pdata, hw, "MII is busy in smsc911x_mii_write???");
605 reg = -EIO;
606 goto out;
607 }
608
609 /* Put the data to write in the MAC */
610 smsc911x_mac_write(pdata, MII_DATA, val);
611
612 /* Set the address, index & direction (write to PHY) */
613 addr = ((phyaddr & 0x1F) << 11) | ((regidx & 0x1F) << 6) |
614 MII_ACC_MII_WRITE_;
615 smsc911x_mac_write(pdata, MII_ACC, addr);
616
617 /* Wait for write to complete w/ timeout */
618 for (i = 0; i < 100; i++)
619 if (!(smsc911x_mac_read(pdata, MII_ACC) & MII_ACC_MII_BUSY_)) {
620 reg = 0;
621 goto out;
622 }
623
624 SMSC_WARN(pdata, hw, "Timed out waiting for MII write to finish");
625 reg = -EIO;
626
627 out:
628 spin_unlock_irqrestore(&pdata->mac_lock, flags);
629 pm_runtime_put(bus->parent);
630 return reg;
631 }
632
633 /* Switch to external phy. Assumes tx and rx are stopped. */
smsc911x_phy_enable_external(struct smsc911x_data * pdata)634 static void smsc911x_phy_enable_external(struct smsc911x_data *pdata)
635 {
636 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
637
638 /* Disable phy clocks to the MAC */
639 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
640 hwcfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
641 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
642 udelay(10); /* Enough time for clocks to stop */
643
644 /* Switch to external phy */
645 hwcfg |= HW_CFG_EXT_PHY_EN_;
646 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
647
648 /* Enable phy clocks to the MAC */
649 hwcfg &= (~HW_CFG_PHY_CLK_SEL_);
650 hwcfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
651 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
652 udelay(10); /* Enough time for clocks to restart */
653
654 hwcfg |= HW_CFG_SMI_SEL_;
655 smsc911x_reg_write(pdata, HW_CFG, hwcfg);
656 }
657
658 /* Autodetects and enables external phy if present on supported chips.
659 * autodetection can be overridden by specifying SMSC911X_FORCE_INTERNAL_PHY
660 * or SMSC911X_FORCE_EXTERNAL_PHY in the platform_data flags. */
smsc911x_phy_initialise_external(struct smsc911x_data * pdata)661 static void smsc911x_phy_initialise_external(struct smsc911x_data *pdata)
662 {
663 unsigned int hwcfg = smsc911x_reg_read(pdata, HW_CFG);
664
665 if (pdata->config.flags & SMSC911X_FORCE_INTERNAL_PHY) {
666 SMSC_TRACE(pdata, hw, "Forcing internal PHY");
667 pdata->using_extphy = 0;
668 } else if (pdata->config.flags & SMSC911X_FORCE_EXTERNAL_PHY) {
669 SMSC_TRACE(pdata, hw, "Forcing external PHY");
670 smsc911x_phy_enable_external(pdata);
671 pdata->using_extphy = 1;
672 } else if (hwcfg & HW_CFG_EXT_PHY_DET_) {
673 SMSC_TRACE(pdata, hw,
674 "HW_CFG EXT_PHY_DET set, using external PHY");
675 smsc911x_phy_enable_external(pdata);
676 pdata->using_extphy = 1;
677 } else {
678 SMSC_TRACE(pdata, hw,
679 "HW_CFG EXT_PHY_DET clear, using internal PHY");
680 pdata->using_extphy = 0;
681 }
682 }
683
684 /* Fetches a tx status out of the status fifo */
smsc911x_tx_get_txstatus(struct smsc911x_data * pdata)685 static unsigned int smsc911x_tx_get_txstatus(struct smsc911x_data *pdata)
686 {
687 unsigned int result =
688 smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TSUSED_;
689
690 if (result != 0)
691 result = smsc911x_reg_read(pdata, TX_STATUS_FIFO);
692
693 return result;
694 }
695
696 /* Fetches the next rx status */
smsc911x_rx_get_rxstatus(struct smsc911x_data * pdata)697 static unsigned int smsc911x_rx_get_rxstatus(struct smsc911x_data *pdata)
698 {
699 unsigned int result =
700 smsc911x_reg_read(pdata, RX_FIFO_INF) & RX_FIFO_INF_RXSUSED_;
701
702 if (result != 0)
703 result = smsc911x_reg_read(pdata, RX_STATUS_FIFO);
704
705 return result;
706 }
707
708 #ifdef USE_PHY_WORK_AROUND
smsc911x_phy_check_loopbackpkt(struct smsc911x_data * pdata)709 static int smsc911x_phy_check_loopbackpkt(struct smsc911x_data *pdata)
710 {
711 unsigned int tries;
712 u32 wrsz;
713 u32 rdsz;
714 ulong bufp;
715
716 for (tries = 0; tries < 10; tries++) {
717 unsigned int txcmd_a;
718 unsigned int txcmd_b;
719 unsigned int status;
720 unsigned int pktlength;
721 unsigned int i;
722
723 /* Zero-out rx packet memory */
724 memset(pdata->loopback_rx_pkt, 0, MIN_PACKET_SIZE);
725
726 /* Write tx packet to 118 */
727 txcmd_a = (u32)((ulong)pdata->loopback_tx_pkt & 0x03) << 16;
728 txcmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
729 txcmd_a |= MIN_PACKET_SIZE;
730
731 txcmd_b = MIN_PACKET_SIZE << 16 | MIN_PACKET_SIZE;
732
733 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_a);
734 smsc911x_reg_write(pdata, TX_DATA_FIFO, txcmd_b);
735
736 bufp = (ulong)pdata->loopback_tx_pkt & (~0x3);
737 wrsz = MIN_PACKET_SIZE + 3;
738 wrsz += (u32)((ulong)pdata->loopback_tx_pkt & 0x3);
739 wrsz >>= 2;
740
741 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
742
743 /* Wait till transmit is done */
744 i = 60;
745 do {
746 udelay(5);
747 status = smsc911x_tx_get_txstatus(pdata);
748 } while ((i--) && (!status));
749
750 if (!status) {
751 SMSC_WARN(pdata, hw,
752 "Failed to transmit during loopback test");
753 continue;
754 }
755 if (status & TX_STS_ES_) {
756 SMSC_WARN(pdata, hw,
757 "Transmit encountered errors during loopback test");
758 continue;
759 }
760
761 /* Wait till receive is done */
762 i = 60;
763 do {
764 udelay(5);
765 status = smsc911x_rx_get_rxstatus(pdata);
766 } while ((i--) && (!status));
767
768 if (!status) {
769 SMSC_WARN(pdata, hw,
770 "Failed to receive during loopback test");
771 continue;
772 }
773 if (status & RX_STS_ES_) {
774 SMSC_WARN(pdata, hw,
775 "Receive encountered errors during loopback test");
776 continue;
777 }
778
779 pktlength = ((status & 0x3FFF0000UL) >> 16);
780 bufp = (ulong)pdata->loopback_rx_pkt;
781 rdsz = pktlength + 3;
782 rdsz += (u32)((ulong)pdata->loopback_rx_pkt & 0x3);
783 rdsz >>= 2;
784
785 pdata->ops->rx_readfifo(pdata, (unsigned int *)bufp, rdsz);
786
787 if (pktlength != (MIN_PACKET_SIZE + 4)) {
788 SMSC_WARN(pdata, hw, "Unexpected packet size "
789 "during loop back test, size=%d, will retry",
790 pktlength);
791 } else {
792 unsigned int j;
793 int mismatch = 0;
794 for (j = 0; j < MIN_PACKET_SIZE; j++) {
795 if (pdata->loopback_tx_pkt[j]
796 != pdata->loopback_rx_pkt[j]) {
797 mismatch = 1;
798 break;
799 }
800 }
801 if (!mismatch) {
802 SMSC_TRACE(pdata, hw, "Successfully verified "
803 "loopback packet");
804 return 0;
805 } else {
806 SMSC_WARN(pdata, hw, "Data mismatch "
807 "during loop back test, will retry");
808 }
809 }
810 }
811
812 return -EIO;
813 }
814
smsc911x_phy_reset(struct smsc911x_data * pdata)815 static int smsc911x_phy_reset(struct smsc911x_data *pdata)
816 {
817 unsigned int temp;
818 unsigned int i = 100000;
819
820 temp = smsc911x_reg_read(pdata, PMT_CTRL);
821 smsc911x_reg_write(pdata, PMT_CTRL, temp | PMT_CTRL_PHY_RST_);
822 do {
823 msleep(1);
824 temp = smsc911x_reg_read(pdata, PMT_CTRL);
825 } while ((i--) && (temp & PMT_CTRL_PHY_RST_));
826
827 if (unlikely(temp & PMT_CTRL_PHY_RST_)) {
828 SMSC_WARN(pdata, hw, "PHY reset failed to complete");
829 return -EIO;
830 }
831 /* Extra delay required because the phy may not be completed with
832 * its reset when BMCR_RESET is cleared. Specs say 256 uS is
833 * enough delay but using 1ms here to be safe */
834 msleep(1);
835
836 return 0;
837 }
838
smsc911x_phy_loopbacktest(struct net_device * dev)839 static int smsc911x_phy_loopbacktest(struct net_device *dev)
840 {
841 struct smsc911x_data *pdata = netdev_priv(dev);
842 struct phy_device *phy_dev = dev->phydev;
843 int result = -EIO;
844 unsigned int i, val;
845 unsigned long flags;
846
847 /* Initialise tx packet using broadcast destination address */
848 eth_broadcast_addr(pdata->loopback_tx_pkt);
849
850 /* Use incrementing source address */
851 for (i = 6; i < 12; i++)
852 pdata->loopback_tx_pkt[i] = (char)i;
853
854 /* Set length type field */
855 pdata->loopback_tx_pkt[12] = 0x00;
856 pdata->loopback_tx_pkt[13] = 0x00;
857
858 for (i = 14; i < MIN_PACKET_SIZE; i++)
859 pdata->loopback_tx_pkt[i] = (char)i;
860
861 val = smsc911x_reg_read(pdata, HW_CFG);
862 val &= HW_CFG_TX_FIF_SZ_;
863 val |= HW_CFG_SF_;
864 smsc911x_reg_write(pdata, HW_CFG, val);
865
866 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
867 smsc911x_reg_write(pdata, RX_CFG,
868 (u32)((ulong)pdata->loopback_rx_pkt & 0x03) << 8);
869
870 for (i = 0; i < 10; i++) {
871 /* Set PHY to 10/FD, no ANEG, and loopback mode */
872 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr,
873 MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX);
874
875 /* Enable MAC tx/rx, FD */
876 spin_lock_irqsave(&pdata->mac_lock, flags);
877 smsc911x_mac_write(pdata, MAC_CR, MAC_CR_FDPX_
878 | MAC_CR_TXEN_ | MAC_CR_RXEN_);
879 spin_unlock_irqrestore(&pdata->mac_lock, flags);
880
881 if (smsc911x_phy_check_loopbackpkt(pdata) == 0) {
882 result = 0;
883 break;
884 }
885 pdata->resetcount++;
886
887 /* Disable MAC rx */
888 spin_lock_irqsave(&pdata->mac_lock, flags);
889 smsc911x_mac_write(pdata, MAC_CR, 0);
890 spin_unlock_irqrestore(&pdata->mac_lock, flags);
891
892 smsc911x_phy_reset(pdata);
893 }
894
895 /* Disable MAC */
896 spin_lock_irqsave(&pdata->mac_lock, flags);
897 smsc911x_mac_write(pdata, MAC_CR, 0);
898 spin_unlock_irqrestore(&pdata->mac_lock, flags);
899
900 /* Cancel PHY loopback mode */
901 smsc911x_mii_write(phy_dev->mdio.bus, phy_dev->mdio.addr, MII_BMCR, 0);
902
903 smsc911x_reg_write(pdata, TX_CFG, 0);
904 smsc911x_reg_write(pdata, RX_CFG, 0);
905
906 return result;
907 }
908 #endif /* USE_PHY_WORK_AROUND */
909
smsc911x_phy_update_flowcontrol(struct smsc911x_data * pdata)910 static void smsc911x_phy_update_flowcontrol(struct smsc911x_data *pdata)
911 {
912 struct net_device *ndev = pdata->dev;
913 struct phy_device *phy_dev = ndev->phydev;
914 u32 afc = smsc911x_reg_read(pdata, AFC_CFG);
915 u32 flow;
916 unsigned long flags;
917
918 if (phy_dev->duplex == DUPLEX_FULL) {
919 u16 lcladv = phy_read(phy_dev, MII_ADVERTISE);
920 u16 rmtadv = phy_read(phy_dev, MII_LPA);
921 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
922
923 if (cap & FLOW_CTRL_RX)
924 flow = 0xFFFF0002;
925 else
926 flow = 0;
927
928 if (cap & FLOW_CTRL_TX)
929 afc |= 0xF;
930 else
931 afc &= ~0xF;
932
933 SMSC_TRACE(pdata, hw, "rx pause %s, tx pause %s",
934 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
935 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
936 } else {
937 SMSC_TRACE(pdata, hw, "half duplex");
938 flow = 0;
939 afc |= 0xF;
940 }
941
942 spin_lock_irqsave(&pdata->mac_lock, flags);
943 smsc911x_mac_write(pdata, FLOW, flow);
944 spin_unlock_irqrestore(&pdata->mac_lock, flags);
945
946 smsc911x_reg_write(pdata, AFC_CFG, afc);
947 }
948
949 /* Update link mode if anything has changed. Called periodically when the
950 * PHY is in polling mode, even if nothing has changed. */
smsc911x_phy_adjust_link(struct net_device * dev)951 static void smsc911x_phy_adjust_link(struct net_device *dev)
952 {
953 struct smsc911x_data *pdata = netdev_priv(dev);
954 struct phy_device *phy_dev = dev->phydev;
955 unsigned long flags;
956 int carrier;
957
958 if (phy_dev->duplex != pdata->last_duplex) {
959 unsigned int mac_cr;
960 SMSC_TRACE(pdata, hw, "duplex state has changed");
961
962 spin_lock_irqsave(&pdata->mac_lock, flags);
963 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
964 if (phy_dev->duplex) {
965 SMSC_TRACE(pdata, hw,
966 "configuring for full duplex mode");
967 mac_cr |= MAC_CR_FDPX_;
968 } else {
969 SMSC_TRACE(pdata, hw,
970 "configuring for half duplex mode");
971 mac_cr &= ~MAC_CR_FDPX_;
972 }
973 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
974 spin_unlock_irqrestore(&pdata->mac_lock, flags);
975
976 smsc911x_phy_update_flowcontrol(pdata);
977 pdata->last_duplex = phy_dev->duplex;
978 }
979
980 carrier = netif_carrier_ok(dev);
981 if (carrier != pdata->last_carrier) {
982 SMSC_TRACE(pdata, hw, "carrier state has changed");
983 if (carrier) {
984 SMSC_TRACE(pdata, hw, "configuring for carrier OK");
985 if ((pdata->gpio_orig_setting & GPIO_CFG_LED1_EN_) &&
986 (!pdata->using_extphy)) {
987 /* Restore original GPIO configuration */
988 pdata->gpio_setting = pdata->gpio_orig_setting;
989 smsc911x_reg_write(pdata, GPIO_CFG,
990 pdata->gpio_setting);
991 }
992 } else {
993 SMSC_TRACE(pdata, hw, "configuring for no carrier");
994 /* Check global setting that LED1
995 * usage is 10/100 indicator */
996 pdata->gpio_setting = smsc911x_reg_read(pdata,
997 GPIO_CFG);
998 if ((pdata->gpio_setting & GPIO_CFG_LED1_EN_) &&
999 (!pdata->using_extphy)) {
1000 /* Force 10/100 LED off, after saving
1001 * original GPIO configuration */
1002 pdata->gpio_orig_setting = pdata->gpio_setting;
1003
1004 pdata->gpio_setting &= ~GPIO_CFG_LED1_EN_;
1005 pdata->gpio_setting |= (GPIO_CFG_GPIOBUF0_
1006 | GPIO_CFG_GPIODIR0_
1007 | GPIO_CFG_GPIOD0_);
1008 smsc911x_reg_write(pdata, GPIO_CFG,
1009 pdata->gpio_setting);
1010 }
1011 }
1012 pdata->last_carrier = carrier;
1013 }
1014 }
1015
smsc911x_mii_probe(struct net_device * dev)1016 static int smsc911x_mii_probe(struct net_device *dev)
1017 {
1018 struct smsc911x_data *pdata = netdev_priv(dev);
1019 struct phy_device *phydev = NULL;
1020 int ret;
1021
1022 /* find the first phy */
1023 phydev = phy_find_first(pdata->mii_bus);
1024 if (!phydev) {
1025 netdev_err(dev, "no PHY found\n");
1026 return -ENODEV;
1027 }
1028
1029 SMSC_TRACE(pdata, probe, "PHY: addr %d, phy_id 0x%08X",
1030 phydev->mdio.addr, phydev->phy_id);
1031
1032 ret = phy_connect_direct(dev, phydev, &smsc911x_phy_adjust_link,
1033 pdata->config.phy_interface);
1034
1035 if (ret) {
1036 netdev_err(dev, "Could not attach to PHY\n");
1037 return ret;
1038 }
1039
1040 /* Indicate that the MAC is responsible for managing PHY PM */
1041 phydev->mac_managed_pm = true;
1042 phy_attached_info(phydev);
1043
1044 phy_set_max_speed(phydev, SPEED_100);
1045
1046 /* mask with MAC supported features */
1047 phy_support_asym_pause(phydev);
1048
1049 pdata->last_duplex = -1;
1050 pdata->last_carrier = -1;
1051
1052 #ifdef USE_PHY_WORK_AROUND
1053 if (smsc911x_phy_loopbacktest(dev) < 0) {
1054 SMSC_WARN(pdata, hw, "Failed Loop Back Test");
1055 phy_disconnect(phydev);
1056 return -ENODEV;
1057 }
1058 SMSC_TRACE(pdata, hw, "Passed Loop Back Test");
1059 #endif /* USE_PHY_WORK_AROUND */
1060
1061 SMSC_TRACE(pdata, hw, "phy initialised successfully");
1062 return 0;
1063 }
1064
smsc911x_mii_init(struct platform_device * pdev,struct net_device * dev)1065 static int smsc911x_mii_init(struct platform_device *pdev,
1066 struct net_device *dev)
1067 {
1068 struct smsc911x_data *pdata = netdev_priv(dev);
1069 int err = -ENXIO;
1070
1071 pdata->mii_bus = mdiobus_alloc();
1072 if (!pdata->mii_bus) {
1073 err = -ENOMEM;
1074 goto err_out_1;
1075 }
1076
1077 pdata->mii_bus->name = SMSC_MDIONAME;
1078 snprintf(pdata->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
1079 pdev->name, pdev->id);
1080 pdata->mii_bus->priv = pdata;
1081 pdata->mii_bus->read = smsc911x_mii_read;
1082 pdata->mii_bus->write = smsc911x_mii_write;
1083
1084 pdata->mii_bus->parent = &pdev->dev;
1085
1086 switch (pdata->idrev & 0xFFFF0000) {
1087 case 0x01170000:
1088 case 0x01150000:
1089 case 0x117A0000:
1090 case 0x115A0000:
1091 /* External PHY supported, try to autodetect */
1092 smsc911x_phy_initialise_external(pdata);
1093 break;
1094 default:
1095 SMSC_TRACE(pdata, hw, "External PHY is not supported, "
1096 "using internal PHY");
1097 pdata->using_extphy = 0;
1098 break;
1099 }
1100
1101 if (!pdata->using_extphy) {
1102 /* Mask all PHYs except ID 1 (internal) */
1103 pdata->mii_bus->phy_mask = ~(1 << 1);
1104 }
1105
1106 if (mdiobus_register(pdata->mii_bus)) {
1107 SMSC_WARN(pdata, probe, "Error registering mii bus");
1108 goto err_out_free_bus_2;
1109 }
1110
1111 return 0;
1112
1113 err_out_free_bus_2:
1114 mdiobus_free(pdata->mii_bus);
1115 err_out_1:
1116 return err;
1117 }
1118
1119 /* Gets the number of tx statuses in the fifo */
smsc911x_tx_get_txstatcount(struct smsc911x_data * pdata)1120 static unsigned int smsc911x_tx_get_txstatcount(struct smsc911x_data *pdata)
1121 {
1122 return (smsc911x_reg_read(pdata, TX_FIFO_INF)
1123 & TX_FIFO_INF_TSUSED_) >> 16;
1124 }
1125
1126 /* Reads tx statuses and increments counters where necessary */
smsc911x_tx_update_txcounters(struct net_device * dev)1127 static void smsc911x_tx_update_txcounters(struct net_device *dev)
1128 {
1129 struct smsc911x_data *pdata = netdev_priv(dev);
1130 unsigned int tx_stat;
1131
1132 while ((tx_stat = smsc911x_tx_get_txstatus(pdata)) != 0) {
1133 if (unlikely(tx_stat & 0x80000000)) {
1134 /* In this driver the packet tag is used as the packet
1135 * length. Since a packet length can never reach the
1136 * size of 0x8000, this bit is reserved. It is worth
1137 * noting that the "reserved bit" in the warning above
1138 * does not reference a hardware defined reserved bit
1139 * but rather a driver defined one.
1140 */
1141 SMSC_WARN(pdata, hw, "Packet tag reserved bit is high");
1142 } else {
1143 if (unlikely(tx_stat & TX_STS_ES_)) {
1144 dev->stats.tx_errors++;
1145 } else {
1146 dev->stats.tx_packets++;
1147 dev->stats.tx_bytes += (tx_stat >> 16);
1148 }
1149 if (unlikely(tx_stat & TX_STS_EXCESS_COL_)) {
1150 dev->stats.collisions += 16;
1151 dev->stats.tx_aborted_errors += 1;
1152 } else {
1153 dev->stats.collisions +=
1154 ((tx_stat >> 3) & 0xF);
1155 }
1156 if (unlikely(tx_stat & TX_STS_LOST_CARRIER_))
1157 dev->stats.tx_carrier_errors += 1;
1158 if (unlikely(tx_stat & TX_STS_LATE_COL_)) {
1159 dev->stats.collisions++;
1160 dev->stats.tx_aborted_errors++;
1161 }
1162 }
1163 }
1164 }
1165
1166 /* Increments the Rx error counters */
1167 static void
smsc911x_rx_counterrors(struct net_device * dev,unsigned int rxstat)1168 smsc911x_rx_counterrors(struct net_device *dev, unsigned int rxstat)
1169 {
1170 int crc_err = 0;
1171
1172 if (unlikely(rxstat & RX_STS_ES_)) {
1173 dev->stats.rx_errors++;
1174 if (unlikely(rxstat & RX_STS_CRC_ERR_)) {
1175 dev->stats.rx_crc_errors++;
1176 crc_err = 1;
1177 }
1178 }
1179 if (likely(!crc_err)) {
1180 if (unlikely((rxstat & RX_STS_FRAME_TYPE_) &&
1181 (rxstat & RX_STS_LENGTH_ERR_)))
1182 dev->stats.rx_length_errors++;
1183 if (rxstat & RX_STS_MCAST_)
1184 dev->stats.multicast++;
1185 }
1186 }
1187
1188 /* Quickly dumps bad packets */
1189 static void
smsc911x_rx_fastforward(struct smsc911x_data * pdata,unsigned int pktwords)1190 smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktwords)
1191 {
1192 if (likely(pktwords >= 4)) {
1193 unsigned int timeout = 500;
1194 unsigned int val;
1195 smsc911x_reg_write(pdata, RX_DP_CTRL, RX_DP_CTRL_RX_FFWD_);
1196 do {
1197 udelay(1);
1198 val = smsc911x_reg_read(pdata, RX_DP_CTRL);
1199 } while ((val & RX_DP_CTRL_RX_FFWD_) && --timeout);
1200
1201 if (unlikely(timeout == 0))
1202 SMSC_WARN(pdata, hw, "Timed out waiting for "
1203 "RX FFWD to finish, RX_DP_CTRL: 0x%08X", val);
1204 } else {
1205 while (pktwords--)
1206 smsc911x_reg_read(pdata, RX_DATA_FIFO);
1207 }
1208 }
1209
1210 /* NAPI poll function */
smsc911x_poll(struct napi_struct * napi,int budget)1211 static int smsc911x_poll(struct napi_struct *napi, int budget)
1212 {
1213 struct smsc911x_data *pdata =
1214 container_of(napi, struct smsc911x_data, napi);
1215 struct net_device *dev = pdata->dev;
1216 int npackets = 0;
1217
1218 while (npackets < budget) {
1219 unsigned int pktlength;
1220 unsigned int pktwords;
1221 struct sk_buff *skb;
1222 unsigned int rxstat = smsc911x_rx_get_rxstatus(pdata);
1223
1224 if (!rxstat) {
1225 unsigned int temp;
1226 /* We processed all packets available. Tell NAPI it can
1227 * stop polling then re-enable rx interrupts */
1228 smsc911x_reg_write(pdata, INT_STS, INT_STS_RSFL_);
1229 napi_complete(napi);
1230 temp = smsc911x_reg_read(pdata, INT_EN);
1231 temp |= INT_EN_RSFL_EN_;
1232 smsc911x_reg_write(pdata, INT_EN, temp);
1233 break;
1234 }
1235
1236 /* Count packet for NAPI scheduling, even if it has an error.
1237 * Error packets still require cycles to discard */
1238 npackets++;
1239
1240 pktlength = ((rxstat & 0x3FFF0000) >> 16);
1241 pktwords = (pktlength + NET_IP_ALIGN + 3) >> 2;
1242 smsc911x_rx_counterrors(dev, rxstat);
1243
1244 if (unlikely(rxstat & RX_STS_ES_)) {
1245 SMSC_WARN(pdata, rx_err,
1246 "Discarding packet with error bit set");
1247 /* Packet has an error, discard it and continue with
1248 * the next */
1249 smsc911x_rx_fastforward(pdata, pktwords);
1250 dev->stats.rx_dropped++;
1251 continue;
1252 }
1253
1254 skb = netdev_alloc_skb(dev, pktwords << 2);
1255 if (unlikely(!skb)) {
1256 SMSC_WARN(pdata, rx_err,
1257 "Unable to allocate skb for rx packet");
1258 /* Drop the packet and stop this polling iteration */
1259 smsc911x_rx_fastforward(pdata, pktwords);
1260 dev->stats.rx_dropped++;
1261 break;
1262 }
1263
1264 pdata->ops->rx_readfifo(pdata,
1265 (unsigned int *)skb->data, pktwords);
1266
1267 /* Align IP on 16B boundary */
1268 skb_reserve(skb, NET_IP_ALIGN);
1269 skb_put(skb, pktlength - 4);
1270 skb->protocol = eth_type_trans(skb, dev);
1271 skb_checksum_none_assert(skb);
1272 netif_receive_skb(skb);
1273
1274 /* Update counters */
1275 dev->stats.rx_packets++;
1276 dev->stats.rx_bytes += (pktlength - 4);
1277 }
1278
1279 /* Return total received packets */
1280 return npackets;
1281 }
1282
1283 /* Returns hash bit number for given MAC address
1284 * Example:
1285 * 01 00 5E 00 00 01 -> returns bit number 31 */
smsc911x_hash(char addr[ETH_ALEN])1286 static unsigned int smsc911x_hash(char addr[ETH_ALEN])
1287 {
1288 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
1289 }
1290
smsc911x_rx_multicast_update(struct smsc911x_data * pdata)1291 static void smsc911x_rx_multicast_update(struct smsc911x_data *pdata)
1292 {
1293 /* Performs the multicast & mac_cr update. This is called when
1294 * safe on the current hardware, and with the mac_lock held */
1295 unsigned int mac_cr;
1296
1297 SMSC_ASSERT_MAC_LOCK(pdata);
1298
1299 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1300 mac_cr |= pdata->set_bits_mask;
1301 mac_cr &= ~(pdata->clear_bits_mask);
1302 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1303 smsc911x_mac_write(pdata, HASHH, pdata->hashhi);
1304 smsc911x_mac_write(pdata, HASHL, pdata->hashlo);
1305 SMSC_TRACE(pdata, hw, "maccr 0x%08X, HASHH 0x%08X, HASHL 0x%08X",
1306 mac_cr, pdata->hashhi, pdata->hashlo);
1307 }
1308
smsc911x_rx_multicast_update_workaround(struct smsc911x_data * pdata)1309 static void smsc911x_rx_multicast_update_workaround(struct smsc911x_data *pdata)
1310 {
1311 unsigned int mac_cr;
1312
1313 /* This function is only called for older LAN911x devices
1314 * (revA or revB), where MAC_CR, HASHH and HASHL should not
1315 * be modified during Rx - newer devices immediately update the
1316 * registers.
1317 *
1318 * This is called from interrupt context */
1319
1320 spin_lock(&pdata->mac_lock);
1321
1322 /* Check Rx has stopped */
1323 if (smsc911x_mac_read(pdata, MAC_CR) & MAC_CR_RXEN_)
1324 SMSC_WARN(pdata, drv, "Rx not stopped");
1325
1326 /* Perform the update - safe to do now Rx has stopped */
1327 smsc911x_rx_multicast_update(pdata);
1328
1329 /* Re-enable Rx */
1330 mac_cr = smsc911x_mac_read(pdata, MAC_CR);
1331 mac_cr |= MAC_CR_RXEN_;
1332 smsc911x_mac_write(pdata, MAC_CR, mac_cr);
1333
1334 pdata->multicast_update_pending = 0;
1335
1336 spin_unlock(&pdata->mac_lock);
1337 }
1338
smsc911x_phy_general_power_up(struct smsc911x_data * pdata)1339 static int smsc911x_phy_general_power_up(struct smsc911x_data *pdata)
1340 {
1341 struct net_device *ndev = pdata->dev;
1342 struct phy_device *phy_dev = ndev->phydev;
1343 int rc = 0;
1344
1345 if (!phy_dev)
1346 return rc;
1347
1348 /* If the internal PHY is in General Power-Down mode, all, except the
1349 * management interface, is powered-down and stays in that condition as
1350 * long as Phy register bit 0.11 is HIGH.
1351 *
1352 * In that case, clear the bit 0.11, so the PHY powers up and we can
1353 * access to the phy registers.
1354 */
1355 rc = phy_read(phy_dev, MII_BMCR);
1356 if (rc < 0) {
1357 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1358 return rc;
1359 }
1360
1361 /* If the PHY general power-down bit is not set is not necessary to
1362 * disable the general power down-mode.
1363 */
1364 if (rc & BMCR_PDOWN) {
1365 rc = phy_write(phy_dev, MII_BMCR, rc & ~BMCR_PDOWN);
1366 if (rc < 0) {
1367 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1368 return rc;
1369 }
1370
1371 usleep_range(1000, 1500);
1372 }
1373
1374 return 0;
1375 }
1376
smsc911x_phy_disable_energy_detect(struct smsc911x_data * pdata)1377 static int smsc911x_phy_disable_energy_detect(struct smsc911x_data *pdata)
1378 {
1379 struct net_device *ndev = pdata->dev;
1380 struct phy_device *phy_dev = ndev->phydev;
1381 int rc = 0;
1382
1383 if (!phy_dev)
1384 return rc;
1385
1386 rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS);
1387
1388 if (rc < 0) {
1389 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1390 return rc;
1391 }
1392
1393 /* Only disable if energy detect mode is already enabled */
1394 if (rc & MII_LAN83C185_EDPWRDOWN) {
1395 /* Disable energy detect mode for this SMSC Transceivers */
1396 rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS,
1397 rc & (~MII_LAN83C185_EDPWRDOWN));
1398
1399 if (rc < 0) {
1400 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1401 return rc;
1402 }
1403 /* Allow PHY to wakeup */
1404 mdelay(2);
1405 }
1406
1407 return 0;
1408 }
1409
smsc911x_phy_enable_energy_detect(struct smsc911x_data * pdata)1410 static int smsc911x_phy_enable_energy_detect(struct smsc911x_data *pdata)
1411 {
1412 struct net_device *ndev = pdata->dev;
1413 struct phy_device *phy_dev = ndev->phydev;
1414 int rc = 0;
1415
1416 if (!phy_dev)
1417 return rc;
1418
1419 rc = phy_read(phy_dev, MII_LAN83C185_CTRL_STATUS);
1420
1421 if (rc < 0) {
1422 SMSC_WARN(pdata, drv, "Failed reading PHY control reg");
1423 return rc;
1424 }
1425
1426 /* Only enable if energy detect mode is already disabled */
1427 if (!(rc & MII_LAN83C185_EDPWRDOWN)) {
1428 /* Enable energy detect mode for this SMSC Transceivers */
1429 rc = phy_write(phy_dev, MII_LAN83C185_CTRL_STATUS,
1430 rc | MII_LAN83C185_EDPWRDOWN);
1431
1432 if (rc < 0) {
1433 SMSC_WARN(pdata, drv, "Failed writing PHY control reg");
1434 return rc;
1435 }
1436 }
1437 return 0;
1438 }
1439
smsc911x_soft_reset(struct smsc911x_data * pdata)1440 static int smsc911x_soft_reset(struct smsc911x_data *pdata)
1441 {
1442 unsigned int timeout;
1443 unsigned int temp;
1444 int ret;
1445 unsigned int reset_offset = HW_CFG;
1446 unsigned int reset_mask = HW_CFG_SRST_;
1447
1448 /*
1449 * Make sure to power-up the PHY chip before doing a reset, otherwise
1450 * the reset fails.
1451 */
1452 ret = smsc911x_phy_general_power_up(pdata);
1453 if (ret) {
1454 SMSC_WARN(pdata, drv, "Failed to power-up the PHY chip");
1455 return ret;
1456 }
1457
1458 /*
1459 * LAN9210/LAN9211/LAN9220/LAN9221 chips have an internal PHY that
1460 * are initialized in a Energy Detect Power-Down mode that prevents
1461 * the MAC chip to be software reseted. So we have to wakeup the PHY
1462 * before.
1463 */
1464 if (pdata->generation == 4) {
1465 ret = smsc911x_phy_disable_energy_detect(pdata);
1466
1467 if (ret) {
1468 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1469 return ret;
1470 }
1471 }
1472
1473 if ((pdata->idrev & 0xFFFF0000) == LAN9250) {
1474 /* special reset for LAN9250 */
1475 reset_offset = RESET_CTL;
1476 reset_mask = RESET_CTL_DIGITAL_RST_;
1477 }
1478
1479 /* Reset the LAN911x */
1480 smsc911x_reg_write(pdata, reset_offset, reset_mask);
1481
1482 /* verify reset bit is cleared */
1483 timeout = 10;
1484 do {
1485 udelay(10);
1486 temp = smsc911x_reg_read(pdata, reset_offset);
1487 } while ((--timeout) && (temp & reset_mask));
1488
1489 if (unlikely(temp & reset_mask)) {
1490 SMSC_WARN(pdata, drv, "Failed to complete reset");
1491 return -EIO;
1492 }
1493
1494 if (pdata->generation == 4) {
1495 ret = smsc911x_phy_enable_energy_detect(pdata);
1496
1497 if (ret) {
1498 SMSC_WARN(pdata, drv, "Failed to wakeup the PHY chip");
1499 return ret;
1500 }
1501 }
1502
1503 return 0;
1504 }
1505
1506 /* Sets the device MAC address to dev_addr, called with mac_lock held */
1507 static void
smsc911x_set_hw_mac_address(struct smsc911x_data * pdata,const u8 dev_addr[6])1508 smsc911x_set_hw_mac_address(struct smsc911x_data *pdata, const u8 dev_addr[6])
1509 {
1510 u32 mac_high16 = (dev_addr[5] << 8) | dev_addr[4];
1511 u32 mac_low32 = (dev_addr[3] << 24) | (dev_addr[2] << 16) |
1512 (dev_addr[1] << 8) | dev_addr[0];
1513
1514 SMSC_ASSERT_MAC_LOCK(pdata);
1515
1516 smsc911x_mac_write(pdata, ADDRH, mac_high16);
1517 smsc911x_mac_write(pdata, ADDRL, mac_low32);
1518 }
1519
smsc911x_disable_irq_chip(struct net_device * dev)1520 static void smsc911x_disable_irq_chip(struct net_device *dev)
1521 {
1522 struct smsc911x_data *pdata = netdev_priv(dev);
1523
1524 smsc911x_reg_write(pdata, INT_EN, 0);
1525 smsc911x_reg_write(pdata, INT_STS, 0xFFFFFFFF);
1526 }
1527
smsc911x_irqhandler(int irq,void * dev_id)1528 static irqreturn_t smsc911x_irqhandler(int irq, void *dev_id)
1529 {
1530 struct net_device *dev = dev_id;
1531 struct smsc911x_data *pdata = netdev_priv(dev);
1532 u32 intsts = smsc911x_reg_read(pdata, INT_STS);
1533 u32 inten = smsc911x_reg_read(pdata, INT_EN);
1534 int serviced = IRQ_NONE;
1535 u32 temp;
1536
1537 if (unlikely(intsts & inten & INT_STS_SW_INT_)) {
1538 temp = smsc911x_reg_read(pdata, INT_EN);
1539 temp &= (~INT_EN_SW_INT_EN_);
1540 smsc911x_reg_write(pdata, INT_EN, temp);
1541 smsc911x_reg_write(pdata, INT_STS, INT_STS_SW_INT_);
1542 pdata->software_irq_signal = 1;
1543 smp_wmb();
1544 serviced = IRQ_HANDLED;
1545 }
1546
1547 if (unlikely(intsts & inten & INT_STS_RXSTOP_INT_)) {
1548 /* Called when there is a multicast update scheduled and
1549 * it is now safe to complete the update */
1550 SMSC_TRACE(pdata, intr, "RX Stop interrupt");
1551 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXSTOP_INT_);
1552 if (pdata->multicast_update_pending)
1553 smsc911x_rx_multicast_update_workaround(pdata);
1554 serviced = IRQ_HANDLED;
1555 }
1556
1557 if (intsts & inten & INT_STS_TDFA_) {
1558 temp = smsc911x_reg_read(pdata, FIFO_INT);
1559 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1560 smsc911x_reg_write(pdata, FIFO_INT, temp);
1561 smsc911x_reg_write(pdata, INT_STS, INT_STS_TDFA_);
1562 netif_wake_queue(dev);
1563 serviced = IRQ_HANDLED;
1564 }
1565
1566 if (unlikely(intsts & inten & INT_STS_RXE_)) {
1567 SMSC_TRACE(pdata, intr, "RX Error interrupt");
1568 smsc911x_reg_write(pdata, INT_STS, INT_STS_RXE_);
1569 serviced = IRQ_HANDLED;
1570 }
1571
1572 if (likely(intsts & inten & INT_STS_RSFL_)) {
1573 if (likely(napi_schedule_prep(&pdata->napi))) {
1574 /* Disable Rx interrupts */
1575 temp = smsc911x_reg_read(pdata, INT_EN);
1576 temp &= (~INT_EN_RSFL_EN_);
1577 smsc911x_reg_write(pdata, INT_EN, temp);
1578 /* Schedule a NAPI poll */
1579 __napi_schedule(&pdata->napi);
1580 } else {
1581 SMSC_WARN(pdata, rx_err, "napi_schedule_prep failed");
1582 }
1583 serviced = IRQ_HANDLED;
1584 }
1585
1586 return serviced;
1587 }
1588
smsc911x_open(struct net_device * dev)1589 static int smsc911x_open(struct net_device *dev)
1590 {
1591 struct smsc911x_data *pdata = netdev_priv(dev);
1592 unsigned int timeout;
1593 unsigned int temp;
1594 unsigned int intcfg;
1595 int retval;
1596 int irq_flags;
1597
1598 pm_runtime_get_sync(dev->dev.parent);
1599
1600 /* find and start the given phy */
1601 if (!dev->phydev) {
1602 retval = smsc911x_mii_probe(dev);
1603 if (retval < 0) {
1604 SMSC_WARN(pdata, probe, "Error starting phy");
1605 goto out;
1606 }
1607 }
1608
1609 /* Reset the LAN911x */
1610 retval = smsc911x_soft_reset(pdata);
1611 if (retval) {
1612 SMSC_WARN(pdata, hw, "soft reset failed");
1613 goto mii_free_out;
1614 }
1615
1616 smsc911x_reg_write(pdata, HW_CFG, 0x00050000);
1617 smsc911x_reg_write(pdata, AFC_CFG, 0x006E3740);
1618
1619 /* Increase the legal frame size of VLAN tagged frames to 1522 bytes */
1620 spin_lock_irq(&pdata->mac_lock);
1621 smsc911x_mac_write(pdata, VLAN1, ETH_P_8021Q);
1622 spin_unlock_irq(&pdata->mac_lock);
1623
1624 /* Make sure EEPROM has finished loading before setting GPIO_CFG */
1625 timeout = 50;
1626 while ((smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) &&
1627 --timeout) {
1628 udelay(10);
1629 }
1630
1631 if (unlikely(timeout == 0))
1632 SMSC_WARN(pdata, ifup,
1633 "Timed out waiting for EEPROM busy bit to clear");
1634
1635 smsc911x_reg_write(pdata, GPIO_CFG, 0x70070000);
1636
1637 /* The soft reset above cleared the device's MAC address,
1638 * restore it from local copy (set in probe) */
1639 spin_lock_irq(&pdata->mac_lock);
1640 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1641 spin_unlock_irq(&pdata->mac_lock);
1642
1643 /* Initialise irqs, but leave all sources disabled */
1644 smsc911x_disable_irq_chip(dev);
1645
1646 /* Set interrupt deassertion to 100uS */
1647 intcfg = ((10 << 24) | INT_CFG_IRQ_EN_);
1648
1649 if (pdata->config.irq_polarity) {
1650 SMSC_TRACE(pdata, ifup, "irq polarity: active high");
1651 intcfg |= INT_CFG_IRQ_POL_;
1652 } else {
1653 SMSC_TRACE(pdata, ifup, "irq polarity: active low");
1654 }
1655
1656 if (pdata->config.irq_type) {
1657 SMSC_TRACE(pdata, ifup, "irq type: push-pull");
1658 intcfg |= INT_CFG_IRQ_TYPE_;
1659 } else {
1660 SMSC_TRACE(pdata, ifup, "irq type: open drain");
1661 }
1662
1663 smsc911x_reg_write(pdata, INT_CFG, intcfg);
1664
1665 SMSC_TRACE(pdata, ifup, "Testing irq handler using IRQ %d", dev->irq);
1666 pdata->software_irq_signal = 0;
1667 smp_wmb();
1668
1669 irq_flags = irq_get_trigger_type(dev->irq);
1670 retval = request_irq(dev->irq, smsc911x_irqhandler,
1671 irq_flags | IRQF_SHARED, dev->name, dev);
1672 if (retval) {
1673 SMSC_WARN(pdata, probe,
1674 "Unable to claim requested irq: %d", dev->irq);
1675 goto mii_free_out;
1676 }
1677
1678 temp = smsc911x_reg_read(pdata, INT_EN);
1679 temp |= INT_EN_SW_INT_EN_;
1680 smsc911x_reg_write(pdata, INT_EN, temp);
1681
1682 timeout = 1000;
1683 while (timeout--) {
1684 if (pdata->software_irq_signal)
1685 break;
1686 msleep(1);
1687 }
1688
1689 if (!pdata->software_irq_signal) {
1690 netdev_warn(dev, "ISR failed signaling test (IRQ %d)\n",
1691 dev->irq);
1692 retval = -ENODEV;
1693 goto irq_stop_out;
1694 }
1695 SMSC_TRACE(pdata, ifup, "IRQ handler passed test using IRQ %d",
1696 dev->irq);
1697
1698 netdev_info(dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
1699 (unsigned long)pdata->ioaddr, dev->irq);
1700
1701 /* Reset the last known duplex and carrier */
1702 pdata->last_duplex = -1;
1703 pdata->last_carrier = -1;
1704
1705 /* Bring the PHY up */
1706 phy_start(dev->phydev);
1707
1708 temp = smsc911x_reg_read(pdata, HW_CFG);
1709 /* Preserve TX FIFO size and external PHY configuration */
1710 temp &= (HW_CFG_TX_FIF_SZ_|0x00000FFF);
1711 temp |= HW_CFG_SF_;
1712 smsc911x_reg_write(pdata, HW_CFG, temp);
1713
1714 temp = smsc911x_reg_read(pdata, FIFO_INT);
1715 temp |= FIFO_INT_TX_AVAIL_LEVEL_;
1716 temp &= ~(FIFO_INT_RX_STS_LEVEL_);
1717 smsc911x_reg_write(pdata, FIFO_INT, temp);
1718
1719 /* set RX Data offset to 2 bytes for alignment */
1720 smsc911x_reg_write(pdata, RX_CFG, (NET_IP_ALIGN << 8));
1721
1722 /* enable NAPI polling before enabling RX interrupts */
1723 napi_enable(&pdata->napi);
1724
1725 temp = smsc911x_reg_read(pdata, INT_EN);
1726 temp |= (INT_EN_TDFA_EN_ | INT_EN_RSFL_EN_ | INT_EN_RXSTOP_INT_EN_);
1727 smsc911x_reg_write(pdata, INT_EN, temp);
1728
1729 spin_lock_irq(&pdata->mac_lock);
1730 temp = smsc911x_mac_read(pdata, MAC_CR);
1731 temp |= (MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
1732 smsc911x_mac_write(pdata, MAC_CR, temp);
1733 spin_unlock_irq(&pdata->mac_lock);
1734
1735 smsc911x_reg_write(pdata, TX_CFG, TX_CFG_TX_ON_);
1736
1737 netif_start_queue(dev);
1738 return 0;
1739
1740 irq_stop_out:
1741 free_irq(dev->irq, dev);
1742 mii_free_out:
1743 phy_disconnect(dev->phydev);
1744 dev->phydev = NULL;
1745 out:
1746 pm_runtime_put(dev->dev.parent);
1747 return retval;
1748 }
1749
1750 /* Entry point for stopping the interface */
smsc911x_stop(struct net_device * dev)1751 static int smsc911x_stop(struct net_device *dev)
1752 {
1753 struct smsc911x_data *pdata = netdev_priv(dev);
1754 unsigned int temp;
1755
1756 /* Disable all device interrupts */
1757 temp = smsc911x_reg_read(pdata, INT_CFG);
1758 temp &= ~INT_CFG_IRQ_EN_;
1759 smsc911x_reg_write(pdata, INT_CFG, temp);
1760
1761 /* Stop Tx and Rx polling */
1762 netif_stop_queue(dev);
1763 napi_disable(&pdata->napi);
1764
1765 /* At this point all Rx and Tx activity is stopped */
1766 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1767 smsc911x_tx_update_txcounters(dev);
1768
1769 free_irq(dev->irq, dev);
1770
1771 /* Bring the PHY down */
1772 if (dev->phydev) {
1773 phy_stop(dev->phydev);
1774 phy_disconnect(dev->phydev);
1775 dev->phydev = NULL;
1776 }
1777 netif_carrier_off(dev);
1778 pm_runtime_put(dev->dev.parent);
1779
1780 SMSC_TRACE(pdata, ifdown, "Interface stopped");
1781 return 0;
1782 }
1783
1784 /* Entry point for transmitting a packet */
1785 static netdev_tx_t
smsc911x_hard_start_xmit(struct sk_buff * skb,struct net_device * dev)1786 smsc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
1787 {
1788 struct smsc911x_data *pdata = netdev_priv(dev);
1789 unsigned int freespace;
1790 unsigned int tx_cmd_a;
1791 unsigned int tx_cmd_b;
1792 unsigned int temp;
1793 u32 wrsz;
1794 ulong bufp;
1795
1796 freespace = smsc911x_reg_read(pdata, TX_FIFO_INF) & TX_FIFO_INF_TDFREE_;
1797
1798 if (unlikely(freespace < TX_FIFO_LOW_THRESHOLD))
1799 SMSC_WARN(pdata, tx_err,
1800 "Tx data fifo low, space available: %d", freespace);
1801
1802 /* Word alignment adjustment */
1803 tx_cmd_a = (u32)((ulong)skb->data & 0x03) << 16;
1804 tx_cmd_a |= TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
1805 tx_cmd_a |= (unsigned int)skb->len;
1806
1807 tx_cmd_b = ((unsigned int)skb->len) << 16;
1808 tx_cmd_b |= (unsigned int)skb->len;
1809
1810 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_a);
1811 smsc911x_reg_write(pdata, TX_DATA_FIFO, tx_cmd_b);
1812
1813 bufp = (ulong)skb->data & (~0x3);
1814 wrsz = (u32)skb->len + 3;
1815 wrsz += (u32)((ulong)skb->data & 0x3);
1816 wrsz >>= 2;
1817
1818 pdata->ops->tx_writefifo(pdata, (unsigned int *)bufp, wrsz);
1819 freespace -= (skb->len + 32);
1820 skb_tx_timestamp(skb);
1821 dev_consume_skb_any(skb);
1822
1823 if (unlikely(smsc911x_tx_get_txstatcount(pdata) >= 30))
1824 smsc911x_tx_update_txcounters(dev);
1825
1826 if (freespace < TX_FIFO_LOW_THRESHOLD) {
1827 netif_stop_queue(dev);
1828 temp = smsc911x_reg_read(pdata, FIFO_INT);
1829 temp &= 0x00FFFFFF;
1830 temp |= 0x32000000;
1831 smsc911x_reg_write(pdata, FIFO_INT, temp);
1832 }
1833
1834 return NETDEV_TX_OK;
1835 }
1836
1837 /* Entry point for getting status counters */
smsc911x_get_stats(struct net_device * dev)1838 static struct net_device_stats *smsc911x_get_stats(struct net_device *dev)
1839 {
1840 struct smsc911x_data *pdata = netdev_priv(dev);
1841 smsc911x_tx_update_txcounters(dev);
1842 dev->stats.rx_dropped += smsc911x_reg_read(pdata, RX_DROP);
1843 return &dev->stats;
1844 }
1845
1846 /* Entry point for setting addressing modes */
smsc911x_set_multicast_list(struct net_device * dev)1847 static void smsc911x_set_multicast_list(struct net_device *dev)
1848 {
1849 struct smsc911x_data *pdata = netdev_priv(dev);
1850 unsigned long flags;
1851
1852 if (dev->flags & IFF_PROMISC) {
1853 /* Enabling promiscuous mode */
1854 pdata->set_bits_mask = MAC_CR_PRMS_;
1855 pdata->clear_bits_mask = (MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1856 pdata->hashhi = 0;
1857 pdata->hashlo = 0;
1858 } else if (dev->flags & IFF_ALLMULTI) {
1859 /* Enabling all multicast mode */
1860 pdata->set_bits_mask = MAC_CR_MCPAS_;
1861 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_HPFILT_);
1862 pdata->hashhi = 0;
1863 pdata->hashlo = 0;
1864 } else if (!netdev_mc_empty(dev)) {
1865 /* Enabling specific multicast addresses */
1866 unsigned int hash_high = 0;
1867 unsigned int hash_low = 0;
1868 struct netdev_hw_addr *ha;
1869
1870 pdata->set_bits_mask = MAC_CR_HPFILT_;
1871 pdata->clear_bits_mask = (MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1872
1873 netdev_for_each_mc_addr(ha, dev) {
1874 unsigned int bitnum = smsc911x_hash(ha->addr);
1875 unsigned int mask = 0x01 << (bitnum & 0x1F);
1876
1877 if (bitnum & 0x20)
1878 hash_high |= mask;
1879 else
1880 hash_low |= mask;
1881 }
1882
1883 pdata->hashhi = hash_high;
1884 pdata->hashlo = hash_low;
1885 } else {
1886 /* Enabling local MAC address only */
1887 pdata->set_bits_mask = 0;
1888 pdata->clear_bits_mask =
1889 (MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
1890 pdata->hashhi = 0;
1891 pdata->hashlo = 0;
1892 }
1893
1894 spin_lock_irqsave(&pdata->mac_lock, flags);
1895
1896 if (pdata->generation <= 1) {
1897 /* Older hardware revision - cannot change these flags while
1898 * receiving data */
1899 if (!pdata->multicast_update_pending) {
1900 unsigned int temp;
1901 SMSC_TRACE(pdata, hw, "scheduling mcast update");
1902 pdata->multicast_update_pending = 1;
1903
1904 /* Request the hardware to stop, then perform the
1905 * update when we get an RX_STOP interrupt */
1906 temp = smsc911x_mac_read(pdata, MAC_CR);
1907 temp &= ~(MAC_CR_RXEN_);
1908 smsc911x_mac_write(pdata, MAC_CR, temp);
1909 } else {
1910 /* There is another update pending, this should now
1911 * use the newer values */
1912 }
1913 } else {
1914 /* Newer hardware revision - can write immediately */
1915 smsc911x_rx_multicast_update(pdata);
1916 }
1917
1918 spin_unlock_irqrestore(&pdata->mac_lock, flags);
1919 }
1920
1921 #ifdef CONFIG_NET_POLL_CONTROLLER
smsc911x_poll_controller(struct net_device * dev)1922 static void smsc911x_poll_controller(struct net_device *dev)
1923 {
1924 disable_irq(dev->irq);
1925 smsc911x_irqhandler(0, dev);
1926 enable_irq(dev->irq);
1927 }
1928 #endif /* CONFIG_NET_POLL_CONTROLLER */
1929
smsc911x_set_mac_address(struct net_device * dev,void * p)1930 static int smsc911x_set_mac_address(struct net_device *dev, void *p)
1931 {
1932 struct smsc911x_data *pdata = netdev_priv(dev);
1933 struct sockaddr *addr = p;
1934
1935 /* On older hardware revisions we cannot change the mac address
1936 * registers while receiving data. Newer devices can safely change
1937 * this at any time. */
1938 if (pdata->generation <= 1 && netif_running(dev))
1939 return -EBUSY;
1940
1941 if (!is_valid_ether_addr(addr->sa_data))
1942 return -EADDRNOTAVAIL;
1943
1944 eth_hw_addr_set(dev, addr->sa_data);
1945
1946 spin_lock_irq(&pdata->mac_lock);
1947 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
1948 spin_unlock_irq(&pdata->mac_lock);
1949
1950 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
1951
1952 return 0;
1953 }
1954
smsc911x_ethtool_getdrvinfo(struct net_device * dev,struct ethtool_drvinfo * info)1955 static void smsc911x_ethtool_getdrvinfo(struct net_device *dev,
1956 struct ethtool_drvinfo *info)
1957 {
1958 strscpy(info->driver, SMSC_CHIPNAME, sizeof(info->driver));
1959 strscpy(info->version, SMSC_DRV_VERSION, sizeof(info->version));
1960 strscpy(info->bus_info, dev_name(dev->dev.parent),
1961 sizeof(info->bus_info));
1962 }
1963
smsc911x_ethtool_getmsglevel(struct net_device * dev)1964 static u32 smsc911x_ethtool_getmsglevel(struct net_device *dev)
1965 {
1966 struct smsc911x_data *pdata = netdev_priv(dev);
1967 return pdata->msg_enable;
1968 }
1969
smsc911x_ethtool_setmsglevel(struct net_device * dev,u32 level)1970 static void smsc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1971 {
1972 struct smsc911x_data *pdata = netdev_priv(dev);
1973 pdata->msg_enable = level;
1974 }
1975
smsc911x_ethtool_getregslen(struct net_device * dev)1976 static int smsc911x_ethtool_getregslen(struct net_device *dev)
1977 {
1978 return (((E2P_DATA - ID_REV) / 4 + 1) + (WUCSR - MAC_CR) + 1 + 32) *
1979 sizeof(u32);
1980 }
1981
1982 static void
smsc911x_ethtool_getregs(struct net_device * dev,struct ethtool_regs * regs,void * buf)1983 smsc911x_ethtool_getregs(struct net_device *dev, struct ethtool_regs *regs,
1984 void *buf)
1985 {
1986 struct smsc911x_data *pdata = netdev_priv(dev);
1987 struct phy_device *phy_dev = dev->phydev;
1988 unsigned long flags;
1989 unsigned int i;
1990 unsigned int j = 0;
1991 u32 *data = buf;
1992
1993 regs->version = pdata->idrev;
1994 for (i = ID_REV; i <= E2P_DATA; i += (sizeof(u32)))
1995 data[j++] = smsc911x_reg_read(pdata, i);
1996
1997 for (i = MAC_CR; i <= WUCSR; i++) {
1998 spin_lock_irqsave(&pdata->mac_lock, flags);
1999 data[j++] = smsc911x_mac_read(pdata, i);
2000 spin_unlock_irqrestore(&pdata->mac_lock, flags);
2001 }
2002
2003 for (i = 0; i <= 31; i++)
2004 data[j++] = smsc911x_mii_read(phy_dev->mdio.bus,
2005 phy_dev->mdio.addr, i);
2006 }
2007
smsc911x_eeprom_enable_access(struct smsc911x_data * pdata)2008 static void smsc911x_eeprom_enable_access(struct smsc911x_data *pdata)
2009 {
2010 unsigned int temp = smsc911x_reg_read(pdata, GPIO_CFG);
2011 temp &= ~GPIO_CFG_EEPR_EN_;
2012 smsc911x_reg_write(pdata, GPIO_CFG, temp);
2013 msleep(1);
2014 }
2015
smsc911x_eeprom_send_cmd(struct smsc911x_data * pdata,u32 op)2016 static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
2017 {
2018 int timeout = 100;
2019 u32 e2cmd;
2020
2021 SMSC_TRACE(pdata, drv, "op 0x%08x", op);
2022 if (smsc911x_reg_read(pdata, E2P_CMD) & E2P_CMD_EPC_BUSY_) {
2023 SMSC_WARN(pdata, drv, "Busy at start");
2024 return -EBUSY;
2025 }
2026
2027 e2cmd = op | E2P_CMD_EPC_BUSY_;
2028 smsc911x_reg_write(pdata, E2P_CMD, e2cmd);
2029
2030 do {
2031 msleep(1);
2032 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
2033 } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
2034
2035 if (!timeout) {
2036 SMSC_TRACE(pdata, drv, "TIMED OUT");
2037 return -EAGAIN;
2038 }
2039
2040 if (e2cmd & E2P_CMD_EPC_TIMEOUT_) {
2041 SMSC_TRACE(pdata, drv, "Error occurred during eeprom operation");
2042 return -EINVAL;
2043 }
2044
2045 return 0;
2046 }
2047
smsc911x_eeprom_read_location(struct smsc911x_data * pdata,u8 address,u8 * data)2048 static int smsc911x_eeprom_read_location(struct smsc911x_data *pdata,
2049 u8 address, u8 *data)
2050 {
2051 u32 op = E2P_CMD_EPC_CMD_READ_ | address;
2052 int ret;
2053
2054 SMSC_TRACE(pdata, drv, "address 0x%x", address);
2055 ret = smsc911x_eeprom_send_cmd(pdata, op);
2056
2057 if (!ret)
2058 data[address] = smsc911x_reg_read(pdata, E2P_DATA);
2059
2060 return ret;
2061 }
2062
smsc911x_eeprom_write_location(struct smsc911x_data * pdata,u8 address,u8 data)2063 static int smsc911x_eeprom_write_location(struct smsc911x_data *pdata,
2064 u8 address, u8 data)
2065 {
2066 u32 op = E2P_CMD_EPC_CMD_ERASE_ | address;
2067 int ret;
2068
2069 SMSC_TRACE(pdata, drv, "address 0x%x, data 0x%x", address, data);
2070 ret = smsc911x_eeprom_send_cmd(pdata, op);
2071
2072 if (!ret) {
2073 op = E2P_CMD_EPC_CMD_WRITE_ | address;
2074 smsc911x_reg_write(pdata, E2P_DATA, (u32)data);
2075
2076 /* Workaround for hardware read-after-write restriction */
2077 smsc911x_reg_read(pdata, BYTE_TEST);
2078
2079 ret = smsc911x_eeprom_send_cmd(pdata, op);
2080 }
2081
2082 return ret;
2083 }
2084
smsc911x_ethtool_get_eeprom_len(struct net_device * dev)2085 static int smsc911x_ethtool_get_eeprom_len(struct net_device *dev)
2086 {
2087 return SMSC911X_EEPROM_SIZE;
2088 }
2089
smsc911x_ethtool_get_eeprom(struct net_device * dev,struct ethtool_eeprom * eeprom,u8 * data)2090 static int smsc911x_ethtool_get_eeprom(struct net_device *dev,
2091 struct ethtool_eeprom *eeprom, u8 *data)
2092 {
2093 struct smsc911x_data *pdata = netdev_priv(dev);
2094 u8 eeprom_data[SMSC911X_EEPROM_SIZE];
2095 int len;
2096 int i;
2097
2098 smsc911x_eeprom_enable_access(pdata);
2099
2100 len = min(eeprom->len, SMSC911X_EEPROM_SIZE);
2101 for (i = 0; i < len; i++) {
2102 int ret = smsc911x_eeprom_read_location(pdata, i, eeprom_data);
2103 if (ret < 0) {
2104 eeprom->len = 0;
2105 return ret;
2106 }
2107 }
2108
2109 memcpy(data, &eeprom_data[eeprom->offset], len);
2110 eeprom->len = len;
2111 return 0;
2112 }
2113
smsc911x_ethtool_set_eeprom(struct net_device * dev,struct ethtool_eeprom * eeprom,u8 * data)2114 static int smsc911x_ethtool_set_eeprom(struct net_device *dev,
2115 struct ethtool_eeprom *eeprom, u8 *data)
2116 {
2117 int ret;
2118 struct smsc911x_data *pdata = netdev_priv(dev);
2119
2120 smsc911x_eeprom_enable_access(pdata);
2121 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWEN_);
2122 ret = smsc911x_eeprom_write_location(pdata, eeprom->offset, *data);
2123 smsc911x_eeprom_send_cmd(pdata, E2P_CMD_EPC_CMD_EWDS_);
2124
2125 /* Single byte write, according to man page */
2126 eeprom->len = 1;
2127
2128 return ret;
2129 }
2130
2131 static const struct ethtool_ops smsc911x_ethtool_ops = {
2132 .get_link = ethtool_op_get_link,
2133 .get_drvinfo = smsc911x_ethtool_getdrvinfo,
2134 .nway_reset = phy_ethtool_nway_reset,
2135 .get_msglevel = smsc911x_ethtool_getmsglevel,
2136 .set_msglevel = smsc911x_ethtool_setmsglevel,
2137 .get_regs_len = smsc911x_ethtool_getregslen,
2138 .get_regs = smsc911x_ethtool_getregs,
2139 .get_eeprom_len = smsc911x_ethtool_get_eeprom_len,
2140 .get_eeprom = smsc911x_ethtool_get_eeprom,
2141 .set_eeprom = smsc911x_ethtool_set_eeprom,
2142 .get_ts_info = ethtool_op_get_ts_info,
2143 .get_link_ksettings = phy_ethtool_get_link_ksettings,
2144 .set_link_ksettings = phy_ethtool_set_link_ksettings,
2145 };
2146
2147 static const struct net_device_ops smsc911x_netdev_ops = {
2148 .ndo_open = smsc911x_open,
2149 .ndo_stop = smsc911x_stop,
2150 .ndo_start_xmit = smsc911x_hard_start_xmit,
2151 .ndo_get_stats = smsc911x_get_stats,
2152 .ndo_set_rx_mode = smsc911x_set_multicast_list,
2153 .ndo_eth_ioctl = phy_do_ioctl_running,
2154 .ndo_validate_addr = eth_validate_addr,
2155 .ndo_set_mac_address = smsc911x_set_mac_address,
2156 #ifdef CONFIG_NET_POLL_CONTROLLER
2157 .ndo_poll_controller = smsc911x_poll_controller,
2158 #endif
2159 };
2160
2161 /* copies the current mac address from hardware to dev->dev_addr */
smsc911x_read_mac_address(struct net_device * dev)2162 static void smsc911x_read_mac_address(struct net_device *dev)
2163 {
2164 struct smsc911x_data *pdata = netdev_priv(dev);
2165 u32 mac_high16 = smsc911x_mac_read(pdata, ADDRH);
2166 u32 mac_low32 = smsc911x_mac_read(pdata, ADDRL);
2167 u8 addr[ETH_ALEN];
2168
2169 addr[0] = (u8)(mac_low32);
2170 addr[1] = (u8)(mac_low32 >> 8);
2171 addr[2] = (u8)(mac_low32 >> 16);
2172 addr[3] = (u8)(mac_low32 >> 24);
2173 addr[4] = (u8)(mac_high16);
2174 addr[5] = (u8)(mac_high16 >> 8);
2175 eth_hw_addr_set(dev, addr);
2176 }
2177
2178 /* Initializing private device structures, only called from probe */
smsc911x_init(struct net_device * dev)2179 static int smsc911x_init(struct net_device *dev)
2180 {
2181 struct smsc911x_data *pdata = netdev_priv(dev);
2182 unsigned int byte_test, mask;
2183 unsigned int to = 100;
2184
2185 SMSC_TRACE(pdata, probe, "Driver Parameters:");
2186 SMSC_TRACE(pdata, probe, "LAN base: 0x%08lX",
2187 (unsigned long)pdata->ioaddr);
2188 SMSC_TRACE(pdata, probe, "IRQ: %d", dev->irq);
2189 SMSC_TRACE(pdata, probe, "PHY will be autodetected.");
2190
2191 spin_lock_init(&pdata->dev_lock);
2192 spin_lock_init(&pdata->mac_lock);
2193
2194 if (pdata->ioaddr == NULL) {
2195 SMSC_WARN(pdata, probe, "pdata->ioaddr: 0x00000000");
2196 return -ENODEV;
2197 }
2198
2199 /*
2200 * poll the READY bit in PMT_CTRL. Any other access to the device is
2201 * forbidden while this bit isn't set. Try for 100ms
2202 *
2203 * Note that this test is done before the WORD_SWAP register is
2204 * programmed. So in some configurations the READY bit is at 16 before
2205 * WORD_SWAP is written to. This issue is worked around by waiting
2206 * until either bit 0 or bit 16 gets set in PMT_CTRL.
2207 *
2208 * SMSC has confirmed that checking bit 16 (marked as reserved in
2209 * the datasheet) is fine since these bits "will either never be set
2210 * or can only go high after READY does (so also indicate the device
2211 * is ready)".
2212 */
2213
2214 mask = PMT_CTRL_READY_ | swahw32(PMT_CTRL_READY_);
2215 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & mask) && --to)
2216 udelay(1000);
2217
2218 if (to == 0) {
2219 netdev_err(dev, "Device not READY in 100ms aborting\n");
2220 return -ENODEV;
2221 }
2222
2223 /* Check byte ordering */
2224 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2225 SMSC_TRACE(pdata, probe, "BYTE_TEST: 0x%08X", byte_test);
2226 if (byte_test == 0x43218765) {
2227 SMSC_TRACE(pdata, probe, "BYTE_TEST looks swapped, "
2228 "applying WORD_SWAP");
2229 smsc911x_reg_write(pdata, WORD_SWAP, 0xffffffff);
2230
2231 /* 1 dummy read of BYTE_TEST is needed after a write to
2232 * WORD_SWAP before its contents are valid */
2233 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2234
2235 byte_test = smsc911x_reg_read(pdata, BYTE_TEST);
2236 }
2237
2238 if (byte_test != 0x87654321) {
2239 SMSC_WARN(pdata, drv, "BYTE_TEST: 0x%08X", byte_test);
2240 if (((byte_test >> 16) & 0xFFFF) == (byte_test & 0xFFFF)) {
2241 SMSC_WARN(pdata, probe,
2242 "top 16 bits equal to bottom 16 bits");
2243 SMSC_TRACE(pdata, probe,
2244 "This may mean the chip is set "
2245 "for 32 bit while the bus is reading 16 bit");
2246 }
2247 return -ENODEV;
2248 }
2249
2250 /* Default generation to zero (all workarounds apply) */
2251 pdata->generation = 0;
2252
2253 pdata->idrev = smsc911x_reg_read(pdata, ID_REV);
2254 switch (pdata->idrev & 0xFFFF0000) {
2255 case LAN9118:
2256 case LAN9117:
2257 case LAN9116:
2258 case LAN9115:
2259 case LAN89218:
2260 /* LAN911[5678] family */
2261 pdata->generation = pdata->idrev & 0x0000FFFF;
2262 break;
2263
2264 case LAN9218:
2265 case LAN9217:
2266 case LAN9216:
2267 case LAN9215:
2268 /* LAN921[5678] family */
2269 pdata->generation = 3;
2270 break;
2271
2272 case LAN9210:
2273 case LAN9211:
2274 case LAN9220:
2275 case LAN9221:
2276 case LAN9250:
2277 /* LAN9210/LAN9211/LAN9220/LAN9221/LAN9250 */
2278 pdata->generation = 4;
2279 break;
2280
2281 default:
2282 SMSC_WARN(pdata, probe, "LAN911x not identified, idrev: 0x%08X",
2283 pdata->idrev);
2284 return -ENODEV;
2285 }
2286
2287 SMSC_TRACE(pdata, probe,
2288 "LAN911x identified, idrev: 0x%08X, generation: %d",
2289 pdata->idrev, pdata->generation);
2290
2291 if (pdata->generation == 0)
2292 SMSC_WARN(pdata, probe,
2293 "This driver is not intended for this chip revision");
2294
2295 /* workaround for platforms without an eeprom, where the mac address
2296 * is stored elsewhere and set by the bootloader. This saves the
2297 * mac address before resetting the device */
2298 if (pdata->config.flags & SMSC911X_SAVE_MAC_ADDRESS) {
2299 spin_lock_irq(&pdata->mac_lock);
2300 smsc911x_read_mac_address(dev);
2301 spin_unlock_irq(&pdata->mac_lock);
2302 }
2303
2304 /* Reset the LAN911x */
2305 if (smsc911x_phy_reset(pdata) || smsc911x_soft_reset(pdata))
2306 return -ENODEV;
2307
2308 dev->flags |= IFF_MULTICAST;
2309 netif_napi_add_weight(dev, &pdata->napi, smsc911x_poll,
2310 SMSC_NAPI_WEIGHT);
2311 dev->netdev_ops = &smsc911x_netdev_ops;
2312 dev->ethtool_ops = &smsc911x_ethtool_ops;
2313
2314 return 0;
2315 }
2316
smsc911x_drv_remove(struct platform_device * pdev)2317 static int smsc911x_drv_remove(struct platform_device *pdev)
2318 {
2319 struct net_device *dev;
2320 struct smsc911x_data *pdata;
2321 struct resource *res;
2322
2323 dev = platform_get_drvdata(pdev);
2324 BUG_ON(!dev);
2325 pdata = netdev_priv(dev);
2326 BUG_ON(!pdata);
2327 BUG_ON(!pdata->ioaddr);
2328
2329 SMSC_TRACE(pdata, ifdown, "Stopping driver");
2330
2331 unregister_netdev(dev);
2332
2333 mdiobus_unregister(pdata->mii_bus);
2334 mdiobus_free(pdata->mii_bus);
2335
2336 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2337 "smsc911x-memory");
2338 if (!res)
2339 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2340
2341 release_mem_region(res->start, resource_size(res));
2342
2343 iounmap(pdata->ioaddr);
2344
2345 (void)smsc911x_disable_resources(pdev);
2346 smsc911x_free_resources(pdev);
2347
2348 free_netdev(dev);
2349
2350 pm_runtime_disable(&pdev->dev);
2351
2352 return 0;
2353 }
2354
2355 /* standard register acces */
2356 static const struct smsc911x_ops standard_smsc911x_ops = {
2357 .reg_read = __smsc911x_reg_read,
2358 .reg_write = __smsc911x_reg_write,
2359 .rx_readfifo = smsc911x_rx_readfifo,
2360 .tx_writefifo = smsc911x_tx_writefifo,
2361 };
2362
2363 /* shifted register access */
2364 static const struct smsc911x_ops shifted_smsc911x_ops = {
2365 .reg_read = __smsc911x_reg_read_shift,
2366 .reg_write = __smsc911x_reg_write_shift,
2367 .rx_readfifo = smsc911x_rx_readfifo_shift,
2368 .tx_writefifo = smsc911x_tx_writefifo_shift,
2369 };
2370
smsc911x_probe_config(struct smsc911x_platform_config * config,struct device * dev)2371 static int smsc911x_probe_config(struct smsc911x_platform_config *config,
2372 struct device *dev)
2373 {
2374 int phy_interface;
2375 u32 width = 0;
2376 int err;
2377
2378 phy_interface = device_get_phy_mode(dev);
2379 if (phy_interface < 0)
2380 phy_interface = PHY_INTERFACE_MODE_NA;
2381 config->phy_interface = phy_interface;
2382
2383 device_get_mac_address(dev, config->mac);
2384
2385 err = device_property_read_u32(dev, "reg-io-width", &width);
2386 if (err == -ENXIO)
2387 return err;
2388 if (!err && width == 4)
2389 config->flags |= SMSC911X_USE_32BIT;
2390 else
2391 config->flags |= SMSC911X_USE_16BIT;
2392
2393 device_property_read_u32(dev, "reg-shift", &config->shift);
2394
2395 if (device_property_present(dev, "smsc,irq-active-high"))
2396 config->irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH;
2397
2398 if (device_property_present(dev, "smsc,irq-push-pull"))
2399 config->irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL;
2400
2401 if (device_property_present(dev, "smsc,force-internal-phy"))
2402 config->flags |= SMSC911X_FORCE_INTERNAL_PHY;
2403
2404 if (device_property_present(dev, "smsc,force-external-phy"))
2405 config->flags |= SMSC911X_FORCE_EXTERNAL_PHY;
2406
2407 if (device_property_present(dev, "smsc,save-mac-address"))
2408 config->flags |= SMSC911X_SAVE_MAC_ADDRESS;
2409
2410 return 0;
2411 }
2412
smsc911x_drv_probe(struct platform_device * pdev)2413 static int smsc911x_drv_probe(struct platform_device *pdev)
2414 {
2415 struct net_device *dev;
2416 struct smsc911x_data *pdata;
2417 struct smsc911x_platform_config *config = dev_get_platdata(&pdev->dev);
2418 struct resource *res;
2419 int res_size, irq;
2420 int retval;
2421
2422 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
2423 "smsc911x-memory");
2424 if (!res)
2425 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2426 if (!res) {
2427 pr_warn("Could not allocate resource\n");
2428 retval = -ENODEV;
2429 goto out_0;
2430 }
2431 res_size = resource_size(res);
2432
2433 irq = platform_get_irq(pdev, 0);
2434 if (irq == -EPROBE_DEFER) {
2435 retval = -EPROBE_DEFER;
2436 goto out_0;
2437 } else if (irq < 0) {
2438 pr_warn("Could not allocate irq resource\n");
2439 retval = -ENODEV;
2440 goto out_0;
2441 }
2442
2443 if (!request_mem_region(res->start, res_size, SMSC_CHIPNAME)) {
2444 retval = -EBUSY;
2445 goto out_0;
2446 }
2447
2448 dev = alloc_etherdev(sizeof(struct smsc911x_data));
2449 if (!dev) {
2450 retval = -ENOMEM;
2451 goto out_release_io_1;
2452 }
2453
2454 SET_NETDEV_DEV(dev, &pdev->dev);
2455
2456 pdata = netdev_priv(dev);
2457 dev->irq = irq;
2458 pdata->ioaddr = ioremap(res->start, res_size);
2459 if (!pdata->ioaddr) {
2460 retval = -ENOMEM;
2461 goto out_ioremap_fail;
2462 }
2463
2464 pdata->dev = dev;
2465 pdata->msg_enable = ((1 << debug) - 1);
2466
2467 platform_set_drvdata(pdev, dev);
2468
2469 retval = smsc911x_request_resources(pdev);
2470 if (retval)
2471 goto out_request_resources_fail;
2472
2473 retval = smsc911x_enable_resources(pdev);
2474 if (retval)
2475 goto out_enable_resources_fail;
2476
2477 if (pdata->ioaddr == NULL) {
2478 SMSC_WARN(pdata, probe, "Error smsc911x base address invalid");
2479 retval = -ENOMEM;
2480 goto out_disable_resources;
2481 }
2482
2483 retval = smsc911x_probe_config(&pdata->config, &pdev->dev);
2484 if (retval && config) {
2485 /* copy config parameters across to pdata */
2486 memcpy(&pdata->config, config, sizeof(pdata->config));
2487 retval = 0;
2488 }
2489
2490 if (retval) {
2491 SMSC_WARN(pdata, probe, "Error smsc911x config not found");
2492 goto out_disable_resources;
2493 }
2494
2495 /* assume standard, non-shifted, access to HW registers */
2496 pdata->ops = &standard_smsc911x_ops;
2497 /* apply the right access if shifting is needed */
2498 if (pdata->config.shift)
2499 pdata->ops = &shifted_smsc911x_ops;
2500
2501 pm_runtime_enable(&pdev->dev);
2502 pm_runtime_get_sync(&pdev->dev);
2503
2504 retval = smsc911x_init(dev);
2505 if (retval < 0)
2506 goto out_init_fail;
2507
2508 netif_carrier_off(dev);
2509
2510 retval = smsc911x_mii_init(pdev, dev);
2511 if (retval) {
2512 SMSC_WARN(pdata, probe, "Error %i initialising mii", retval);
2513 goto out_init_fail;
2514 }
2515
2516 retval = register_netdev(dev);
2517 if (retval) {
2518 SMSC_WARN(pdata, probe, "Error %i registering device", retval);
2519 goto out_init_fail;
2520 } else {
2521 SMSC_TRACE(pdata, probe,
2522 "Network interface: \"%s\"", dev->name);
2523 }
2524
2525 spin_lock_irq(&pdata->mac_lock);
2526
2527 /* Check if mac address has been specified when bringing interface up */
2528 if (is_valid_ether_addr(dev->dev_addr)) {
2529 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2530 SMSC_TRACE(pdata, probe,
2531 "MAC Address is specified by configuration");
2532 } else if (is_valid_ether_addr(pdata->config.mac)) {
2533 eth_hw_addr_set(dev, pdata->config.mac);
2534 SMSC_TRACE(pdata, probe,
2535 "MAC Address specified by platform data");
2536 } else {
2537 /* Try reading mac address from device. if EEPROM is present
2538 * it will already have been set */
2539 smsc_get_mac(dev);
2540
2541 if (is_valid_ether_addr(dev->dev_addr)) {
2542 /* eeprom values are valid so use them */
2543 SMSC_TRACE(pdata, probe,
2544 "Mac Address is read from LAN911x EEPROM");
2545 } else {
2546 /* eeprom values are invalid, generate random MAC */
2547 eth_hw_addr_random(dev);
2548 smsc911x_set_hw_mac_address(pdata, dev->dev_addr);
2549 SMSC_TRACE(pdata, probe,
2550 "MAC Address is set to eth_random_addr");
2551 }
2552 }
2553
2554 spin_unlock_irq(&pdata->mac_lock);
2555 pm_runtime_put(&pdev->dev);
2556
2557 netdev_info(dev, "MAC Address: %pM\n", dev->dev_addr);
2558
2559 return 0;
2560
2561 out_init_fail:
2562 pm_runtime_put(&pdev->dev);
2563 pm_runtime_disable(&pdev->dev);
2564 out_disable_resources:
2565 (void)smsc911x_disable_resources(pdev);
2566 out_enable_resources_fail:
2567 smsc911x_free_resources(pdev);
2568 out_request_resources_fail:
2569 iounmap(pdata->ioaddr);
2570 out_ioremap_fail:
2571 free_netdev(dev);
2572 out_release_io_1:
2573 release_mem_region(res->start, resource_size(res));
2574 out_0:
2575 return retval;
2576 }
2577
2578 #ifdef CONFIG_PM
2579 /* This implementation assumes the devices remains powered on its VDDVARIO
2580 * pins during suspend. */
2581
2582 /* TODO: implement freeze/thaw callbacks for hibernation.*/
2583
smsc911x_suspend(struct device * dev)2584 static int smsc911x_suspend(struct device *dev)
2585 {
2586 struct net_device *ndev = dev_get_drvdata(dev);
2587 struct smsc911x_data *pdata = netdev_priv(ndev);
2588
2589 if (netif_running(ndev)) {
2590 netif_stop_queue(ndev);
2591 netif_device_detach(ndev);
2592 if (!device_may_wakeup(dev))
2593 phy_stop(ndev->phydev);
2594 }
2595
2596 /* enable wake on LAN, energy detection and the external PME
2597 * signal. */
2598 smsc911x_reg_write(pdata, PMT_CTRL,
2599 PMT_CTRL_PM_MODE_D1_ | PMT_CTRL_WOL_EN_ |
2600 PMT_CTRL_ED_EN_ | PMT_CTRL_PME_EN_);
2601
2602 pm_runtime_disable(dev);
2603 pm_runtime_set_suspended(dev);
2604
2605 return 0;
2606 }
2607
smsc911x_resume(struct device * dev)2608 static int smsc911x_resume(struct device *dev)
2609 {
2610 struct net_device *ndev = dev_get_drvdata(dev);
2611 struct smsc911x_data *pdata = netdev_priv(ndev);
2612 unsigned int to = 100;
2613
2614 pm_runtime_enable(dev);
2615 pm_runtime_resume(dev);
2616
2617 /* Note 3.11 from the datasheet:
2618 * "When the LAN9220 is in a power saving state, a write of any
2619 * data to the BYTE_TEST register will wake-up the device."
2620 */
2621 smsc911x_reg_write(pdata, BYTE_TEST, 0);
2622
2623 /* poll the READY bit in PMT_CTRL. Any other access to the device is
2624 * forbidden while this bit isn't set. Try for 100ms and return -EIO
2625 * if it failed. */
2626 while (!(smsc911x_reg_read(pdata, PMT_CTRL) & PMT_CTRL_READY_) && --to)
2627 udelay(1000);
2628
2629 if (to == 0)
2630 return -EIO;
2631
2632 if (netif_running(ndev)) {
2633 netif_device_attach(ndev);
2634 netif_start_queue(ndev);
2635 if (!device_may_wakeup(dev))
2636 phy_start(ndev->phydev);
2637 }
2638
2639 return 0;
2640 }
2641
2642 static const struct dev_pm_ops smsc911x_pm_ops = {
2643 .suspend = smsc911x_suspend,
2644 .resume = smsc911x_resume,
2645 };
2646
2647 #define SMSC911X_PM_OPS (&smsc911x_pm_ops)
2648
2649 #else
2650 #define SMSC911X_PM_OPS NULL
2651 #endif
2652
2653 #ifdef CONFIG_OF
2654 static const struct of_device_id smsc911x_dt_ids[] = {
2655 { .compatible = "smsc,lan9115", },
2656 { /* sentinel */ }
2657 };
2658 MODULE_DEVICE_TABLE(of, smsc911x_dt_ids);
2659 #endif
2660
2661 #ifdef CONFIG_ACPI
2662 static const struct acpi_device_id smsc911x_acpi_match[] = {
2663 { "ARMH9118", 0 },
2664 { }
2665 };
2666 MODULE_DEVICE_TABLE(acpi, smsc911x_acpi_match);
2667 #endif
2668
2669 static struct platform_driver smsc911x_driver = {
2670 .probe = smsc911x_drv_probe,
2671 .remove = smsc911x_drv_remove,
2672 .driver = {
2673 .name = SMSC_CHIPNAME,
2674 .pm = SMSC911X_PM_OPS,
2675 .of_match_table = of_match_ptr(smsc911x_dt_ids),
2676 .acpi_match_table = ACPI_PTR(smsc911x_acpi_match),
2677 },
2678 };
2679
2680 /* Entry point for loading the module */
smsc911x_init_module(void)2681 static int __init smsc911x_init_module(void)
2682 {
2683 SMSC_INITIALIZE();
2684 return platform_driver_register(&smsc911x_driver);
2685 }
2686
2687 /* entry point for unloading the module */
smsc911x_cleanup_module(void)2688 static void __exit smsc911x_cleanup_module(void)
2689 {
2690 platform_driver_unregister(&smsc911x_driver);
2691 }
2692
2693 module_init(smsc911x_init_module);
2694 module_exit(smsc911x_cleanup_module);
2695
