1 /*
2  * smc911x.c
3  * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
4  *
5  * Copyright (C) 2005 Sensoria Corp
6  *	   Derived from the unified SMC91x driver by Nicolas Pitre
7  *	   and the smsc911x.c reference driver by SMSC
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  * GNU General Public License for more details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this program; if not, see <http://www.gnu.org/licenses/>.
21  *
22  * Arguments:
23  *	 watchdog  = TX watchdog timeout
24  *	 tx_fifo_kb = Size of TX FIFO in KB
25  *
26  * History:
27  *	  04/16/05	Dustin McIntire		 Initial version
28  */
29 static const char version[] =
30 	 "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
31 
32 /* Debugging options */
33 #define ENABLE_SMC_DEBUG_RX		0
34 #define ENABLE_SMC_DEBUG_TX		0
35 #define ENABLE_SMC_DEBUG_DMA		0
36 #define ENABLE_SMC_DEBUG_PKTS		0
37 #define ENABLE_SMC_DEBUG_MISC		0
38 #define ENABLE_SMC_DEBUG_FUNC		0
39 
40 #define SMC_DEBUG_RX		((ENABLE_SMC_DEBUG_RX	? 1 : 0) << 0)
41 #define SMC_DEBUG_TX		((ENABLE_SMC_DEBUG_TX	? 1 : 0) << 1)
42 #define SMC_DEBUG_DMA		((ENABLE_SMC_DEBUG_DMA	? 1 : 0) << 2)
43 #define SMC_DEBUG_PKTS		((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
44 #define SMC_DEBUG_MISC		((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
45 #define SMC_DEBUG_FUNC		((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
46 
47 #ifndef SMC_DEBUG
48 #define SMC_DEBUG	 ( SMC_DEBUG_RX	  | \
49 			   SMC_DEBUG_TX	  | \
50 			   SMC_DEBUG_DMA  | \
51 			   SMC_DEBUG_PKTS | \
52 			   SMC_DEBUG_MISC | \
53 			   SMC_DEBUG_FUNC   \
54 			 )
55 #endif
56 
57 #include <linux/module.h>
58 #include <linux/kernel.h>
59 #include <linux/sched.h>
60 #include <linux/delay.h>
61 #include <linux/interrupt.h>
62 #include <linux/errno.h>
63 #include <linux/ioport.h>
64 #include <linux/crc32.h>
65 #include <linux/device.h>
66 #include <linux/platform_device.h>
67 #include <linux/spinlock.h>
68 #include <linux/ethtool.h>
69 #include <linux/mii.h>
70 #include <linux/workqueue.h>
71 
72 #include <linux/netdevice.h>
73 #include <linux/etherdevice.h>
74 #include <linux/skbuff.h>
75 
76 #include <linux/dmaengine.h>
77 
78 #include <asm/io.h>
79 
80 #include "smc911x.h"
81 
82 /*
83  * Transmit timeout, default 5 seconds.
84  */
85 static int watchdog = 5000;
86 module_param(watchdog, int, 0400);
87 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
88 
89 static int tx_fifo_kb=8;
90 module_param(tx_fifo_kb, int, 0400);
91 MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
92 
93 MODULE_LICENSE("GPL");
94 MODULE_ALIAS("platform:smc911x");
95 
96 /*
97  * The internal workings of the driver.  If you are changing anything
98  * here with the SMC stuff, you should have the datasheet and know
99  * what you are doing.
100  */
101 #define CARDNAME "smc911x"
102 
103 /*
104  * Use power-down feature of the chip
105  */
106 #define POWER_DOWN		 1
107 
108 #if SMC_DEBUG > 0
109 #define DBG(n, dev, args...)			 \
110 	do {					 \
111 		if (SMC_DEBUG & (n))		 \
112 			netdev_dbg(dev, args);	 \
113 	} while (0)
114 
115 #define PRINTK(dev, args...)   netdev_info(dev, args)
116 #else
117 #define DBG(n, dev, args...)   do { } while (0)
118 #define PRINTK(dev, args...)   netdev_dbg(dev, args)
119 #endif
120 
121 #if SMC_DEBUG_PKTS > 0
PRINT_PKT(u_char * buf,int length)122 static void PRINT_PKT(u_char *buf, int length)
123 {
124 	int i;
125 	int remainder;
126 	int lines;
127 
128 	lines = length / 16;
129 	remainder = length % 16;
130 
131 	for (i = 0; i < lines ; i ++) {
132 		int cur;
133 		printk(KERN_DEBUG);
134 		for (cur = 0; cur < 8; cur++) {
135 			u_char a, b;
136 			a = *buf++;
137 			b = *buf++;
138 			pr_cont("%02x%02x ", a, b);
139 		}
140 		pr_cont("\n");
141 	}
142 	printk(KERN_DEBUG);
143 	for (i = 0; i < remainder/2 ; i++) {
144 		u_char a, b;
145 		a = *buf++;
146 		b = *buf++;
147 		pr_cont("%02x%02x ", a, b);
148 	}
149 	pr_cont("\n");
150 }
151 #else
152 #define PRINT_PKT(x...)  do { } while (0)
153 #endif
154 
155 
156 /* this enables an interrupt in the interrupt mask register */
157 #define SMC_ENABLE_INT(lp, x) do {			\
158 	unsigned int  __mask;				\
159 	__mask = SMC_GET_INT_EN((lp));			\
160 	__mask |= (x);					\
161 	SMC_SET_INT_EN((lp), __mask);			\
162 } while (0)
163 
164 /* this disables an interrupt from the interrupt mask register */
165 #define SMC_DISABLE_INT(lp, x) do {			\
166 	unsigned int  __mask;				\
167 	__mask = SMC_GET_INT_EN((lp));			\
168 	__mask &= ~(x);					\
169 	SMC_SET_INT_EN((lp), __mask);			\
170 } while (0)
171 
172 /*
173  * this does a soft reset on the device
174  */
smc911x_reset(struct net_device * dev)175 static void smc911x_reset(struct net_device *dev)
176 {
177 	struct smc911x_local *lp = netdev_priv(dev);
178 	unsigned int reg, timeout=0, resets=1, irq_cfg;
179 	unsigned long flags;
180 
181 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
182 
183 	/*	 Take out of PM setting first */
184 	if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
185 		/* Write to the bytetest will take out of powerdown */
186 		SMC_SET_BYTE_TEST(lp, 0);
187 		timeout=10;
188 		do {
189 			udelay(10);
190 			reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
191 		} while (--timeout && !reg);
192 		if (timeout == 0) {
193 			PRINTK(dev, "smc911x_reset timeout waiting for PM restore\n");
194 			return;
195 		}
196 	}
197 
198 	/* Disable all interrupts */
199 	spin_lock_irqsave(&lp->lock, flags);
200 	SMC_SET_INT_EN(lp, 0);
201 	spin_unlock_irqrestore(&lp->lock, flags);
202 
203 	while (resets--) {
204 		SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
205 		timeout=10;
206 		do {
207 			udelay(10);
208 			reg = SMC_GET_HW_CFG(lp);
209 			/* If chip indicates reset timeout then try again */
210 			if (reg & HW_CFG_SRST_TO_) {
211 				PRINTK(dev, "chip reset timeout, retrying...\n");
212 				resets++;
213 				break;
214 			}
215 		} while (--timeout && (reg & HW_CFG_SRST_));
216 	}
217 	if (timeout == 0) {
218 		PRINTK(dev, "smc911x_reset timeout waiting for reset\n");
219 		return;
220 	}
221 
222 	/* make sure EEPROM has finished loading before setting GPIO_CFG */
223 	timeout=1000;
224 	while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
225 		udelay(10);
226 
227 	if (timeout == 0){
228 		PRINTK(dev, "smc911x_reset timeout waiting for EEPROM busy\n");
229 		return;
230 	}
231 
232 	/* Initialize interrupts */
233 	SMC_SET_INT_EN(lp, 0);
234 	SMC_ACK_INT(lp, -1);
235 
236 	/* Reset the FIFO level and flow control settings */
237 	SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
238 //TODO: Figure out what appropriate pause time is
239 	SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
240 	SMC_SET_AFC_CFG(lp, lp->afc_cfg);
241 
242 
243 	/* Set to LED outputs */
244 	SMC_SET_GPIO_CFG(lp, 0x70070000);
245 
246 	/*
247 	 * Deassert IRQ for 1*10us for edge type interrupts
248 	 * and drive IRQ pin push-pull
249 	 */
250 	irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
251 #ifdef SMC_DYNAMIC_BUS_CONFIG
252 	if (lp->cfg.irq_polarity)
253 		irq_cfg |= INT_CFG_IRQ_POL_;
254 #endif
255 	SMC_SET_IRQ_CFG(lp, irq_cfg);
256 
257 	/* clear anything saved */
258 	if (lp->pending_tx_skb != NULL) {
259 		dev_kfree_skb (lp->pending_tx_skb);
260 		lp->pending_tx_skb = NULL;
261 		dev->stats.tx_errors++;
262 		dev->stats.tx_aborted_errors++;
263 	}
264 }
265 
266 /*
267  * Enable Interrupts, Receive, and Transmit
268  */
smc911x_enable(struct net_device * dev)269 static void smc911x_enable(struct net_device *dev)
270 {
271 	struct smc911x_local *lp = netdev_priv(dev);
272 	unsigned mask, cfg, cr;
273 	unsigned long flags;
274 
275 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
276 
277 	spin_lock_irqsave(&lp->lock, flags);
278 
279 	SMC_SET_MAC_ADDR(lp, dev->dev_addr);
280 
281 	/* Enable TX */
282 	cfg = SMC_GET_HW_CFG(lp);
283 	cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
284 	cfg |= HW_CFG_SF_;
285 	SMC_SET_HW_CFG(lp, cfg);
286 	SMC_SET_FIFO_TDA(lp, 0xFF);
287 	/* Update TX stats on every 64 packets received or every 1 sec */
288 	SMC_SET_FIFO_TSL(lp, 64);
289 	SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
290 
291 	SMC_GET_MAC_CR(lp, cr);
292 	cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
293 	SMC_SET_MAC_CR(lp, cr);
294 	SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
295 
296 	/* Add 2 byte padding to start of packets */
297 	SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
298 
299 	/* Turn on receiver and enable RX */
300 	if (cr & MAC_CR_RXEN_)
301 		DBG(SMC_DEBUG_RX, dev, "Receiver already enabled\n");
302 
303 	SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
304 
305 	/* Interrupt on every received packet */
306 	SMC_SET_FIFO_RSA(lp, 0x01);
307 	SMC_SET_FIFO_RSL(lp, 0x00);
308 
309 	/* now, enable interrupts */
310 	mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
311 		INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
312 		INT_EN_PHY_INT_EN_;
313 	if (IS_REV_A(lp->revision))
314 		mask|=INT_EN_RDFL_EN_;
315 	else {
316 		mask|=INT_EN_RDFO_EN_;
317 	}
318 	SMC_ENABLE_INT(lp, mask);
319 
320 	spin_unlock_irqrestore(&lp->lock, flags);
321 }
322 
323 /*
324  * this puts the device in an inactive state
325  */
smc911x_shutdown(struct net_device * dev)326 static void smc911x_shutdown(struct net_device *dev)
327 {
328 	struct smc911x_local *lp = netdev_priv(dev);
329 	unsigned cr;
330 	unsigned long flags;
331 
332 	DBG(SMC_DEBUG_FUNC, dev, "%s: --> %s\n", CARDNAME, __func__);
333 
334 	/* Disable IRQ's */
335 	SMC_SET_INT_EN(lp, 0);
336 
337 	/* Turn of Rx and TX */
338 	spin_lock_irqsave(&lp->lock, flags);
339 	SMC_GET_MAC_CR(lp, cr);
340 	cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
341 	SMC_SET_MAC_CR(lp, cr);
342 	SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
343 	spin_unlock_irqrestore(&lp->lock, flags);
344 }
345 
smc911x_drop_pkt(struct net_device * dev)346 static inline void smc911x_drop_pkt(struct net_device *dev)
347 {
348 	struct smc911x_local *lp = netdev_priv(dev);
349 	unsigned int fifo_count, timeout, reg;
350 
351 	DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "%s: --> %s\n",
352 	    CARDNAME, __func__);
353 	fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
354 	if (fifo_count <= 4) {
355 		/* Manually dump the packet data */
356 		while (fifo_count--)
357 			SMC_GET_RX_FIFO(lp);
358 	} else	 {
359 		/* Fast forward through the bad packet */
360 		SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
361 		timeout=50;
362 		do {
363 			udelay(10);
364 			reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
365 		} while (--timeout && reg);
366 		if (timeout == 0) {
367 			PRINTK(dev, "timeout waiting for RX fast forward\n");
368 		}
369 	}
370 }
371 
372 /*
373  * This is the procedure to handle the receipt of a packet.
374  * It should be called after checking for packet presence in
375  * the RX status FIFO.	 It must be called with the spin lock
376  * already held.
377  */
smc911x_rcv(struct net_device * dev)378 static inline void	 smc911x_rcv(struct net_device *dev)
379 {
380 	struct smc911x_local *lp = netdev_priv(dev);
381 	unsigned int pkt_len, status;
382 	struct sk_buff *skb;
383 	unsigned char *data;
384 
385 	DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "--> %s\n",
386 	    __func__);
387 	status = SMC_GET_RX_STS_FIFO(lp);
388 	DBG(SMC_DEBUG_RX, dev, "Rx pkt len %d status 0x%08x\n",
389 	    (status & 0x3fff0000) >> 16, status & 0xc000ffff);
390 	pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
391 	if (status & RX_STS_ES_) {
392 		/* Deal with a bad packet */
393 		dev->stats.rx_errors++;
394 		if (status & RX_STS_CRC_ERR_)
395 			dev->stats.rx_crc_errors++;
396 		else {
397 			if (status & RX_STS_LEN_ERR_)
398 				dev->stats.rx_length_errors++;
399 			if (status & RX_STS_MCAST_)
400 				dev->stats.multicast++;
401 		}
402 		/* Remove the bad packet data from the RX FIFO */
403 		smc911x_drop_pkt(dev);
404 	} else {
405 		/* Receive a valid packet */
406 		/* Alloc a buffer with extra room for DMA alignment */
407 		skb = netdev_alloc_skb(dev, pkt_len+32);
408 		if (unlikely(skb == NULL)) {
409 			PRINTK(dev, "Low memory, rcvd packet dropped.\n");
410 			dev->stats.rx_dropped++;
411 			smc911x_drop_pkt(dev);
412 			return;
413 		}
414 		/* Align IP header to 32 bits
415 		 * Note that the device is configured to add a 2
416 		 * byte padding to the packet start, so we really
417 		 * want to write to the orignal data pointer */
418 		data = skb->data;
419 		skb_reserve(skb, 2);
420 		skb_put(skb,pkt_len-4);
421 #ifdef SMC_USE_DMA
422 		{
423 		unsigned int fifo;
424 		/* Lower the FIFO threshold if possible */
425 		fifo = SMC_GET_FIFO_INT(lp);
426 		if (fifo & 0xFF) fifo--;
427 		DBG(SMC_DEBUG_RX, dev, "Setting RX stat FIFO threshold to %d\n",
428 		    fifo & 0xff);
429 		SMC_SET_FIFO_INT(lp, fifo);
430 		/* Setup RX DMA */
431 		SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
432 		lp->rxdma_active = 1;
433 		lp->current_rx_skb = skb;
434 		SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
435 		/* Packet processing deferred to DMA RX interrupt */
436 		}
437 #else
438 		SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
439 		SMC_PULL_DATA(lp, data, pkt_len+2+3);
440 
441 		DBG(SMC_DEBUG_PKTS, dev, "Received packet\n");
442 		PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
443 		skb->protocol = eth_type_trans(skb, dev);
444 		netif_rx(skb);
445 		dev->stats.rx_packets++;
446 		dev->stats.rx_bytes += pkt_len-4;
447 #endif
448 	}
449 }
450 
451 /*
452  * This is called to actually send a packet to the chip.
453  */
smc911x_hardware_send_pkt(struct net_device * dev)454 static void smc911x_hardware_send_pkt(struct net_device *dev)
455 {
456 	struct smc911x_local *lp = netdev_priv(dev);
457 	struct sk_buff *skb;
458 	unsigned int cmdA, cmdB, len;
459 	unsigned char *buf;
460 
461 	DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n", __func__);
462 	BUG_ON(lp->pending_tx_skb == NULL);
463 
464 	skb = lp->pending_tx_skb;
465 	lp->pending_tx_skb = NULL;
466 
467 	/* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
468 	/* cmdB {31:16] pkt tag [10:0] length */
469 #ifdef SMC_USE_DMA
470 	/* 16 byte buffer alignment mode */
471 	buf = (char*)((u32)(skb->data) & ~0xF);
472 	len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
473 	cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
474 			TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
475 			skb->len;
476 #else
477 	buf = (char*)((u32)skb->data & ~0x3);
478 	len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
479 	cmdA = (((u32)skb->data & 0x3) << 16) |
480 			TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
481 			skb->len;
482 #endif
483 	/* tag is packet length so we can use this in stats update later */
484 	cmdB = (skb->len  << 16) | (skb->len & 0x7FF);
485 
486 	DBG(SMC_DEBUG_TX, dev, "TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
487 	    len, len, buf, cmdA, cmdB);
488 	SMC_SET_TX_FIFO(lp, cmdA);
489 	SMC_SET_TX_FIFO(lp, cmdB);
490 
491 	DBG(SMC_DEBUG_PKTS, dev, "Transmitted packet\n");
492 	PRINT_PKT(buf, len <= 64 ? len : 64);
493 
494 	/* Send pkt via PIO or DMA */
495 #ifdef SMC_USE_DMA
496 	lp->current_tx_skb = skb;
497 	SMC_PUSH_DATA(lp, buf, len);
498 	/* DMA complete IRQ will free buffer and set jiffies */
499 #else
500 	SMC_PUSH_DATA(lp, buf, len);
501 	netif_trans_update(dev);
502 	dev_kfree_skb_irq(skb);
503 #endif
504 	if (!lp->tx_throttle) {
505 		netif_wake_queue(dev);
506 	}
507 	SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
508 }
509 
510 /*
511  * Since I am not sure if I will have enough room in the chip's ram
512  * to store the packet, I call this routine which either sends it
513  * now, or set the card to generates an interrupt when ready
514  * for the packet.
515  */
smc911x_hard_start_xmit(struct sk_buff * skb,struct net_device * dev)516 static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
517 {
518 	struct smc911x_local *lp = netdev_priv(dev);
519 	unsigned int free;
520 	unsigned long flags;
521 
522 	DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
523 	    __func__);
524 
525 	spin_lock_irqsave(&lp->lock, flags);
526 
527 	BUG_ON(lp->pending_tx_skb != NULL);
528 
529 	free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
530 	DBG(SMC_DEBUG_TX, dev, "TX free space %d\n", free);
531 
532 	/* Turn off the flow when running out of space in FIFO */
533 	if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
534 		DBG(SMC_DEBUG_TX, dev, "Disabling data flow due to low FIFO space (%d)\n",
535 		    free);
536 		/* Reenable when at least 1 packet of size MTU present */
537 		SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
538 		lp->tx_throttle = 1;
539 		netif_stop_queue(dev);
540 	}
541 
542 	/* Drop packets when we run out of space in TX FIFO
543 	 * Account for overhead required for:
544 	 *
545 	 *	  Tx command words			 8 bytes
546 	 *	  Start offset				 15 bytes
547 	 *	  End padding				 15 bytes
548 	 */
549 	if (unlikely(free < (skb->len + 8 + 15 + 15))) {
550 		netdev_warn(dev, "No Tx free space %d < %d\n",
551 			    free, skb->len);
552 		lp->pending_tx_skb = NULL;
553 		dev->stats.tx_errors++;
554 		dev->stats.tx_dropped++;
555 		spin_unlock_irqrestore(&lp->lock, flags);
556 		dev_kfree_skb_any(skb);
557 		return NETDEV_TX_OK;
558 	}
559 
560 #ifdef SMC_USE_DMA
561 	{
562 		/* If the DMA is already running then defer this packet Tx until
563 		 * the DMA IRQ starts it
564 		 */
565 		if (lp->txdma_active) {
566 			DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Tx DMA running, deferring packet\n");
567 			lp->pending_tx_skb = skb;
568 			netif_stop_queue(dev);
569 			spin_unlock_irqrestore(&lp->lock, flags);
570 			return NETDEV_TX_OK;
571 		} else {
572 			DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Activating Tx DMA\n");
573 			lp->txdma_active = 1;
574 		}
575 	}
576 #endif
577 	lp->pending_tx_skb = skb;
578 	smc911x_hardware_send_pkt(dev);
579 	spin_unlock_irqrestore(&lp->lock, flags);
580 
581 	return NETDEV_TX_OK;
582 }
583 
584 /*
585  * This handles a TX status interrupt, which is only called when:
586  * - a TX error occurred, or
587  * - TX of a packet completed.
588  */
smc911x_tx(struct net_device * dev)589 static void smc911x_tx(struct net_device *dev)
590 {
591 	struct smc911x_local *lp = netdev_priv(dev);
592 	unsigned int tx_status;
593 
594 	DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n",
595 	    __func__);
596 
597 	/* Collect the TX status */
598 	while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
599 		DBG(SMC_DEBUG_TX, dev, "Tx stat FIFO used 0x%04x\n",
600 		    (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
601 		tx_status = SMC_GET_TX_STS_FIFO(lp);
602 		dev->stats.tx_packets++;
603 		dev->stats.tx_bytes+=tx_status>>16;
604 		DBG(SMC_DEBUG_TX, dev, "Tx FIFO tag 0x%04x status 0x%04x\n",
605 		    (tx_status & 0xffff0000) >> 16,
606 		    tx_status & 0x0000ffff);
607 		/* count Tx errors, but ignore lost carrier errors when in
608 		 * full-duplex mode */
609 		if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
610 		    !(tx_status & 0x00000306))) {
611 			dev->stats.tx_errors++;
612 		}
613 		if (tx_status & TX_STS_MANY_COLL_) {
614 			dev->stats.collisions+=16;
615 			dev->stats.tx_aborted_errors++;
616 		} else {
617 			dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
618 		}
619 		/* carrier error only has meaning for half-duplex communication */
620 		if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
621 		    !lp->ctl_rfduplx) {
622 			dev->stats.tx_carrier_errors++;
623 		}
624 		if (tx_status & TX_STS_LATE_COLL_) {
625 			dev->stats.collisions++;
626 			dev->stats.tx_aborted_errors++;
627 		}
628 	}
629 }
630 
631 
632 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
633 /*
634  * Reads a register from the MII Management serial interface
635  */
636 
smc911x_phy_read(struct net_device * dev,int phyaddr,int phyreg)637 static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
638 {
639 	struct smc911x_local *lp = netdev_priv(dev);
640 	unsigned int phydata;
641 
642 	SMC_GET_MII(lp, phyreg, phyaddr, phydata);
643 
644 	DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
645 	    __func__, phyaddr, phyreg, phydata);
646 	return phydata;
647 }
648 
649 
650 /*
651  * Writes a register to the MII Management serial interface
652  */
smc911x_phy_write(struct net_device * dev,int phyaddr,int phyreg,int phydata)653 static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
654 			int phydata)
655 {
656 	struct smc911x_local *lp = netdev_priv(dev);
657 
658 	DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
659 	    __func__, phyaddr, phyreg, phydata);
660 
661 	SMC_SET_MII(lp, phyreg, phyaddr, phydata);
662 }
663 
664 /*
665  * Finds and reports the PHY address (115 and 117 have external
666  * PHY interface 118 has internal only
667  */
smc911x_phy_detect(struct net_device * dev)668 static void smc911x_phy_detect(struct net_device *dev)
669 {
670 	struct smc911x_local *lp = netdev_priv(dev);
671 	int phyaddr;
672 	unsigned int cfg, id1, id2;
673 
674 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
675 
676 	lp->phy_type = 0;
677 
678 	/*
679 	 * Scan all 32 PHY addresses if necessary, starting at
680 	 * PHY#1 to PHY#31, and then PHY#0 last.
681 	 */
682 	switch(lp->version) {
683 		case CHIP_9115:
684 		case CHIP_9117:
685 		case CHIP_9215:
686 		case CHIP_9217:
687 			cfg = SMC_GET_HW_CFG(lp);
688 			if (cfg & HW_CFG_EXT_PHY_DET_) {
689 				cfg &= ~HW_CFG_PHY_CLK_SEL_;
690 				cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
691 				SMC_SET_HW_CFG(lp, cfg);
692 				udelay(10); /* Wait for clocks to stop */
693 
694 				cfg |= HW_CFG_EXT_PHY_EN_;
695 				SMC_SET_HW_CFG(lp, cfg);
696 				udelay(10); /* Wait for clocks to stop */
697 
698 				cfg &= ~HW_CFG_PHY_CLK_SEL_;
699 				cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
700 				SMC_SET_HW_CFG(lp, cfg);
701 				udelay(10); /* Wait for clocks to stop */
702 
703 				cfg |= HW_CFG_SMI_SEL_;
704 				SMC_SET_HW_CFG(lp, cfg);
705 
706 				for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
707 
708 					/* Read the PHY identifiers */
709 					SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
710 					SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
711 
712 					/* Make sure it is a valid identifier */
713 					if (id1 != 0x0000 && id1 != 0xffff &&
714 					    id1 != 0x8000 && id2 != 0x0000 &&
715 					    id2 != 0xffff && id2 != 0x8000) {
716 						/* Save the PHY's address */
717 						lp->mii.phy_id = phyaddr & 31;
718 						lp->phy_type = id1 << 16 | id2;
719 						break;
720 					}
721 				}
722 				if (phyaddr < 32)
723 					/* Found an external PHY */
724 					break;
725 			}
726 		default:
727 			/* Internal media only */
728 			SMC_GET_PHY_ID1(lp, 1, id1);
729 			SMC_GET_PHY_ID2(lp, 1, id2);
730 			/* Save the PHY's address */
731 			lp->mii.phy_id = 1;
732 			lp->phy_type = id1 << 16 | id2;
733 	}
734 
735 	DBG(SMC_DEBUG_MISC, dev, "phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%x\n",
736 	    id1, id2, lp->mii.phy_id);
737 }
738 
739 /*
740  * Sets the PHY to a configuration as determined by the user.
741  * Called with spin_lock held.
742  */
smc911x_phy_fixed(struct net_device * dev)743 static int smc911x_phy_fixed(struct net_device *dev)
744 {
745 	struct smc911x_local *lp = netdev_priv(dev);
746 	int phyaddr = lp->mii.phy_id;
747 	int bmcr;
748 
749 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
750 
751 	/* Enter Link Disable state */
752 	SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
753 	bmcr |= BMCR_PDOWN;
754 	SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
755 
756 	/*
757 	 * Set our fixed capabilities
758 	 * Disable auto-negotiation
759 	 */
760 	bmcr &= ~BMCR_ANENABLE;
761 	if (lp->ctl_rfduplx)
762 		bmcr |= BMCR_FULLDPLX;
763 
764 	if (lp->ctl_rspeed == 100)
765 		bmcr |= BMCR_SPEED100;
766 
767 	/* Write our capabilities to the phy control register */
768 	SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
769 
770 	/* Re-Configure the Receive/Phy Control register */
771 	bmcr &= ~BMCR_PDOWN;
772 	SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
773 
774 	return 1;
775 }
776 
777 /**
778  * smc911x_phy_reset - reset the phy
779  * @dev: net device
780  * @phy: phy address
781  *
782  * Issue a software reset for the specified PHY and
783  * wait up to 100ms for the reset to complete.	 We should
784  * not access the PHY for 50ms after issuing the reset.
785  *
786  * The time to wait appears to be dependent on the PHY.
787  *
788  */
smc911x_phy_reset(struct net_device * dev,int phy)789 static int smc911x_phy_reset(struct net_device *dev, int phy)
790 {
791 	struct smc911x_local *lp = netdev_priv(dev);
792 	int timeout;
793 	unsigned long flags;
794 	unsigned int reg;
795 
796 	DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
797 
798 	spin_lock_irqsave(&lp->lock, flags);
799 	reg = SMC_GET_PMT_CTRL(lp);
800 	reg &= ~0xfffff030;
801 	reg |= PMT_CTRL_PHY_RST_;
802 	SMC_SET_PMT_CTRL(lp, reg);
803 	spin_unlock_irqrestore(&lp->lock, flags);
804 	for (timeout = 2; timeout; timeout--) {
805 		msleep(50);
806 		spin_lock_irqsave(&lp->lock, flags);
807 		reg = SMC_GET_PMT_CTRL(lp);
808 		spin_unlock_irqrestore(&lp->lock, flags);
809 		if (!(reg & PMT_CTRL_PHY_RST_)) {
810 			/* extra delay required because the phy may
811 			 * not be completed with its reset
812 			 * when PHY_BCR_RESET_ is cleared. 256us
813 			 * should suffice, but use 500us to be safe
814 			 */
815 			udelay(500);
816 		break;
817 		}
818 	}
819 
820 	return reg & PMT_CTRL_PHY_RST_;
821 }
822 
823 /**
824  * smc911x_phy_powerdown - powerdown phy
825  * @dev: net device
826  * @phy: phy address
827  *
828  * Power down the specified PHY
829  */
smc911x_phy_powerdown(struct net_device * dev,int phy)830 static void smc911x_phy_powerdown(struct net_device *dev, int phy)
831 {
832 	struct smc911x_local *lp = netdev_priv(dev);
833 	unsigned int bmcr;
834 
835 	/* Enter Link Disable state */
836 	SMC_GET_PHY_BMCR(lp, phy, bmcr);
837 	bmcr |= BMCR_PDOWN;
838 	SMC_SET_PHY_BMCR(lp, phy, bmcr);
839 }
840 
841 /**
842  * smc911x_phy_check_media - check the media status and adjust BMCR
843  * @dev: net device
844  * @init: set true for initialisation
845  *
846  * Select duplex mode depending on negotiation state.	This
847  * also updates our carrier state.
848  */
smc911x_phy_check_media(struct net_device * dev,int init)849 static void smc911x_phy_check_media(struct net_device *dev, int init)
850 {
851 	struct smc911x_local *lp = netdev_priv(dev);
852 	int phyaddr = lp->mii.phy_id;
853 	unsigned int bmcr, cr;
854 
855 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
856 
857 	if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
858 		/* duplex state has changed */
859 		SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
860 		SMC_GET_MAC_CR(lp, cr);
861 		if (lp->mii.full_duplex) {
862 			DBG(SMC_DEBUG_MISC, dev, "Configuring for full-duplex mode\n");
863 			bmcr |= BMCR_FULLDPLX;
864 			cr |= MAC_CR_RCVOWN_;
865 		} else {
866 			DBG(SMC_DEBUG_MISC, dev, "Configuring for half-duplex mode\n");
867 			bmcr &= ~BMCR_FULLDPLX;
868 			cr &= ~MAC_CR_RCVOWN_;
869 		}
870 		SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
871 		SMC_SET_MAC_CR(lp, cr);
872 	}
873 }
874 
875 /*
876  * Configures the specified PHY through the MII management interface
877  * using Autonegotiation.
878  * Calls smc911x_phy_fixed() if the user has requested a certain config.
879  * If RPC ANEG bit is set, the media selection is dependent purely on
880  * the selection by the MII (either in the MII BMCR reg or the result
881  * of autonegotiation.)  If the RPC ANEG bit is cleared, the selection
882  * is controlled by the RPC SPEED and RPC DPLX bits.
883  */
smc911x_phy_configure(struct work_struct * work)884 static void smc911x_phy_configure(struct work_struct *work)
885 {
886 	struct smc911x_local *lp = container_of(work, struct smc911x_local,
887 						phy_configure);
888 	struct net_device *dev = lp->netdev;
889 	int phyaddr = lp->mii.phy_id;
890 	int my_phy_caps; /* My PHY capabilities */
891 	int my_ad_caps; /* My Advertised capabilities */
892 	int status;
893 	unsigned long flags;
894 
895 	DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__);
896 
897 	/*
898 	 * We should not be called if phy_type is zero.
899 	 */
900 	if (lp->phy_type == 0)
901 		return;
902 
903 	if (smc911x_phy_reset(dev, phyaddr)) {
904 		netdev_info(dev, "PHY reset timed out\n");
905 		return;
906 	}
907 	spin_lock_irqsave(&lp->lock, flags);
908 
909 	/*
910 	 * Enable PHY Interrupts (for register 18)
911 	 * Interrupts listed here are enabled
912 	 */
913 	SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
914 		 PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
915 		 PHY_INT_MASK_LINK_DOWN_);
916 
917 	/* If the user requested no auto neg, then go set his request */
918 	if (lp->mii.force_media) {
919 		smc911x_phy_fixed(dev);
920 		goto smc911x_phy_configure_exit;
921 	}
922 
923 	/* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
924 	SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
925 	if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
926 		netdev_info(dev, "Auto negotiation NOT supported\n");
927 		smc911x_phy_fixed(dev);
928 		goto smc911x_phy_configure_exit;
929 	}
930 
931 	/* CSMA capable w/ both pauses */
932 	my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
933 
934 	if (my_phy_caps & BMSR_100BASE4)
935 		my_ad_caps |= ADVERTISE_100BASE4;
936 	if (my_phy_caps & BMSR_100FULL)
937 		my_ad_caps |= ADVERTISE_100FULL;
938 	if (my_phy_caps & BMSR_100HALF)
939 		my_ad_caps |= ADVERTISE_100HALF;
940 	if (my_phy_caps & BMSR_10FULL)
941 		my_ad_caps |= ADVERTISE_10FULL;
942 	if (my_phy_caps & BMSR_10HALF)
943 		my_ad_caps |= ADVERTISE_10HALF;
944 
945 	/* Disable capabilities not selected by our user */
946 	if (lp->ctl_rspeed != 100)
947 		my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
948 
949 	 if (!lp->ctl_rfduplx)
950 		my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
951 
952 	/* Update our Auto-Neg Advertisement Register */
953 	SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
954 	lp->mii.advertising = my_ad_caps;
955 
956 	/*
957 	 * Read the register back.	 Without this, it appears that when
958 	 * auto-negotiation is restarted, sometimes it isn't ready and
959 	 * the link does not come up.
960 	 */
961 	udelay(10);
962 	SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
963 
964 	DBG(SMC_DEBUG_MISC, dev, "phy caps=0x%04x\n", my_phy_caps);
965 	DBG(SMC_DEBUG_MISC, dev, "phy advertised caps=0x%04x\n", my_ad_caps);
966 
967 	/* Restart auto-negotiation process in order to advertise my caps */
968 	SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
969 
970 	smc911x_phy_check_media(dev, 1);
971 
972 smc911x_phy_configure_exit:
973 	spin_unlock_irqrestore(&lp->lock, flags);
974 }
975 
976 /*
977  * smc911x_phy_interrupt
978  *
979  * Purpose:  Handle interrupts relating to PHY register 18. This is
980  *	 called from the "hard" interrupt handler under our private spinlock.
981  */
smc911x_phy_interrupt(struct net_device * dev)982 static void smc911x_phy_interrupt(struct net_device *dev)
983 {
984 	struct smc911x_local *lp = netdev_priv(dev);
985 	int phyaddr = lp->mii.phy_id;
986 	int status;
987 
988 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
989 
990 	if (lp->phy_type == 0)
991 		return;
992 
993 	smc911x_phy_check_media(dev, 0);
994 	/* read to clear status bits */
995 	SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
996 	DBG(SMC_DEBUG_MISC, dev, "PHY interrupt status 0x%04x\n",
997 	    status & 0xffff);
998 	DBG(SMC_DEBUG_MISC, dev, "AFC_CFG 0x%08x\n",
999 	    SMC_GET_AFC_CFG(lp));
1000 }
1001 
1002 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1003 
1004 /*
1005  * This is the main routine of the driver, to handle the device when
1006  * it needs some attention.
1007  */
smc911x_interrupt(int irq,void * dev_id)1008 static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
1009 {
1010 	struct net_device *dev = dev_id;
1011 	struct smc911x_local *lp = netdev_priv(dev);
1012 	unsigned int status, mask, timeout;
1013 	unsigned int rx_overrun=0, cr, pkts;
1014 	unsigned long flags;
1015 
1016 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1017 
1018 	spin_lock_irqsave(&lp->lock, flags);
1019 
1020 	/* Spurious interrupt check */
1021 	if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
1022 		(INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
1023 		spin_unlock_irqrestore(&lp->lock, flags);
1024 		return IRQ_NONE;
1025 	}
1026 
1027 	mask = SMC_GET_INT_EN(lp);
1028 	SMC_SET_INT_EN(lp, 0);
1029 
1030 	/* set a timeout value, so I don't stay here forever */
1031 	timeout = 8;
1032 
1033 
1034 	do {
1035 		status = SMC_GET_INT(lp);
1036 
1037 		DBG(SMC_DEBUG_MISC, dev, "INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
1038 		    status, mask, status & ~mask);
1039 
1040 		status &= mask;
1041 		if (!status)
1042 			break;
1043 
1044 		/* Handle SW interrupt condition */
1045 		if (status & INT_STS_SW_INT_) {
1046 			SMC_ACK_INT(lp, INT_STS_SW_INT_);
1047 			mask &= ~INT_EN_SW_INT_EN_;
1048 		}
1049 		/* Handle various error conditions */
1050 		if (status & INT_STS_RXE_) {
1051 			SMC_ACK_INT(lp, INT_STS_RXE_);
1052 			dev->stats.rx_errors++;
1053 		}
1054 		if (status & INT_STS_RXDFH_INT_) {
1055 			SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
1056 			dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
1057 		 }
1058 		/* Undocumented interrupt-what is the right thing to do here? */
1059 		if (status & INT_STS_RXDF_INT_) {
1060 			SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
1061 		}
1062 
1063 		/* Rx Data FIFO exceeds set level */
1064 		if (status & INT_STS_RDFL_) {
1065 			if (IS_REV_A(lp->revision)) {
1066 				rx_overrun=1;
1067 				SMC_GET_MAC_CR(lp, cr);
1068 				cr &= ~MAC_CR_RXEN_;
1069 				SMC_SET_MAC_CR(lp, cr);
1070 				DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1071 				dev->stats.rx_errors++;
1072 				dev->stats.rx_fifo_errors++;
1073 			}
1074 			SMC_ACK_INT(lp, INT_STS_RDFL_);
1075 		}
1076 		if (status & INT_STS_RDFO_) {
1077 			if (!IS_REV_A(lp->revision)) {
1078 				SMC_GET_MAC_CR(lp, cr);
1079 				cr &= ~MAC_CR_RXEN_;
1080 				SMC_SET_MAC_CR(lp, cr);
1081 				rx_overrun=1;
1082 				DBG(SMC_DEBUG_RX, dev, "RX overrun\n");
1083 				dev->stats.rx_errors++;
1084 				dev->stats.rx_fifo_errors++;
1085 			}
1086 			SMC_ACK_INT(lp, INT_STS_RDFO_);
1087 		}
1088 		/* Handle receive condition */
1089 		if ((status & INT_STS_RSFL_) || rx_overrun) {
1090 			unsigned int fifo;
1091 			DBG(SMC_DEBUG_RX, dev, "RX irq\n");
1092 			fifo = SMC_GET_RX_FIFO_INF(lp);
1093 			pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
1094 			DBG(SMC_DEBUG_RX, dev, "Rx FIFO pkts %d, bytes %d\n",
1095 			    pkts, fifo & 0xFFFF);
1096 			if (pkts != 0) {
1097 #ifdef SMC_USE_DMA
1098 				unsigned int fifo;
1099 				if (lp->rxdma_active){
1100 					DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1101 					    "RX DMA active\n");
1102 					/* The DMA is already running so up the IRQ threshold */
1103 					fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
1104 					fifo |= pkts & 0xFF;
1105 					DBG(SMC_DEBUG_RX, dev,
1106 					    "Setting RX stat FIFO threshold to %d\n",
1107 					    fifo & 0xff);
1108 					SMC_SET_FIFO_INT(lp, fifo);
1109 				} else
1110 #endif
1111 				smc911x_rcv(dev);
1112 			}
1113 			SMC_ACK_INT(lp, INT_STS_RSFL_);
1114 		}
1115 		/* Handle transmit FIFO available */
1116 		if (status & INT_STS_TDFA_) {
1117 			DBG(SMC_DEBUG_TX, dev, "TX data FIFO space available irq\n");
1118 			SMC_SET_FIFO_TDA(lp, 0xFF);
1119 			lp->tx_throttle = 0;
1120 #ifdef SMC_USE_DMA
1121 			if (!lp->txdma_active)
1122 #endif
1123 				netif_wake_queue(dev);
1124 			SMC_ACK_INT(lp, INT_STS_TDFA_);
1125 		}
1126 		/* Handle transmit done condition */
1127 #if 1
1128 		if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
1129 			DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, dev,
1130 			    "Tx stat FIFO limit (%d) /GPT irq\n",
1131 			    (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
1132 			smc911x_tx(dev);
1133 			SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1134 			SMC_ACK_INT(lp, INT_STS_TSFL_);
1135 			SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
1136 		}
1137 #else
1138 		if (status & INT_STS_TSFL_) {
1139 			DBG(SMC_DEBUG_TX, dev, "TX status FIFO limit (%d) irq\n", ?);
1140 			smc911x_tx(dev);
1141 			SMC_ACK_INT(lp, INT_STS_TSFL_);
1142 		}
1143 
1144 		if (status & INT_STS_GPT_INT_) {
1145 			DBG(SMC_DEBUG_RX, dev, "IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
1146 			    SMC_GET_IRQ_CFG(lp),
1147 			    SMC_GET_FIFO_INT(lp),
1148 			    SMC_GET_RX_CFG(lp));
1149 			DBG(SMC_DEBUG_RX, dev, "Rx Stat FIFO Used 0x%02x Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
1150 			    (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
1151 			    SMC_GET_RX_FIFO_INF(lp) & 0xffff,
1152 			    SMC_GET_RX_STS_FIFO_PEEK(lp));
1153 			SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
1154 			SMC_ACK_INT(lp, INT_STS_GPT_INT_);
1155 		}
1156 #endif
1157 
1158 		/* Handle PHY interrupt condition */
1159 		if (status & INT_STS_PHY_INT_) {
1160 			DBG(SMC_DEBUG_MISC, dev, "PHY irq\n");
1161 			smc911x_phy_interrupt(dev);
1162 			SMC_ACK_INT(lp, INT_STS_PHY_INT_);
1163 		}
1164 	} while (--timeout);
1165 
1166 	/* restore mask state */
1167 	SMC_SET_INT_EN(lp, mask);
1168 
1169 	DBG(SMC_DEBUG_MISC, dev, "Interrupt done (%d loops)\n",
1170 	    8-timeout);
1171 
1172 	spin_unlock_irqrestore(&lp->lock, flags);
1173 
1174 	return IRQ_HANDLED;
1175 }
1176 
1177 #ifdef SMC_USE_DMA
1178 static void
smc911x_tx_dma_irq(void * data)1179 smc911x_tx_dma_irq(void *data)
1180 {
1181 	struct smc911x_local *lp = data;
1182 	struct net_device *dev = lp->netdev;
1183 	struct sk_buff *skb = lp->current_tx_skb;
1184 	unsigned long flags;
1185 
1186 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1187 
1188 	DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "TX DMA irq handler\n");
1189 	BUG_ON(skb == NULL);
1190 	dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
1191 	netif_trans_update(dev);
1192 	dev_kfree_skb_irq(skb);
1193 	lp->current_tx_skb = NULL;
1194 	if (lp->pending_tx_skb != NULL)
1195 		smc911x_hardware_send_pkt(dev);
1196 	else {
1197 		DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1198 		    "No pending Tx packets. DMA disabled\n");
1199 		spin_lock_irqsave(&lp->lock, flags);
1200 		lp->txdma_active = 0;
1201 		if (!lp->tx_throttle) {
1202 			netif_wake_queue(dev);
1203 		}
1204 		spin_unlock_irqrestore(&lp->lock, flags);
1205 	}
1206 
1207 	DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev,
1208 	    "TX DMA irq completed\n");
1209 }
1210 static void
smc911x_rx_dma_irq(void * data)1211 smc911x_rx_dma_irq(void *data)
1212 {
1213 	struct smc911x_local *lp = data;
1214 	struct net_device *dev = lp->netdev;
1215 	struct sk_buff *skb = lp->current_rx_skb;
1216 	unsigned long flags;
1217 	unsigned int pkts;
1218 
1219 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1220 	DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev, "RX DMA irq handler\n");
1221 	dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
1222 	BUG_ON(skb == NULL);
1223 	lp->current_rx_skb = NULL;
1224 	PRINT_PKT(skb->data, skb->len);
1225 	skb->protocol = eth_type_trans(skb, dev);
1226 	dev->stats.rx_packets++;
1227 	dev->stats.rx_bytes += skb->len;
1228 	netif_rx(skb);
1229 
1230 	spin_lock_irqsave(&lp->lock, flags);
1231 	pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
1232 	if (pkts != 0) {
1233 		smc911x_rcv(dev);
1234 	}else {
1235 		lp->rxdma_active = 0;
1236 	}
1237 	spin_unlock_irqrestore(&lp->lock, flags);
1238 	DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev,
1239 	    "RX DMA irq completed. DMA RX FIFO PKTS %d\n",
1240 	    pkts);
1241 }
1242 #endif	 /* SMC_USE_DMA */
1243 
1244 #ifdef CONFIG_NET_POLL_CONTROLLER
1245 /*
1246  * Polling receive - used by netconsole and other diagnostic tools
1247  * to allow network i/o with interrupts disabled.
1248  */
smc911x_poll_controller(struct net_device * dev)1249 static void smc911x_poll_controller(struct net_device *dev)
1250 {
1251 	disable_irq(dev->irq);
1252 	smc911x_interrupt(dev->irq, dev);
1253 	enable_irq(dev->irq);
1254 }
1255 #endif
1256 
1257 /* Our watchdog timed out. Called by the networking layer */
smc911x_timeout(struct net_device * dev)1258 static void smc911x_timeout(struct net_device *dev)
1259 {
1260 	struct smc911x_local *lp = netdev_priv(dev);
1261 	int status, mask;
1262 	unsigned long flags;
1263 
1264 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1265 
1266 	spin_lock_irqsave(&lp->lock, flags);
1267 	status = SMC_GET_INT(lp);
1268 	mask = SMC_GET_INT_EN(lp);
1269 	spin_unlock_irqrestore(&lp->lock, flags);
1270 	DBG(SMC_DEBUG_MISC, dev, "INT 0x%02x MASK 0x%02x\n",
1271 	    status, mask);
1272 
1273 	/* Dump the current TX FIFO contents and restart */
1274 	mask = SMC_GET_TX_CFG(lp);
1275 	SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
1276 	/*
1277 	 * Reconfiguring the PHY doesn't seem like a bad idea here, but
1278 	 * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
1279 	 * which calls schedule().	 Hence we use a work queue.
1280 	 */
1281 	if (lp->phy_type != 0)
1282 		schedule_work(&lp->phy_configure);
1283 
1284 	/* We can accept TX packets again */
1285 	netif_trans_update(dev); /* prevent tx timeout */
1286 	netif_wake_queue(dev);
1287 }
1288 
1289 /*
1290  * This routine will, depending on the values passed to it,
1291  * either make it accept multicast packets, go into
1292  * promiscuous mode (for TCPDUMP and cousins) or accept
1293  * a select set of multicast packets
1294  */
smc911x_set_multicast_list(struct net_device * dev)1295 static void smc911x_set_multicast_list(struct net_device *dev)
1296 {
1297 	struct smc911x_local *lp = netdev_priv(dev);
1298 	unsigned int multicast_table[2];
1299 	unsigned int mcr, update_multicast = 0;
1300 	unsigned long flags;
1301 
1302 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1303 
1304 	spin_lock_irqsave(&lp->lock, flags);
1305 	SMC_GET_MAC_CR(lp, mcr);
1306 	spin_unlock_irqrestore(&lp->lock, flags);
1307 
1308 	if (dev->flags & IFF_PROMISC) {
1309 
1310 		DBG(SMC_DEBUG_MISC, dev, "RCR_PRMS\n");
1311 		mcr |= MAC_CR_PRMS_;
1312 	}
1313 	/*
1314 	 * Here, I am setting this to accept all multicast packets.
1315 	 * I don't need to zero the multicast table, because the flag is
1316 	 * checked before the table is
1317 	 */
1318 	else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
1319 		DBG(SMC_DEBUG_MISC, dev, "RCR_ALMUL\n");
1320 		mcr |= MAC_CR_MCPAS_;
1321 	}
1322 
1323 	/*
1324 	 * This sets the internal hardware table to filter out unwanted
1325 	 * multicast packets before they take up memory.
1326 	 *
1327 	 * The SMC chip uses a hash table where the high 6 bits of the CRC of
1328 	 * address are the offset into the table.	If that bit is 1, then the
1329 	 * multicast packet is accepted.  Otherwise, it's dropped silently.
1330 	 *
1331 	 * To use the 6 bits as an offset into the table, the high 1 bit is
1332 	 * the number of the 32 bit register, while the low 5 bits are the bit
1333 	 * within that register.
1334 	 */
1335 	else if (!netdev_mc_empty(dev)) {
1336 		struct netdev_hw_addr *ha;
1337 
1338 		/* Set the Hash perfec mode */
1339 		mcr |= MAC_CR_HPFILT_;
1340 
1341 		/* start with a table of all zeros: reject all */
1342 		memset(multicast_table, 0, sizeof(multicast_table));
1343 
1344 		netdev_for_each_mc_addr(ha, dev) {
1345 			u32 position;
1346 
1347 			/* upper 6 bits are used as hash index */
1348 			position = ether_crc(ETH_ALEN, ha->addr)>>26;
1349 
1350 			multicast_table[position>>5] |= 1 << (position&0x1f);
1351 		}
1352 
1353 		/* be sure I get rid of flags I might have set */
1354 		mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1355 
1356 		/* now, the table can be loaded into the chipset */
1357 		update_multicast = 1;
1358 	} else	 {
1359 		DBG(SMC_DEBUG_MISC, dev, "~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n");
1360 		mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
1361 
1362 		/*
1363 		 * since I'm disabling all multicast entirely, I need to
1364 		 * clear the multicast list
1365 		 */
1366 		memset(multicast_table, 0, sizeof(multicast_table));
1367 		update_multicast = 1;
1368 	}
1369 
1370 	spin_lock_irqsave(&lp->lock, flags);
1371 	SMC_SET_MAC_CR(lp, mcr);
1372 	if (update_multicast) {
1373 		DBG(SMC_DEBUG_MISC, dev,
1374 		    "update mcast hash table 0x%08x 0x%08x\n",
1375 		    multicast_table[0], multicast_table[1]);
1376 		SMC_SET_HASHL(lp, multicast_table[0]);
1377 		SMC_SET_HASHH(lp, multicast_table[1]);
1378 	}
1379 	spin_unlock_irqrestore(&lp->lock, flags);
1380 }
1381 
1382 
1383 /*
1384  * Open and Initialize the board
1385  *
1386  * Set up everything, reset the card, etc..
1387  */
1388 static int
smc911x_open(struct net_device * dev)1389 smc911x_open(struct net_device *dev)
1390 {
1391 	struct smc911x_local *lp = netdev_priv(dev);
1392 
1393 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1394 
1395 	/* reset the hardware */
1396 	smc911x_reset(dev);
1397 
1398 	/* Configure the PHY, initialize the link state */
1399 	smc911x_phy_configure(&lp->phy_configure);
1400 
1401 	/* Turn on Tx + Rx */
1402 	smc911x_enable(dev);
1403 
1404 	netif_start_queue(dev);
1405 
1406 	return 0;
1407 }
1408 
1409 /*
1410  * smc911x_close
1411  *
1412  * this makes the board clean up everything that it can
1413  * and not talk to the outside world.	 Caused by
1414  * an 'ifconfig ethX down'
1415  */
smc911x_close(struct net_device * dev)1416 static int smc911x_close(struct net_device *dev)
1417 {
1418 	struct smc911x_local *lp = netdev_priv(dev);
1419 
1420 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1421 
1422 	netif_stop_queue(dev);
1423 	netif_carrier_off(dev);
1424 
1425 	/* clear everything */
1426 	smc911x_shutdown(dev);
1427 
1428 	if (lp->phy_type != 0) {
1429 		/* We need to ensure that no calls to
1430 		 * smc911x_phy_configure are pending.
1431 		 */
1432 		cancel_work_sync(&lp->phy_configure);
1433 		smc911x_phy_powerdown(dev, lp->mii.phy_id);
1434 	}
1435 
1436 	if (lp->pending_tx_skb) {
1437 		dev_kfree_skb(lp->pending_tx_skb);
1438 		lp->pending_tx_skb = NULL;
1439 	}
1440 
1441 	return 0;
1442 }
1443 
1444 /*
1445  * Ethtool support
1446  */
1447 static int
smc911x_ethtool_get_link_ksettings(struct net_device * dev,struct ethtool_link_ksettings * cmd)1448 smc911x_ethtool_get_link_ksettings(struct net_device *dev,
1449 				   struct ethtool_link_ksettings *cmd)
1450 {
1451 	struct smc911x_local *lp = netdev_priv(dev);
1452 	int status;
1453 	unsigned long flags;
1454 	u32 supported;
1455 
1456 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1457 
1458 	if (lp->phy_type != 0) {
1459 		spin_lock_irqsave(&lp->lock, flags);
1460 		mii_ethtool_get_link_ksettings(&lp->mii, cmd);
1461 		spin_unlock_irqrestore(&lp->lock, flags);
1462 	} else {
1463 		supported = SUPPORTED_10baseT_Half |
1464 				SUPPORTED_10baseT_Full |
1465 				SUPPORTED_TP | SUPPORTED_AUI;
1466 
1467 		if (lp->ctl_rspeed == 10)
1468 			cmd->base.speed = SPEED_10;
1469 		else if (lp->ctl_rspeed == 100)
1470 			cmd->base.speed = SPEED_100;
1471 
1472 		cmd->base.autoneg = AUTONEG_DISABLE;
1473 		cmd->base.port = 0;
1474 		SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
1475 		cmd->base.duplex =
1476 			(status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
1477 				DUPLEX_FULL : DUPLEX_HALF;
1478 
1479 		ethtool_convert_legacy_u32_to_link_mode(
1480 			cmd->link_modes.supported, supported);
1481 
1482 	}
1483 
1484 	return 0;
1485 }
1486 
1487 static int
smc911x_ethtool_set_link_ksettings(struct net_device * dev,const struct ethtool_link_ksettings * cmd)1488 smc911x_ethtool_set_link_ksettings(struct net_device *dev,
1489 				   const struct ethtool_link_ksettings *cmd)
1490 {
1491 	struct smc911x_local *lp = netdev_priv(dev);
1492 	int ret;
1493 	unsigned long flags;
1494 
1495 	if (lp->phy_type != 0) {
1496 		spin_lock_irqsave(&lp->lock, flags);
1497 		ret = mii_ethtool_set_link_ksettings(&lp->mii, cmd);
1498 		spin_unlock_irqrestore(&lp->lock, flags);
1499 	} else {
1500 		if (cmd->base.autoneg != AUTONEG_DISABLE ||
1501 		    cmd->base.speed != SPEED_10 ||
1502 		    (cmd->base.duplex != DUPLEX_HALF &&
1503 		     cmd->base.duplex != DUPLEX_FULL) ||
1504 		    (cmd->base.port != PORT_TP &&
1505 		     cmd->base.port != PORT_AUI))
1506 			return -EINVAL;
1507 
1508 		lp->ctl_rfduplx = cmd->base.duplex == DUPLEX_FULL;
1509 
1510 		ret = 0;
1511 	}
1512 
1513 	return ret;
1514 }
1515 
1516 static void
smc911x_ethtool_getdrvinfo(struct net_device * dev,struct ethtool_drvinfo * info)1517 smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1518 {
1519 	strlcpy(info->driver, CARDNAME, sizeof(info->driver));
1520 	strlcpy(info->version, version, sizeof(info->version));
1521 	strlcpy(info->bus_info, dev_name(dev->dev.parent),
1522 		sizeof(info->bus_info));
1523 }
1524 
smc911x_ethtool_nwayreset(struct net_device * dev)1525 static int smc911x_ethtool_nwayreset(struct net_device *dev)
1526 {
1527 	struct smc911x_local *lp = netdev_priv(dev);
1528 	int ret = -EINVAL;
1529 	unsigned long flags;
1530 
1531 	if (lp->phy_type != 0) {
1532 		spin_lock_irqsave(&lp->lock, flags);
1533 		ret = mii_nway_restart(&lp->mii);
1534 		spin_unlock_irqrestore(&lp->lock, flags);
1535 	}
1536 
1537 	return ret;
1538 }
1539 
smc911x_ethtool_getmsglevel(struct net_device * dev)1540 static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
1541 {
1542 	struct smc911x_local *lp = netdev_priv(dev);
1543 	return lp->msg_enable;
1544 }
1545 
smc911x_ethtool_setmsglevel(struct net_device * dev,u32 level)1546 static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
1547 {
1548 	struct smc911x_local *lp = netdev_priv(dev);
1549 	lp->msg_enable = level;
1550 }
1551 
smc911x_ethtool_getregslen(struct net_device * dev)1552 static int smc911x_ethtool_getregslen(struct net_device *dev)
1553 {
1554 	/* System regs + MAC regs + PHY regs */
1555 	return (((E2P_CMD - ID_REV)/4 + 1) +
1556 			(WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
1557 }
1558 
smc911x_ethtool_getregs(struct net_device * dev,struct ethtool_regs * regs,void * buf)1559 static void smc911x_ethtool_getregs(struct net_device *dev,
1560 										 struct ethtool_regs* regs, void *buf)
1561 {
1562 	struct smc911x_local *lp = netdev_priv(dev);
1563 	unsigned long flags;
1564 	u32 reg,i,j=0;
1565 	u32 *data = (u32*)buf;
1566 
1567 	regs->version = lp->version;
1568 	for(i=ID_REV;i<=E2P_CMD;i+=4) {
1569 		data[j++] = SMC_inl(lp, i);
1570 	}
1571 	for(i=MAC_CR;i<=WUCSR;i++) {
1572 		spin_lock_irqsave(&lp->lock, flags);
1573 		SMC_GET_MAC_CSR(lp, i, reg);
1574 		spin_unlock_irqrestore(&lp->lock, flags);
1575 		data[j++] = reg;
1576 	}
1577 	for(i=0;i<=31;i++) {
1578 		spin_lock_irqsave(&lp->lock, flags);
1579 		SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
1580 		spin_unlock_irqrestore(&lp->lock, flags);
1581 		data[j++] = reg & 0xFFFF;
1582 	}
1583 }
1584 
smc911x_ethtool_wait_eeprom_ready(struct net_device * dev)1585 static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
1586 {
1587 	struct smc911x_local *lp = netdev_priv(dev);
1588 	unsigned int timeout;
1589 	int e2p_cmd;
1590 
1591 	e2p_cmd = SMC_GET_E2P_CMD(lp);
1592 	for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
1593 		if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
1594 			PRINTK(dev, "%s timeout waiting for EEPROM to respond\n",
1595 			       __func__);
1596 			return -EFAULT;
1597 		}
1598 		mdelay(1);
1599 		e2p_cmd = SMC_GET_E2P_CMD(lp);
1600 	}
1601 	if (timeout == 0) {
1602 		PRINTK(dev, "%s timeout waiting for EEPROM CMD not busy\n",
1603 		       __func__);
1604 		return -ETIMEDOUT;
1605 	}
1606 	return 0;
1607 }
1608 
smc911x_ethtool_write_eeprom_cmd(struct net_device * dev,int cmd,int addr)1609 static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
1610 													int cmd, int addr)
1611 {
1612 	struct smc911x_local *lp = netdev_priv(dev);
1613 	int ret;
1614 
1615 	if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1616 		return ret;
1617 	SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
1618 		((cmd) & (0x7<<28)) |
1619 		((addr) & 0xFF));
1620 	return 0;
1621 }
1622 
smc911x_ethtool_read_eeprom_byte(struct net_device * dev,u8 * data)1623 static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
1624 													u8 *data)
1625 {
1626 	struct smc911x_local *lp = netdev_priv(dev);
1627 	int ret;
1628 
1629 	if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1630 		return ret;
1631 	*data = SMC_GET_E2P_DATA(lp);
1632 	return 0;
1633 }
1634 
smc911x_ethtool_write_eeprom_byte(struct net_device * dev,u8 data)1635 static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
1636 													 u8 data)
1637 {
1638 	struct smc911x_local *lp = netdev_priv(dev);
1639 	int ret;
1640 
1641 	if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
1642 		return ret;
1643 	SMC_SET_E2P_DATA(lp, data);
1644 	return 0;
1645 }
1646 
smc911x_ethtool_geteeprom(struct net_device * dev,struct ethtool_eeprom * eeprom,u8 * data)1647 static int smc911x_ethtool_geteeprom(struct net_device *dev,
1648 									  struct ethtool_eeprom *eeprom, u8 *data)
1649 {
1650 	u8 eebuf[SMC911X_EEPROM_LEN];
1651 	int i, ret;
1652 
1653 	for(i=0;i<SMC911X_EEPROM_LEN;i++) {
1654 		if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
1655 			return ret;
1656 		if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
1657 			return ret;
1658 		}
1659 	memcpy(data, eebuf+eeprom->offset, eeprom->len);
1660 	return 0;
1661 }
1662 
smc911x_ethtool_seteeprom(struct net_device * dev,struct ethtool_eeprom * eeprom,u8 * data)1663 static int smc911x_ethtool_seteeprom(struct net_device *dev,
1664 									   struct ethtool_eeprom *eeprom, u8 *data)
1665 {
1666 	int i, ret;
1667 
1668 	/* Enable erase */
1669 	if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
1670 		return ret;
1671 	for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
1672 		/* erase byte */
1673 		if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
1674 			return ret;
1675 		/* write byte */
1676 		if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
1677 			 return ret;
1678 		if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
1679 			return ret;
1680 		}
1681 	 return 0;
1682 }
1683 
smc911x_ethtool_geteeprom_len(struct net_device * dev)1684 static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
1685 {
1686 	 return SMC911X_EEPROM_LEN;
1687 }
1688 
1689 static const struct ethtool_ops smc911x_ethtool_ops = {
1690 	.get_drvinfo	 = smc911x_ethtool_getdrvinfo,
1691 	.get_msglevel	 = smc911x_ethtool_getmsglevel,
1692 	.set_msglevel	 = smc911x_ethtool_setmsglevel,
1693 	.nway_reset = smc911x_ethtool_nwayreset,
1694 	.get_link	 = ethtool_op_get_link,
1695 	.get_regs_len	 = smc911x_ethtool_getregslen,
1696 	.get_regs	 = smc911x_ethtool_getregs,
1697 	.get_eeprom_len = smc911x_ethtool_geteeprom_len,
1698 	.get_eeprom = smc911x_ethtool_geteeprom,
1699 	.set_eeprom = smc911x_ethtool_seteeprom,
1700 	.get_link_ksettings	 = smc911x_ethtool_get_link_ksettings,
1701 	.set_link_ksettings	 = smc911x_ethtool_set_link_ksettings,
1702 };
1703 
1704 /*
1705  * smc911x_findirq
1706  *
1707  * This routine has a simple purpose -- make the SMC chip generate an
1708  * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1709  */
smc911x_findirq(struct net_device * dev)1710 static int smc911x_findirq(struct net_device *dev)
1711 {
1712 	struct smc911x_local *lp = netdev_priv(dev);
1713 	int timeout = 20;
1714 	unsigned long cookie;
1715 
1716 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1717 
1718 	cookie = probe_irq_on();
1719 
1720 	/*
1721 	 * Force a SW interrupt
1722 	 */
1723 
1724 	SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
1725 
1726 	/*
1727 	 * Wait until positive that the interrupt has been generated
1728 	 */
1729 	do {
1730 		int int_status;
1731 		udelay(10);
1732 		int_status = SMC_GET_INT_EN(lp);
1733 		if (int_status & INT_EN_SW_INT_EN_)
1734 			 break;		/* got the interrupt */
1735 	} while (--timeout);
1736 
1737 	/*
1738 	 * there is really nothing that I can do here if timeout fails,
1739 	 * as autoirq_report will return a 0 anyway, which is what I
1740 	 * want in this case.	 Plus, the clean up is needed in both
1741 	 * cases.
1742 	 */
1743 
1744 	/* and disable all interrupts again */
1745 	SMC_SET_INT_EN(lp, 0);
1746 
1747 	/* and return what I found */
1748 	return probe_irq_off(cookie);
1749 }
1750 
1751 static const struct net_device_ops smc911x_netdev_ops = {
1752 	.ndo_open		= smc911x_open,
1753 	.ndo_stop		= smc911x_close,
1754 	.ndo_start_xmit		= smc911x_hard_start_xmit,
1755 	.ndo_tx_timeout		= smc911x_timeout,
1756 	.ndo_set_rx_mode	= smc911x_set_multicast_list,
1757 	.ndo_validate_addr	= eth_validate_addr,
1758 	.ndo_set_mac_address	= eth_mac_addr,
1759 #ifdef CONFIG_NET_POLL_CONTROLLER
1760 	.ndo_poll_controller	= smc911x_poll_controller,
1761 #endif
1762 };
1763 
1764 /*
1765  * Function: smc911x_probe(unsigned long ioaddr)
1766  *
1767  * Purpose:
1768  *	 Tests to see if a given ioaddr points to an SMC911x chip.
1769  *	 Returns a 0 on success
1770  *
1771  * Algorithm:
1772  *	 (1) see if the endian word is OK
1773  *	 (1) see if I recognize the chip ID in the appropriate register
1774  *
1775  * Here I do typical initialization tasks.
1776  *
1777  * o  Initialize the structure if needed
1778  * o  print out my vanity message if not done so already
1779  * o  print out what type of hardware is detected
1780  * o  print out the ethernet address
1781  * o  find the IRQ
1782  * o  set up my private data
1783  * o  configure the dev structure with my subroutines
1784  * o  actually GRAB the irq.
1785  * o  GRAB the region
1786  */
smc911x_probe(struct net_device * dev)1787 static int smc911x_probe(struct net_device *dev)
1788 {
1789 	struct smc911x_local *lp = netdev_priv(dev);
1790 	int i, retval;
1791 	unsigned int val, chip_id, revision;
1792 	const char *version_string;
1793 	unsigned long irq_flags;
1794 #ifdef SMC_USE_DMA
1795 	struct dma_slave_config	config;
1796 	dma_cap_mask_t mask;
1797 #endif
1798 
1799 	DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__);
1800 
1801 	/* First, see if the endian word is recognized */
1802 	val = SMC_GET_BYTE_TEST(lp);
1803 	DBG(SMC_DEBUG_MISC, dev, "%s: endian probe returned 0x%04x\n",
1804 	    CARDNAME, val);
1805 	if (val != 0x87654321) {
1806 		netdev_err(dev, "Invalid chip endian 0x%08x\n", val);
1807 		retval = -ENODEV;
1808 		goto err_out;
1809 	}
1810 
1811 	/*
1812 	 * check if the revision register is something that I
1813 	 * recognize.	These might need to be added to later,
1814 	 * as future revisions could be added.
1815 	 */
1816 	chip_id = SMC_GET_PN(lp);
1817 	DBG(SMC_DEBUG_MISC, dev, "%s: id probe returned 0x%04x\n",
1818 	    CARDNAME, chip_id);
1819 	for(i=0;chip_ids[i].id != 0; i++) {
1820 		if (chip_ids[i].id == chip_id) break;
1821 	}
1822 	if (!chip_ids[i].id) {
1823 		netdev_err(dev, "Unknown chip ID %04x\n", chip_id);
1824 		retval = -ENODEV;
1825 		goto err_out;
1826 	}
1827 	version_string = chip_ids[i].name;
1828 
1829 	revision = SMC_GET_REV(lp);
1830 	DBG(SMC_DEBUG_MISC, dev, "%s: revision = 0x%04x\n", CARDNAME, revision);
1831 
1832 	/* At this point I'll assume that the chip is an SMC911x. */
1833 	DBG(SMC_DEBUG_MISC, dev, "%s: Found a %s\n",
1834 	    CARDNAME, chip_ids[i].name);
1835 
1836 	/* Validate the TX FIFO size requested */
1837 	if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
1838 		netdev_err(dev, "Invalid TX FIFO size requested %d\n",
1839 			   tx_fifo_kb);
1840 		retval = -EINVAL;
1841 		goto err_out;
1842 	}
1843 
1844 	/* fill in some of the fields */
1845 	lp->version = chip_ids[i].id;
1846 	lp->revision = revision;
1847 	lp->tx_fifo_kb = tx_fifo_kb;
1848 	/* Reverse calculate the RX FIFO size from the TX */
1849 	lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
1850 	lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
1851 
1852 	/* Set the automatic flow control values */
1853 	switch(lp->tx_fifo_kb) {
1854 		/*
1855 		 *	 AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
1856 		 *	 AFC_LO is AFC_HI/2
1857 		 *	 BACK_DUR is about 5uS*(AFC_LO) rounded down
1858 		 */
1859 		case 2:/* 13440 Rx Data Fifo Size */
1860 			lp->afc_cfg=0x008C46AF;break;
1861 		case 3:/* 12480 Rx Data Fifo Size */
1862 			lp->afc_cfg=0x0082419F;break;
1863 		case 4:/* 11520 Rx Data Fifo Size */
1864 			lp->afc_cfg=0x00783C9F;break;
1865 		case 5:/* 10560 Rx Data Fifo Size */
1866 			lp->afc_cfg=0x006E374F;break;
1867 		case 6:/* 9600 Rx Data Fifo Size */
1868 			lp->afc_cfg=0x0064328F;break;
1869 		case 7:/* 8640 Rx Data Fifo Size */
1870 			lp->afc_cfg=0x005A2D7F;break;
1871 		case 8:/* 7680 Rx Data Fifo Size */
1872 			lp->afc_cfg=0x0050287F;break;
1873 		case 9:/* 6720 Rx Data Fifo Size */
1874 			lp->afc_cfg=0x0046236F;break;
1875 		case 10:/* 5760 Rx Data Fifo Size */
1876 			lp->afc_cfg=0x003C1E6F;break;
1877 		case 11:/* 4800 Rx Data Fifo Size */
1878 			lp->afc_cfg=0x0032195F;break;
1879 		/*
1880 		 *	 AFC_HI is ~1520 bytes less than RX Data Fifo Size
1881 		 *	 AFC_LO is AFC_HI/2
1882 		 *	 BACK_DUR is about 5uS*(AFC_LO) rounded down
1883 		 */
1884 		case 12:/* 3840 Rx Data Fifo Size */
1885 			lp->afc_cfg=0x0024124F;break;
1886 		case 13:/* 2880 Rx Data Fifo Size */
1887 			lp->afc_cfg=0x0015073F;break;
1888 		case 14:/* 1920 Rx Data Fifo Size */
1889 			lp->afc_cfg=0x0006032F;break;
1890 		 default:
1891 			 PRINTK(dev, "ERROR -- no AFC_CFG setting found");
1892 			 break;
1893 	}
1894 
1895 	DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, dev,
1896 	    "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
1897 	    lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
1898 
1899 	spin_lock_init(&lp->lock);
1900 
1901 	/* Get the MAC address */
1902 	SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1903 
1904 	/* now, reset the chip, and put it into a known state */
1905 	smc911x_reset(dev);
1906 
1907 	/*
1908 	 * If dev->irq is 0, then the device has to be banged on to see
1909 	 * what the IRQ is.
1910 	 *
1911 	 * Specifying an IRQ is done with the assumption that the user knows
1912 	 * what (s)he is doing.  No checking is done!!!!
1913 	 */
1914 	if (dev->irq < 1) {
1915 		int trials;
1916 
1917 		trials = 3;
1918 		while (trials--) {
1919 			dev->irq = smc911x_findirq(dev);
1920 			if (dev->irq)
1921 				break;
1922 			/* kick the card and try again */
1923 			smc911x_reset(dev);
1924 		}
1925 	}
1926 	if (dev->irq == 0) {
1927 		netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n");
1928 		retval = -ENODEV;
1929 		goto err_out;
1930 	}
1931 	dev->irq = irq_canonicalize(dev->irq);
1932 
1933 	dev->netdev_ops = &smc911x_netdev_ops;
1934 	dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1935 	dev->ethtool_ops = &smc911x_ethtool_ops;
1936 
1937 	INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
1938 	lp->mii.phy_id_mask = 0x1f;
1939 	lp->mii.reg_num_mask = 0x1f;
1940 	lp->mii.force_media = 0;
1941 	lp->mii.full_duplex = 0;
1942 	lp->mii.dev = dev;
1943 	lp->mii.mdio_read = smc911x_phy_read;
1944 	lp->mii.mdio_write = smc911x_phy_write;
1945 
1946 	/*
1947 	 * Locate the phy, if any.
1948 	 */
1949 	smc911x_phy_detect(dev);
1950 
1951 	/* Set default parameters */
1952 	lp->msg_enable = NETIF_MSG_LINK;
1953 	lp->ctl_rfduplx = 1;
1954 	lp->ctl_rspeed = 100;
1955 
1956 #ifdef SMC_DYNAMIC_BUS_CONFIG
1957 	irq_flags = lp->cfg.irq_flags;
1958 #else
1959 	irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
1960 #endif
1961 
1962 	/* Grab the IRQ */
1963 	retval = request_irq(dev->irq, smc911x_interrupt,
1964 			     irq_flags, dev->name, dev);
1965 	if (retval)
1966 		goto err_out;
1967 
1968 #ifdef SMC_USE_DMA
1969 
1970 	dma_cap_zero(mask);
1971 	dma_cap_set(DMA_SLAVE, mask);
1972 	lp->rxdma = dma_request_channel(mask, NULL, NULL);
1973 	lp->txdma = dma_request_channel(mask, NULL, NULL);
1974 	lp->rxdma_active = 0;
1975 	lp->txdma_active = 0;
1976 
1977 	memset(&config, 0, sizeof(config));
1978 	config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1979 	config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1980 	config.src_addr = lp->physaddr + RX_DATA_FIFO;
1981 	config.dst_addr = lp->physaddr + TX_DATA_FIFO;
1982 	config.src_maxburst = 32;
1983 	config.dst_maxburst = 32;
1984 	retval = dmaengine_slave_config(lp->rxdma, &config);
1985 	if (retval) {
1986 		dev_err(lp->dev, "dma rx channel configuration failed: %d\n",
1987 			retval);
1988 		goto err_out;
1989 	}
1990 	retval = dmaengine_slave_config(lp->txdma, &config);
1991 	if (retval) {
1992 		dev_err(lp->dev, "dma tx channel configuration failed: %d\n",
1993 			retval);
1994 		goto err_out;
1995 	}
1996 #endif
1997 
1998 	retval = register_netdev(dev);
1999 	if (retval == 0) {
2000 		/* now, print out the card info, in a short format.. */
2001 		netdev_info(dev, "%s (rev %d) at %#lx IRQ %d",
2002 			    version_string, lp->revision,
2003 			    dev->base_addr, dev->irq);
2004 
2005 #ifdef SMC_USE_DMA
2006 		if (lp->rxdma)
2007 			pr_cont(" RXDMA %p", lp->rxdma);
2008 
2009 		if (lp->txdma)
2010 			pr_cont(" TXDMA %p", lp->txdma);
2011 #endif
2012 		pr_cont("\n");
2013 		if (!is_valid_ether_addr(dev->dev_addr)) {
2014 			netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n");
2015 		} else {
2016 			/* Print the Ethernet address */
2017 			netdev_info(dev, "Ethernet addr: %pM\n",
2018 				    dev->dev_addr);
2019 		}
2020 
2021 		if (lp->phy_type == 0) {
2022 			PRINTK(dev, "No PHY found\n");
2023 		} else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
2024 			PRINTK(dev, "LAN911x Internal PHY\n");
2025 		} else {
2026 			PRINTK(dev, "External PHY 0x%08x\n", lp->phy_type);
2027 		}
2028 	}
2029 
2030 err_out:
2031 #ifdef SMC_USE_DMA
2032 	if (retval) {
2033 		if (lp->rxdma)
2034 			dma_release_channel(lp->rxdma);
2035 		if (lp->txdma)
2036 			dma_release_channel(lp->txdma);
2037 	}
2038 #endif
2039 	return retval;
2040 }
2041 
2042 /*
2043  * smc911x_drv_probe(void)
2044  *
2045  *	  Output:
2046  *	 0 --> there is a device
2047  *	 anything else, error
2048  */
smc911x_drv_probe(struct platform_device * pdev)2049 static int smc911x_drv_probe(struct platform_device *pdev)
2050 {
2051 	struct net_device *ndev;
2052 	struct resource *res;
2053 	struct smc911x_local *lp;
2054 	void __iomem *addr;
2055 	int ret;
2056 
2057 	/* ndev is not valid yet, so avoid passing it in. */
2058 	DBG(SMC_DEBUG_FUNC, "--> %s\n",  __func__);
2059 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2060 	if (!res) {
2061 		ret = -ENODEV;
2062 		goto out;
2063 	}
2064 
2065 	/*
2066 	 * Request the regions.
2067 	 */
2068 	if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
2069 		 ret = -EBUSY;
2070 		 goto out;
2071 	}
2072 
2073 	ndev = alloc_etherdev(sizeof(struct smc911x_local));
2074 	if (!ndev) {
2075 		ret = -ENOMEM;
2076 		goto release_1;
2077 	}
2078 	SET_NETDEV_DEV(ndev, &pdev->dev);
2079 
2080 	ndev->dma = (unsigned char)-1;
2081 	ndev->irq = platform_get_irq(pdev, 0);
2082 	lp = netdev_priv(ndev);
2083 	lp->netdev = ndev;
2084 #ifdef SMC_DYNAMIC_BUS_CONFIG
2085 	{
2086 		struct smc911x_platdata *pd = dev_get_platdata(&pdev->dev);
2087 		if (!pd) {
2088 			ret = -EINVAL;
2089 			goto release_both;
2090 		}
2091 		memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2092 	}
2093 #endif
2094 
2095 	addr = ioremap(res->start, SMC911X_IO_EXTENT);
2096 	if (!addr) {
2097 		ret = -ENOMEM;
2098 		goto release_both;
2099 	}
2100 
2101 	platform_set_drvdata(pdev, ndev);
2102 	lp->base = addr;
2103 	ndev->base_addr = res->start;
2104 	ret = smc911x_probe(ndev);
2105 	if (ret != 0) {
2106 		iounmap(addr);
2107 release_both:
2108 		free_netdev(ndev);
2109 release_1:
2110 		release_mem_region(res->start, SMC911X_IO_EXTENT);
2111 out:
2112 		pr_info("%s: not found (%d).\n", CARDNAME, ret);
2113 	}
2114 #ifdef SMC_USE_DMA
2115 	else {
2116 		lp->physaddr = res->start;
2117 		lp->dev = &pdev->dev;
2118 	}
2119 #endif
2120 
2121 	return ret;
2122 }
2123 
smc911x_drv_remove(struct platform_device * pdev)2124 static int smc911x_drv_remove(struct platform_device *pdev)
2125 {
2126 	struct net_device *ndev = platform_get_drvdata(pdev);
2127 	struct smc911x_local *lp = netdev_priv(ndev);
2128 	struct resource *res;
2129 
2130 	DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2131 
2132 	unregister_netdev(ndev);
2133 
2134 	free_irq(ndev->irq, ndev);
2135 
2136 #ifdef SMC_USE_DMA
2137 	{
2138 		if (lp->rxdma)
2139 			dma_release_channel(lp->rxdma);
2140 		if (lp->txdma)
2141 			dma_release_channel(lp->txdma);
2142 	}
2143 #endif
2144 	iounmap(lp->base);
2145 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2146 	release_mem_region(res->start, SMC911X_IO_EXTENT);
2147 
2148 	free_netdev(ndev);
2149 	return 0;
2150 }
2151 
smc911x_drv_suspend(struct platform_device * dev,pm_message_t state)2152 static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
2153 {
2154 	struct net_device *ndev = platform_get_drvdata(dev);
2155 	struct smc911x_local *lp = netdev_priv(ndev);
2156 
2157 	DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2158 	if (ndev) {
2159 		if (netif_running(ndev)) {
2160 			netif_device_detach(ndev);
2161 			smc911x_shutdown(ndev);
2162 #if POWER_DOWN
2163 			/* Set D2 - Energy detect only setting */
2164 			SMC_SET_PMT_CTRL(lp, 2<<12);
2165 #endif
2166 		}
2167 	}
2168 	return 0;
2169 }
2170 
smc911x_drv_resume(struct platform_device * dev)2171 static int smc911x_drv_resume(struct platform_device *dev)
2172 {
2173 	struct net_device *ndev = platform_get_drvdata(dev);
2174 
2175 	DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__);
2176 	if (ndev) {
2177 		struct smc911x_local *lp = netdev_priv(ndev);
2178 
2179 		if (netif_running(ndev)) {
2180 			smc911x_reset(ndev);
2181 			if (lp->phy_type != 0)
2182 				smc911x_phy_configure(&lp->phy_configure);
2183 			smc911x_enable(ndev);
2184 			netif_device_attach(ndev);
2185 		}
2186 	}
2187 	return 0;
2188 }
2189 
2190 static struct platform_driver smc911x_driver = {
2191 	.probe		 = smc911x_drv_probe,
2192 	.remove	 = smc911x_drv_remove,
2193 	.suspend	 = smc911x_drv_suspend,
2194 	.resume	 = smc911x_drv_resume,
2195 	.driver	 = {
2196 		.name	 = CARDNAME,
2197 	},
2198 };
2199 
2200 module_platform_driver(smc911x_driver);
2201