1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Samsung's S5PV210 SoC device tree source
4 *
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
6 *
7 * Mateusz Krawczuk <m.krawczuk@partner.samsung.com>
8 * Tomasz Figa <t.figa@samsung.com>
9 *
10 * Samsung's S5PV210 SoC device nodes are listed in this file. S5PV210
11 * based board files can include this file and provide values for board specfic
12 * bindings.
13 *
14 * Note: This file does not include device nodes for all the controllers in
15 * S5PV210 SoC. As device tree coverage for S5PV210 increases, additional
16 * nodes can be added to this file.
17 */
18
19#include <dt-bindings/clock/s5pv210.h>
20#include <dt-bindings/clock/s5pv210-audss.h>
21
22/ {
23	#address-cells = <1>;
24	#size-cells = <1>;
25
26	aliases {
27		csis0 = &csis0;
28		dmc0 = &dmc0;
29		dmc1 = &dmc1;
30		fimc0 = &fimc0;
31		fimc1 = &fimc1;
32		fimc2 = &fimc2;
33		i2c0 = &i2c0;
34		i2c1 = &i2c1;
35		i2c2 = &i2c2;
36		i2s0 = &i2s0;
37		i2s1 = &i2s1;
38		i2s2 = &i2s2;
39		pinctrl0 = &pinctrl0;
40		spi0 = &spi0;
41		spi1 = &spi1;
42	};
43
44	cpus {
45		#address-cells = <1>;
46		#size-cells = <0>;
47
48		cpu@0 {
49			device_type = "cpu";
50			compatible = "arm,cortex-a8";
51			reg = <0>;
52		};
53	};
54
55	soc {
56		compatible = "simple-bus";
57		#address-cells = <1>;
58		#size-cells = <1>;
59		ranges;
60
61		external-clocks {
62			compatible = "simple-bus";
63			#address-cells = <1>;
64			#size-cells = <0>;
65
66			xxti: oscillator@0 {
67				compatible = "fixed-clock";
68				reg = <0>;
69				clock-frequency = <0>;
70				clock-output-names = "xxti";
71				#clock-cells = <0>;
72			};
73
74			xusbxti: oscillator@1 {
75				compatible = "fixed-clock";
76				reg = <1>;
77				clock-frequency = <0>;
78				clock-output-names = "xusbxti";
79				#clock-cells = <0>;
80			};
81		};
82
83		onenand: onenand@b0600000 {
84			compatible = "samsung,s5pv210-onenand";
85			reg = <0xb0600000 0x2000>,
86				<0xb0000000 0x20000>,
87				<0xb0040000 0x20000>;
88			interrupt-parent = <&vic1>;
89			interrupts = <31>;
90			clocks = <&clocks CLK_NANDXL>, <&clocks DOUT_FLASH>;
91			clock-names = "bus", "onenand";
92			#address-cells = <1>;
93			#size-cells = <1>;
94			status = "disabled";
95		};
96
97		chipid@e0000000 {
98			compatible = "samsung,s5pv210-chipid";
99			reg = <0xe0000000 0x1000>;
100		};
101
102		clocks: clock-controller@e0100000 {
103			compatible = "samsung,s5pv210-clock", "simple-bus";
104			reg = <0xe0100000 0x10000>;
105			clock-names = "xxti", "xusbxti";
106			clocks = <&xxti>, <&xusbxti>;
107			#clock-cells = <1>;
108			#address-cells = <1>;
109			#size-cells = <1>;
110			ranges;
111
112			pmu_syscon: syscon@e0108000 {
113				compatible = "samsung-s5pv210-pmu", "syscon";
114				reg = <0xe0108000 0x8000>;
115			};
116		};
117
118		pinctrl0: pinctrl@e0200000 {
119			compatible = "samsung,s5pv210-pinctrl";
120			reg = <0xe0200000 0x1000>;
121			interrupt-parent = <&vic0>;
122			interrupts = <30>;
123
124			wakeup-interrupt-controller {
125				compatible = "samsung,s5pv210-wakeup-eint";
126				interrupts = <16>;
127				interrupt-parent = <&vic0>;
128			};
129		};
130
131		amba {
132			#address-cells = <1>;
133			#size-cells = <1>;
134			compatible = "simple-bus";
135			ranges;
136
137			pdma0: dma@e0900000 {
138				compatible = "arm,pl330", "arm,primecell";
139				reg = <0xe0900000 0x1000>;
140				interrupt-parent = <&vic0>;
141				interrupts = <19>;
142				clocks = <&clocks CLK_PDMA0>;
143				clock-names = "apb_pclk";
144				#dma-cells = <1>;
145				#dma-channels = <8>;
146				#dma-requests = <32>;
147			};
148
149			pdma1: dma@e0a00000 {
150				compatible = "arm,pl330", "arm,primecell";
151				reg = <0xe0a00000 0x1000>;
152				interrupt-parent = <&vic0>;
153				interrupts = <20>;
154				clocks = <&clocks CLK_PDMA1>;
155				clock-names = "apb_pclk";
156				#dma-cells = <1>;
157				#dma-channels = <8>;
158				#dma-requests = <32>;
159			};
160		};
161
162		spi0: spi@e1300000 {
163			compatible = "samsung,s5pv210-spi";
164			reg = <0xe1300000 0x1000>;
165			interrupt-parent = <&vic1>;
166			interrupts = <15>;
167			dmas = <&pdma0 7>, <&pdma0 6>;
168			dma-names = "tx", "rx";
169			clocks = <&clocks SCLK_SPI0>, <&clocks CLK_SPI0>;
170			clock-names = "spi", "spi_busclk0";
171			pinctrl-names = "default";
172			pinctrl-0 = <&spi0_bus>;
173			#address-cells = <1>;
174			#size-cells = <0>;
175			status = "disabled";
176		};
177
178		spi1: spi@e1400000 {
179			compatible = "samsung,s5pv210-spi";
180			reg = <0xe1400000 0x1000>;
181			interrupt-parent = <&vic1>;
182			interrupts = <16>;
183			dmas = <&pdma1 7>, <&pdma1 6>;
184			dma-names = "tx", "rx";
185			clocks = <&clocks SCLK_SPI1>, <&clocks CLK_SPI1>;
186			clock-names = "spi", "spi_busclk0";
187			pinctrl-names = "default";
188			pinctrl-0 = <&spi1_bus>;
189			#address-cells = <1>;
190			#size-cells = <0>;
191			status = "disabled";
192		};
193
194		keypad: keypad@e1600000 {
195			compatible = "samsung,s5pv210-keypad";
196			reg = <0xe1600000 0x1000>;
197			interrupt-parent = <&vic2>;
198			interrupts = <25>;
199			clocks = <&clocks CLK_KEYIF>;
200			clock-names = "keypad";
201			status = "disabled";
202		};
203
204		i2c0: i2c@e1800000 {
205			compatible = "samsung,s3c2440-i2c";
206			reg = <0xe1800000 0x1000>;
207			interrupt-parent = <&vic1>;
208			interrupts = <14>;
209			clocks = <&clocks CLK_I2C0>;
210			clock-names = "i2c";
211			pinctrl-names = "default";
212			pinctrl-0 = <&i2c0_bus>;
213			#address-cells = <1>;
214			#size-cells = <0>;
215			status = "disabled";
216		};
217
218		i2c2: i2c@e1a00000 {
219			compatible = "samsung,s3c2440-i2c";
220			reg = <0xe1a00000 0x1000>;
221			interrupt-parent = <&vic1>;
222			interrupts = <19>;
223			clocks = <&clocks CLK_I2C2>;
224			clock-names = "i2c";
225			pinctrl-0 = <&i2c2_bus>;
226			pinctrl-names = "default";
227			#address-cells = <1>;
228			#size-cells = <0>;
229			status = "disabled";
230		};
231
232		audio-subsystem {
233			compatible = "samsung,s5pv210-audss", "simple-bus";
234			#address-cells = <1>;
235			#size-cells = <1>;
236			ranges;
237
238			clk_audss: clock-controller@eee10000 {
239				compatible = "samsung,s5pv210-audss-clock";
240				reg = <0xeee10000 0x1000>;
241				clock-names = "hclk", "xxti",
242						"fout_epll",
243						"sclk_audio0";
244				clocks = <&clocks DOUT_HCLKP>, <&xxti>,
245						<&clocks FOUT_EPLL>,
246						<&clocks SCLK_AUDIO0>;
247				#clock-cells = <1>;
248			};
249
250			i2s0: i2s@eee30000 {
251				compatible = "samsung,s5pv210-i2s";
252				reg = <0xeee30000 0x1000>;
253				interrupt-parent = <&vic2>;
254				interrupts = <16>;
255				dma-names = "rx", "tx", "tx-sec";
256				dmas = <&pdma1 9>, <&pdma1 10>, <&pdma1 11>;
257				clock-names = "iis",
258						"i2s_opclk0",
259						"i2s_opclk1";
260				clocks = <&clk_audss CLK_I2S>,
261						<&clk_audss CLK_I2S>,
262						<&clk_audss CLK_DOUT_AUD_BUS>;
263				samsung,idma-addr = <0xc0010000>;
264				pinctrl-names = "default";
265				pinctrl-0 = <&i2s0_bus>;
266				#sound-dai-cells = <0>;
267				status = "disabled";
268			};
269		};
270
271		i2s1: i2s@e2100000 {
272			compatible = "samsung,s3c6410-i2s";
273			reg = <0xe2100000 0x1000>;
274			interrupt-parent = <&vic2>;
275			interrupts = <17>;
276			dma-names = "rx", "tx";
277			dmas = <&pdma1 12>, <&pdma1 13>;
278			clock-names = "iis", "i2s_opclk0";
279			clocks = <&clocks CLK_I2S1>, <&clocks SCLK_AUDIO1>;
280			pinctrl-names = "default";
281			pinctrl-0 = <&i2s1_bus>;
282			#sound-dai-cells = <0>;
283			status = "disabled";
284		};
285
286		i2s2: i2s@e2a00000 {
287			compatible = "samsung,s3c6410-i2s";
288			reg = <0xe2a00000 0x1000>;
289			interrupt-parent = <&vic2>;
290			interrupts = <18>;
291			dma-names = "rx", "tx";
292			dmas = <&pdma1 14>, <&pdma1 15>;
293			clock-names = "iis", "i2s_opclk0";
294			clocks = <&clocks CLK_I2S2>, <&clocks SCLK_AUDIO2>;
295			pinctrl-names = "default";
296			pinctrl-0 = <&i2s2_bus>;
297			#sound-dai-cells = <0>;
298			status = "disabled";
299		};
300
301		pwm: pwm@e2500000 {
302			compatible = "samsung,s5pc100-pwm";
303			reg = <0xe2500000 0x1000>;
304			interrupt-parent = <&vic0>;
305			interrupts = <21>, <22>, <23>, <24>, <25>;
306			clock-names = "timers";
307			clocks = <&clocks CLK_PWM>;
308			#pwm-cells = <3>;
309		};
310
311		watchdog: watchdog@e2700000 {
312			compatible = "samsung,s3c6410-wdt";
313			reg = <0xe2700000 0x1000>;
314			interrupt-parent = <&vic0>;
315			interrupts = <26>;
316			clock-names = "watchdog";
317			clocks = <&clocks CLK_WDT>;
318		};
319
320		rtc: rtc@e2800000 {
321			compatible = "samsung,s3c6410-rtc";
322			reg = <0xe2800000 0x100>;
323			interrupt-parent = <&vic0>;
324			interrupts = <28>, <29>;
325			clocks = <&clocks CLK_RTC>;
326			clock-names = "rtc";
327			status = "disabled";
328		};
329
330		uart0: serial@e2900000 {
331			compatible = "samsung,s5pv210-uart";
332			reg = <0xe2900000 0x400>;
333			interrupt-parent = <&vic1>;
334			interrupts = <10>;
335			clock-names = "uart", "clk_uart_baud0",
336					"clk_uart_baud1";
337			clocks = <&clocks CLK_UART0>, <&clocks CLK_UART0>,
338					<&clocks SCLK_UART0>;
339			status = "disabled";
340		};
341
342		uart1: serial@e2900400 {
343			compatible = "samsung,s5pv210-uart";
344			reg = <0xe2900400 0x400>;
345			interrupt-parent = <&vic1>;
346			interrupts = <11>;
347			clock-names = "uart", "clk_uart_baud0",
348					"clk_uart_baud1";
349			clocks = <&clocks CLK_UART1>, <&clocks CLK_UART1>,
350					<&clocks SCLK_UART1>;
351			status = "disabled";
352		};
353
354		uart2: serial@e2900800 {
355			compatible = "samsung,s5pv210-uart";
356			reg = <0xe2900800 0x400>;
357			interrupt-parent = <&vic1>;
358			interrupts = <12>;
359			clock-names = "uart", "clk_uart_baud0",
360					"clk_uart_baud1";
361			clocks = <&clocks CLK_UART2>, <&clocks CLK_UART2>,
362					<&clocks SCLK_UART2>;
363			status = "disabled";
364		};
365
366		uart3: serial@e2900c00 {
367			compatible = "samsung,s5pv210-uart";
368			reg = <0xe2900c00 0x400>;
369			interrupt-parent = <&vic1>;
370			interrupts = <13>;
371			clock-names = "uart", "clk_uart_baud0",
372					"clk_uart_baud1";
373			clocks = <&clocks CLK_UART3>, <&clocks CLK_UART3>,
374					<&clocks SCLK_UART3>;
375			status = "disabled";
376		};
377
378		sdhci0: sdhci@eb000000 {
379			compatible = "samsung,s3c6410-sdhci";
380			reg = <0xeb000000 0x100000>;
381			interrupt-parent = <&vic1>;
382			interrupts = <26>;
383			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
384			clocks = <&clocks CLK_HSMMC0>, <&clocks CLK_HSMMC0>,
385					<&clocks SCLK_MMC0>;
386			status = "disabled";
387		};
388
389		sdhci1: sdhci@eb100000 {
390			compatible = "samsung,s3c6410-sdhci";
391			reg = <0xeb100000 0x100000>;
392			interrupt-parent = <&vic1>;
393			interrupts = <27>;
394			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
395			clocks = <&clocks CLK_HSMMC1>, <&clocks CLK_HSMMC1>,
396					<&clocks SCLK_MMC1>;
397			status = "disabled";
398		};
399
400		sdhci2: sdhci@eb200000 {
401			compatible = "samsung,s3c6410-sdhci";
402			reg = <0xeb200000 0x100000>;
403			interrupt-parent = <&vic1>;
404			interrupts = <28>;
405			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.2";
406			clocks = <&clocks CLK_HSMMC2>, <&clocks CLK_HSMMC2>,
407					<&clocks SCLK_MMC2>;
408			status = "disabled";
409		};
410
411		sdhci3: sdhci@eb300000 {
412			compatible = "samsung,s3c6410-sdhci";
413			reg = <0xeb300000 0x100000>;
414			interrupt-parent = <&vic3>;
415			interrupts = <2>;
416			clock-names = "hsmmc", "mmc_busclk.0", "mmc_busclk.3";
417			clocks = <&clocks CLK_HSMMC3>, <&clocks CLK_HSMMC3>,
418					<&clocks SCLK_MMC3>;
419			status = "disabled";
420		};
421
422		hsotg: hsotg@ec000000 {
423			compatible = "samsung,s3c6400-hsotg";
424			reg = <0xec000000 0x20000>;
425			interrupt-parent = <&vic1>;
426			interrupts = <24>;
427			clocks = <&clocks CLK_USB_OTG>;
428			clock-names = "otg";
429			phy-names = "usb2-phy";
430			phys = <&usbphy 0>;
431			status = "disabled";
432		};
433
434		usbphy: usbphy@ec100000 {
435			compatible = "samsung,s5pv210-usb2-phy";
436			reg = <0xec100000 0x100>;
437			samsung,pmureg-phandle = <&pmu_syscon>;
438			clocks = <&clocks CLK_USB_OTG>, <&xusbxti>;
439			clock-names = "phy", "ref";
440			#phy-cells = <1>;
441			status = "disabled";
442		};
443
444		ehci: ehci@ec200000 {
445			compatible = "samsung,exynos4210-ehci";
446			reg = <0xec200000 0x100>;
447			interrupts = <23>;
448			interrupt-parent = <&vic1>;
449			clocks = <&clocks CLK_USB_HOST>;
450			clock-names = "usbhost";
451			#address-cells = <1>;
452			#size-cells = <0>;
453			status = "disabled";
454
455			port@0 {
456				reg = <0>;
457				phys = <&usbphy 1>;
458			};
459		};
460
461		ohci: ohci@ec300000 {
462			compatible = "samsung,exynos4210-ohci";
463			reg = <0xec300000 0x100>;
464			interrupts = <23>;
465			interrupt-parent = <&vic1>;
466			clocks = <&clocks CLK_USB_HOST>;
467			clock-names = "usbhost";
468			#address-cells = <1>;
469			#size-cells = <0>;
470			status = "disabled";
471
472			port@0 {
473				reg = <0>;
474				phys = <&usbphy 1>;
475			};
476		};
477
478		mfc: codec@f1700000 {
479			compatible = "samsung,mfc-v5";
480			reg = <0xf1700000 0x10000>;
481			interrupt-parent = <&vic2>;
482			interrupts = <14>;
483			clocks = <&clocks DOUT_MFC>, <&clocks CLK_MFC>;
484			clock-names = "sclk_mfc", "mfc";
485		};
486
487		vic0: interrupt-controller@f2000000 {
488			compatible = "arm,pl192-vic";
489			interrupt-controller;
490			reg = <0xf2000000 0x1000>;
491			#interrupt-cells = <1>;
492		};
493
494		vic1: interrupt-controller@f2100000 {
495			compatible = "arm,pl192-vic";
496			interrupt-controller;
497			reg = <0xf2100000 0x1000>;
498			#interrupt-cells = <1>;
499		};
500
501		vic2: interrupt-controller@f2200000 {
502			compatible = "arm,pl192-vic";
503			interrupt-controller;
504			reg = <0xf2200000 0x1000>;
505			#interrupt-cells = <1>;
506		};
507
508		vic3: interrupt-controller@f2300000 {
509			compatible = "arm,pl192-vic";
510			interrupt-controller;
511			reg = <0xf2300000 0x1000>;
512			#interrupt-cells = <1>;
513		};
514
515		fimd: fimd@f8000000 {
516			compatible = "samsung,s5pv210-fimd";
517			interrupt-parent = <&vic2>;
518			reg = <0xf8000000 0x20000>;
519			interrupt-names = "fifo", "vsync", "lcd_sys";
520			interrupts = <0>, <1>, <2>;
521			clocks = <&clocks SCLK_FIMD>, <&clocks CLK_FIMD>;
522			clock-names = "sclk_fimd", "fimd";
523			status = "disabled";
524		};
525
526		dmc0: dmc@f0000000 {
527			compatible = "samsung,s5pv210-dmc";
528			reg = <0xf0000000 0x1000>;
529		};
530
531		dmc1: dmc@f1400000 {
532			compatible = "samsung,s5pv210-dmc";
533			reg = <0xf1400000 0x1000>;
534		};
535
536		g2d: g2d@fa000000 {
537			compatible = "samsung,s5pv210-g2d";
538			reg = <0xfa000000 0x1000>;
539			interrupt-parent = <&vic2>;
540			interrupts = <9>;
541			clocks = <&clocks DOUT_G2D>, <&clocks CLK_G2D>;
542			clock-names = "sclk_fimg2d", "fimg2d";
543		};
544
545		mdma1: mdma@fa200000 {
546			compatible = "arm,pl330", "arm,primecell";
547			reg = <0xfa200000 0x1000>;
548			interrupt-parent = <&vic0>;
549			interrupts = <18>;
550			clocks = <&clocks CLK_MDMA>;
551			clock-names = "apb_pclk";
552			#dma-cells = <1>;
553			#dma-channels = <8>;
554			#dma-requests = <1>;
555		};
556
557		rotator: rotator@fa300000 {
558			compatible = "samsung,s5pv210-rotator";
559			reg = <0xfa300000 0x1000>;
560			interrupt-parent = <&vic2>;
561			interrupts = <4>;
562			clocks = <&clocks CLK_ROTATOR>;
563			clock-names = "rotator";
564		};
565
566		i2c1: i2c@fab00000 {
567			compatible = "samsung,s3c2440-i2c";
568			reg = <0xfab00000 0x1000>;
569			interrupt-parent = <&vic2>;
570			interrupts = <13>;
571			clocks = <&clocks CLK_I2C1>;
572			clock-names = "i2c";
573			pinctrl-names = "default";
574			pinctrl-0 = <&i2c1_bus>;
575			#address-cells = <1>;
576			#size-cells = <0>;
577			status = "disabled";
578		};
579
580		camera: camera {
581			compatible = "samsung,fimc", "simple-bus";
582			pinctrl-names = "default";
583			pinctrl-0 = <>;
584			clocks = <&clocks SCLK_CAM0>, <&clocks SCLK_CAM1>;
585			clock-names = "sclk_cam0", "sclk_cam1";
586			#address-cells = <1>;
587			#size-cells = <1>;
588			#clock-cells = <1>;
589			clock-output-names = "cam_a_clkout", "cam_b_clkout";
590			ranges;
591
592			csis0: csis@fa600000 {
593				compatible = "samsung,s5pv210-csis";
594				reg = <0xfa600000 0x4000>;
595				interrupt-parent = <&vic2>;
596				interrupts = <29>;
597				clocks = <&clocks CLK_CSIS>,
598						<&clocks SCLK_CSIS>;
599				clock-names = "clk_csis",
600						"sclk_csis";
601				bus-width = <4>;
602				status = "disabled";
603				#address-cells = <1>;
604				#size-cells = <0>;
605			};
606
607			fimc0: fimc@fb200000 {
608				compatible = "samsung,s5pv210-fimc";
609				reg = <0xfb200000 0x1000>;
610				interrupts = <5>;
611				interrupt-parent = <&vic2>;
612				clocks = <&clocks CLK_FIMC0>,
613						<&clocks SCLK_FIMC0>;
614				clock-names = "fimc",
615						"sclk_fimc";
616				samsung,pix-limits = <4224 8192 1920 4224>;
617				samsung,mainscaler-ext;
618				samsung,cam-if;
619			};
620
621			fimc1: fimc@fb300000 {
622				compatible = "samsung,s5pv210-fimc";
623				reg = <0xfb300000 0x1000>;
624				interrupt-parent = <&vic2>;
625				interrupts = <6>;
626				clocks = <&clocks CLK_FIMC1>,
627						<&clocks SCLK_FIMC1>;
628				clock-names = "fimc",
629						"sclk_fimc";
630				samsung,pix-limits = <4224 8192 1920 4224>;
631				samsung,mainscaler-ext;
632				samsung,cam-if;
633			};
634
635			fimc2: fimc@fb400000 {
636				compatible = "samsung,s5pv210-fimc";
637				reg = <0xfb400000 0x1000>;
638				interrupt-parent = <&vic2>;
639				interrupts = <7>;
640				clocks = <&clocks CLK_FIMC2>,
641						<&clocks SCLK_FIMC2>;
642				clock-names = "fimc",
643						"sclk_fimc";
644				samsung,pix-limits = <4224 8192 1920 4224>;
645				samsung,mainscaler-ext;
646				samsung,lcd-wb;
647			};
648		};
649
650		jpeg_codec: jpeg-codec@fb600000 {
651			compatible = "samsung,s5pv210-jpeg";
652			reg = <0xfb600000 0x1000>;
653			interrupt-parent = <&vic2>;
654			interrupts = <8>;
655			clocks = <&clocks CLK_JPEG>;
656			clock-names = "jpeg";
657		};
658	};
659};
660
661#include "s5pv210-pinctrl.dtsi"
662