1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-W (R8A77960) SoC 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7796-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7796-sysc.h> 11 12#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 13 14/ { 15 compatible = "renesas,r8a7796"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c2 = &i2c2; 23 i2c3 = &i2c3; 24 i2c4 = &i2c4; 25 i2c5 = &i2c5; 26 i2c6 = &i2c6; 27 i2c7 = &i2c_dvfs; 28 }; 29 30 /* 31 * The external audio clocks are configured as 0 Hz fixed frequency 32 * clocks by default. 33 * Boards that provide audio clocks should override them. 34 */ 35 audio_clk_a: audio_clk_a { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 audio_clk_b: audio_clk_b { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 audio_clk_c: audio_clk_c { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 51 }; 52 53 /* External CAN clock - to be overridden by boards that provide it */ 54 can_clk: can { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 cluster0_opp: opp_table0 { 61 compatible = "operating-points-v2"; 62 opp-shared; 63 64 opp-500000000 { 65 opp-hz = /bits/ 64 <500000000>; 66 opp-microvolt = <820000>; 67 clock-latency-ns = <300000>; 68 }; 69 opp-1000000000 { 70 opp-hz = /bits/ 64 <1000000000>; 71 opp-microvolt = <820000>; 72 clock-latency-ns = <300000>; 73 }; 74 opp-1500000000 { 75 opp-hz = /bits/ 64 <1500000000>; 76 opp-microvolt = <820000>; 77 clock-latency-ns = <300000>; 78 }; 79 opp-1600000000 { 80 opp-hz = /bits/ 64 <1600000000>; 81 opp-microvolt = <900000>; 82 clock-latency-ns = <300000>; 83 turbo-mode; 84 }; 85 opp-1700000000 { 86 opp-hz = /bits/ 64 <1700000000>; 87 opp-microvolt = <900000>; 88 clock-latency-ns = <300000>; 89 turbo-mode; 90 }; 91 opp-1800000000 { 92 opp-hz = /bits/ 64 <1800000000>; 93 opp-microvolt = <960000>; 94 clock-latency-ns = <300000>; 95 turbo-mode; 96 }; 97 }; 98 99 cluster1_opp: opp_table1 { 100 compatible = "operating-points-v2"; 101 opp-shared; 102 103 opp-800000000 { 104 opp-hz = /bits/ 64 <800000000>; 105 opp-microvolt = <820000>; 106 clock-latency-ns = <300000>; 107 }; 108 opp-1000000000 { 109 opp-hz = /bits/ 64 <1000000000>; 110 opp-microvolt = <820000>; 111 clock-latency-ns = <300000>; 112 }; 113 opp-1200000000 { 114 opp-hz = /bits/ 64 <1200000000>; 115 opp-microvolt = <820000>; 116 clock-latency-ns = <300000>; 117 }; 118 opp-1300000000 { 119 opp-hz = /bits/ 64 <1300000000>; 120 opp-microvolt = <820000>; 121 clock-latency-ns = <300000>; 122 turbo-mode; 123 }; 124 }; 125 126 cpus { 127 #address-cells = <1>; 128 #size-cells = <0>; 129 130 cpu-map { 131 cluster0 { 132 core0 { 133 cpu = <&a57_0>; 134 }; 135 core1 { 136 cpu = <&a57_1>; 137 }; 138 }; 139 140 cluster1 { 141 core0 { 142 cpu = <&a53_0>; 143 }; 144 core1 { 145 cpu = <&a53_1>; 146 }; 147 core2 { 148 cpu = <&a53_2>; 149 }; 150 core3 { 151 cpu = <&a53_3>; 152 }; 153 }; 154 }; 155 156 a57_0: cpu@0 { 157 compatible = "arm,cortex-a57"; 158 reg = <0x0>; 159 device_type = "cpu"; 160 power-domains = <&sysc R8A7796_PD_CA57_CPU0>; 161 next-level-cache = <&L2_CA57>; 162 enable-method = "psci"; 163 dynamic-power-coefficient = <854>; 164 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 165 operating-points-v2 = <&cluster0_opp>; 166 capacity-dmips-mhz = <1024>; 167 #cooling-cells = <2>; 168 }; 169 170 a57_1: cpu@1 { 171 compatible = "arm,cortex-a57"; 172 reg = <0x1>; 173 device_type = "cpu"; 174 power-domains = <&sysc R8A7796_PD_CA57_CPU1>; 175 next-level-cache = <&L2_CA57>; 176 enable-method = "psci"; 177 clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; 178 operating-points-v2 = <&cluster0_opp>; 179 capacity-dmips-mhz = <1024>; 180 #cooling-cells = <2>; 181 }; 182 183 a53_0: cpu@100 { 184 compatible = "arm,cortex-a53"; 185 reg = <0x100>; 186 device_type = "cpu"; 187 power-domains = <&sysc R8A7796_PD_CA53_CPU0>; 188 next-level-cache = <&L2_CA53>; 189 enable-method = "psci"; 190 #cooling-cells = <2>; 191 dynamic-power-coefficient = <277>; 192 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 193 operating-points-v2 = <&cluster1_opp>; 194 capacity-dmips-mhz = <535>; 195 }; 196 197 a53_1: cpu@101 { 198 compatible = "arm,cortex-a53"; 199 reg = <0x101>; 200 device_type = "cpu"; 201 power-domains = <&sysc R8A7796_PD_CA53_CPU1>; 202 next-level-cache = <&L2_CA53>; 203 enable-method = "psci"; 204 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 205 operating-points-v2 = <&cluster1_opp>; 206 capacity-dmips-mhz = <535>; 207 }; 208 209 a53_2: cpu@102 { 210 compatible = "arm,cortex-a53"; 211 reg = <0x102>; 212 device_type = "cpu"; 213 power-domains = <&sysc R8A7796_PD_CA53_CPU2>; 214 next-level-cache = <&L2_CA53>; 215 enable-method = "psci"; 216 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 217 operating-points-v2 = <&cluster1_opp>; 218 capacity-dmips-mhz = <535>; 219 }; 220 221 a53_3: cpu@103 { 222 compatible = "arm,cortex-a53"; 223 reg = <0x103>; 224 device_type = "cpu"; 225 power-domains = <&sysc R8A7796_PD_CA53_CPU3>; 226 next-level-cache = <&L2_CA53>; 227 enable-method = "psci"; 228 clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; 229 operating-points-v2 = <&cluster1_opp>; 230 capacity-dmips-mhz = <535>; 231 }; 232 233 L2_CA57: cache-controller-0 { 234 compatible = "cache"; 235 power-domains = <&sysc R8A7796_PD_CA57_SCU>; 236 cache-unified; 237 cache-level = <2>; 238 }; 239 240 L2_CA53: cache-controller-1 { 241 compatible = "cache"; 242 power-domains = <&sysc R8A7796_PD_CA53_SCU>; 243 cache-unified; 244 cache-level = <2>; 245 }; 246 }; 247 248 extal_clk: extal { 249 compatible = "fixed-clock"; 250 #clock-cells = <0>; 251 /* This value must be overridden by the board */ 252 clock-frequency = <0>; 253 }; 254 255 extalr_clk: extalr { 256 compatible = "fixed-clock"; 257 #clock-cells = <0>; 258 /* This value must be overridden by the board */ 259 clock-frequency = <0>; 260 }; 261 262 /* External PCIe clock - can be overridden by the board */ 263 pcie_bus_clk: pcie_bus { 264 compatible = "fixed-clock"; 265 #clock-cells = <0>; 266 clock-frequency = <0>; 267 }; 268 269 pmu_a53 { 270 compatible = "arm,cortex-a53-pmu"; 271 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 272 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 273 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 274 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 275 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 276 }; 277 278 pmu_a57 { 279 compatible = "arm,cortex-a57-pmu"; 280 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 281 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 282 interrupt-affinity = <&a57_0>, <&a57_1>; 283 }; 284 285 psci { 286 compatible = "arm,psci-1.0", "arm,psci-0.2"; 287 method = "smc"; 288 }; 289 290 /* External SCIF clock - to be overridden by boards that provide it */ 291 scif_clk: scif { 292 compatible = "fixed-clock"; 293 #clock-cells = <0>; 294 clock-frequency = <0>; 295 }; 296 297 soc { 298 compatible = "simple-bus"; 299 interrupt-parent = <&gic>; 300 #address-cells = <2>; 301 #size-cells = <2>; 302 ranges; 303 304 rwdt: watchdog@e6020000 { 305 compatible = "renesas,r8a7796-wdt", 306 "renesas,rcar-gen3-wdt"; 307 reg = <0 0xe6020000 0 0x0c>; 308 clocks = <&cpg CPG_MOD 402>; 309 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 310 resets = <&cpg 402>; 311 status = "disabled"; 312 }; 313 314 gpio0: gpio@e6050000 { 315 compatible = "renesas,gpio-r8a7796", 316 "renesas,rcar-gen3-gpio"; 317 reg = <0 0xe6050000 0 0x50>; 318 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 319 #gpio-cells = <2>; 320 gpio-controller; 321 gpio-ranges = <&pfc 0 0 16>; 322 #interrupt-cells = <2>; 323 interrupt-controller; 324 clocks = <&cpg CPG_MOD 912>; 325 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 326 resets = <&cpg 912>; 327 }; 328 329 gpio1: gpio@e6051000 { 330 compatible = "renesas,gpio-r8a7796", 331 "renesas,rcar-gen3-gpio"; 332 reg = <0 0xe6051000 0 0x50>; 333 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 334 #gpio-cells = <2>; 335 gpio-controller; 336 gpio-ranges = <&pfc 0 32 29>; 337 #interrupt-cells = <2>; 338 interrupt-controller; 339 clocks = <&cpg CPG_MOD 911>; 340 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 341 resets = <&cpg 911>; 342 }; 343 344 gpio2: gpio@e6052000 { 345 compatible = "renesas,gpio-r8a7796", 346 "renesas,rcar-gen3-gpio"; 347 reg = <0 0xe6052000 0 0x50>; 348 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 349 #gpio-cells = <2>; 350 gpio-controller; 351 gpio-ranges = <&pfc 0 64 15>; 352 #interrupt-cells = <2>; 353 interrupt-controller; 354 clocks = <&cpg CPG_MOD 910>; 355 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 356 resets = <&cpg 910>; 357 }; 358 359 gpio3: gpio@e6053000 { 360 compatible = "renesas,gpio-r8a7796", 361 "renesas,rcar-gen3-gpio"; 362 reg = <0 0xe6053000 0 0x50>; 363 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 364 #gpio-cells = <2>; 365 gpio-controller; 366 gpio-ranges = <&pfc 0 96 16>; 367 #interrupt-cells = <2>; 368 interrupt-controller; 369 clocks = <&cpg CPG_MOD 909>; 370 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 371 resets = <&cpg 909>; 372 }; 373 374 gpio4: gpio@e6054000 { 375 compatible = "renesas,gpio-r8a7796", 376 "renesas,rcar-gen3-gpio"; 377 reg = <0 0xe6054000 0 0x50>; 378 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 379 #gpio-cells = <2>; 380 gpio-controller; 381 gpio-ranges = <&pfc 0 128 18>; 382 #interrupt-cells = <2>; 383 interrupt-controller; 384 clocks = <&cpg CPG_MOD 908>; 385 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 386 resets = <&cpg 908>; 387 }; 388 389 gpio5: gpio@e6055000 { 390 compatible = "renesas,gpio-r8a7796", 391 "renesas,rcar-gen3-gpio"; 392 reg = <0 0xe6055000 0 0x50>; 393 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 394 #gpio-cells = <2>; 395 gpio-controller; 396 gpio-ranges = <&pfc 0 160 26>; 397 #interrupt-cells = <2>; 398 interrupt-controller; 399 clocks = <&cpg CPG_MOD 907>; 400 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 401 resets = <&cpg 907>; 402 }; 403 404 gpio6: gpio@e6055400 { 405 compatible = "renesas,gpio-r8a7796", 406 "renesas,rcar-gen3-gpio"; 407 reg = <0 0xe6055400 0 0x50>; 408 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 409 #gpio-cells = <2>; 410 gpio-controller; 411 gpio-ranges = <&pfc 0 192 32>; 412 #interrupt-cells = <2>; 413 interrupt-controller; 414 clocks = <&cpg CPG_MOD 906>; 415 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 416 resets = <&cpg 906>; 417 }; 418 419 gpio7: gpio@e6055800 { 420 compatible = "renesas,gpio-r8a7796", 421 "renesas,rcar-gen3-gpio"; 422 reg = <0 0xe6055800 0 0x50>; 423 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 424 #gpio-cells = <2>; 425 gpio-controller; 426 gpio-ranges = <&pfc 0 224 4>; 427 #interrupt-cells = <2>; 428 interrupt-controller; 429 clocks = <&cpg CPG_MOD 905>; 430 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 431 resets = <&cpg 905>; 432 }; 433 434 pfc: pin-controller@e6060000 { 435 compatible = "renesas,pfc-r8a7796"; 436 reg = <0 0xe6060000 0 0x50c>; 437 }; 438 439 cmt0: timer@e60f0000 { 440 compatible = "renesas,r8a7796-cmt0", 441 "renesas,rcar-gen3-cmt0"; 442 reg = <0 0xe60f0000 0 0x1004>; 443 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 444 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 445 clocks = <&cpg CPG_MOD 303>; 446 clock-names = "fck"; 447 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 448 resets = <&cpg 303>; 449 status = "disabled"; 450 }; 451 452 cmt1: timer@e6130000 { 453 compatible = "renesas,r8a7796-cmt1", 454 "renesas,rcar-gen3-cmt1"; 455 reg = <0 0xe6130000 0 0x1004>; 456 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 457 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 458 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 459 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 460 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 461 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 462 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 463 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 464 clocks = <&cpg CPG_MOD 302>; 465 clock-names = "fck"; 466 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 467 resets = <&cpg 302>; 468 status = "disabled"; 469 }; 470 471 cmt2: timer@e6140000 { 472 compatible = "renesas,r8a7796-cmt1", 473 "renesas,rcar-gen3-cmt1"; 474 reg = <0 0xe6140000 0 0x1004>; 475 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 476 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 477 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 478 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 479 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 480 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 481 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 482 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 483 clocks = <&cpg CPG_MOD 301>; 484 clock-names = "fck"; 485 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 486 resets = <&cpg 301>; 487 status = "disabled"; 488 }; 489 490 cmt3: timer@e6148000 { 491 compatible = "renesas,r8a7796-cmt1", 492 "renesas,rcar-gen3-cmt1"; 493 reg = <0 0xe6148000 0 0x1004>; 494 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 495 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 496 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 497 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 498 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 499 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 500 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 501 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 502 clocks = <&cpg CPG_MOD 300>; 503 clock-names = "fck"; 504 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 505 resets = <&cpg 300>; 506 status = "disabled"; 507 }; 508 509 cpg: clock-controller@e6150000 { 510 compatible = "renesas,r8a7796-cpg-mssr"; 511 reg = <0 0xe6150000 0 0x1000>; 512 clocks = <&extal_clk>, <&extalr_clk>; 513 clock-names = "extal", "extalr"; 514 #clock-cells = <2>; 515 #power-domain-cells = <0>; 516 #reset-cells = <1>; 517 }; 518 519 rst: reset-controller@e6160000 { 520 compatible = "renesas,r8a7796-rst"; 521 reg = <0 0xe6160000 0 0x0200>; 522 }; 523 524 sysc: system-controller@e6180000 { 525 compatible = "renesas,r8a7796-sysc"; 526 reg = <0 0xe6180000 0 0x0400>; 527 #power-domain-cells = <1>; 528 }; 529 530 tsc: thermal@e6198000 { 531 compatible = "renesas,r8a7796-thermal"; 532 reg = <0 0xe6198000 0 0x100>, 533 <0 0xe61a0000 0 0x100>, 534 <0 0xe61a8000 0 0x100>; 535 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 536 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 537 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 538 clocks = <&cpg CPG_MOD 522>; 539 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 540 resets = <&cpg 522>; 541 #thermal-sensor-cells = <1>; 542 }; 543 544 intc_ex: interrupt-controller@e61c0000 { 545 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc"; 546 #interrupt-cells = <2>; 547 interrupt-controller; 548 reg = <0 0xe61c0000 0 0x200>; 549 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 550 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 551 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 552 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 553 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 554 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 555 clocks = <&cpg CPG_MOD 407>; 556 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 557 resets = <&cpg 407>; 558 }; 559 560 i2c0: i2c@e6500000 { 561 #address-cells = <1>; 562 #size-cells = <0>; 563 compatible = "renesas,i2c-r8a7796", 564 "renesas,rcar-gen3-i2c"; 565 reg = <0 0xe6500000 0 0x40>; 566 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 567 clocks = <&cpg CPG_MOD 931>; 568 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 569 resets = <&cpg 931>; 570 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 571 <&dmac2 0x91>, <&dmac2 0x90>; 572 dma-names = "tx", "rx", "tx", "rx"; 573 i2c-scl-internal-delay-ns = <110>; 574 status = "disabled"; 575 }; 576 577 i2c1: i2c@e6508000 { 578 #address-cells = <1>; 579 #size-cells = <0>; 580 compatible = "renesas,i2c-r8a7796", 581 "renesas,rcar-gen3-i2c"; 582 reg = <0 0xe6508000 0 0x40>; 583 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 584 clocks = <&cpg CPG_MOD 930>; 585 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 586 resets = <&cpg 930>; 587 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 588 <&dmac2 0x93>, <&dmac2 0x92>; 589 dma-names = "tx", "rx", "tx", "rx"; 590 i2c-scl-internal-delay-ns = <6>; 591 status = "disabled"; 592 }; 593 594 i2c2: i2c@e6510000 { 595 #address-cells = <1>; 596 #size-cells = <0>; 597 compatible = "renesas,i2c-r8a7796", 598 "renesas,rcar-gen3-i2c"; 599 reg = <0 0xe6510000 0 0x40>; 600 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 601 clocks = <&cpg CPG_MOD 929>; 602 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 603 resets = <&cpg 929>; 604 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 605 <&dmac2 0x95>, <&dmac2 0x94>; 606 dma-names = "tx", "rx", "tx", "rx"; 607 i2c-scl-internal-delay-ns = <6>; 608 status = "disabled"; 609 }; 610 611 i2c3: i2c@e66d0000 { 612 #address-cells = <1>; 613 #size-cells = <0>; 614 compatible = "renesas,i2c-r8a7796", 615 "renesas,rcar-gen3-i2c"; 616 reg = <0 0xe66d0000 0 0x40>; 617 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 618 clocks = <&cpg CPG_MOD 928>; 619 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 620 resets = <&cpg 928>; 621 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 622 dma-names = "tx", "rx"; 623 i2c-scl-internal-delay-ns = <110>; 624 status = "disabled"; 625 }; 626 627 i2c4: i2c@e66d8000 { 628 #address-cells = <1>; 629 #size-cells = <0>; 630 compatible = "renesas,i2c-r8a7796", 631 "renesas,rcar-gen3-i2c"; 632 reg = <0 0xe66d8000 0 0x40>; 633 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 634 clocks = <&cpg CPG_MOD 927>; 635 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 636 resets = <&cpg 927>; 637 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 638 dma-names = "tx", "rx"; 639 i2c-scl-internal-delay-ns = <110>; 640 status = "disabled"; 641 }; 642 643 i2c5: i2c@e66e0000 { 644 #address-cells = <1>; 645 #size-cells = <0>; 646 compatible = "renesas,i2c-r8a7796", 647 "renesas,rcar-gen3-i2c"; 648 reg = <0 0xe66e0000 0 0x40>; 649 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 650 clocks = <&cpg CPG_MOD 919>; 651 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 652 resets = <&cpg 919>; 653 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 654 dma-names = "tx", "rx"; 655 i2c-scl-internal-delay-ns = <110>; 656 status = "disabled"; 657 }; 658 659 i2c6: i2c@e66e8000 { 660 #address-cells = <1>; 661 #size-cells = <0>; 662 compatible = "renesas,i2c-r8a7796", 663 "renesas,rcar-gen3-i2c"; 664 reg = <0 0xe66e8000 0 0x40>; 665 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 666 clocks = <&cpg CPG_MOD 918>; 667 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 668 resets = <&cpg 918>; 669 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 670 dma-names = "tx", "rx"; 671 i2c-scl-internal-delay-ns = <6>; 672 status = "disabled"; 673 }; 674 675 i2c_dvfs: i2c@e60b0000 { 676 #address-cells = <1>; 677 #size-cells = <0>; 678 compatible = "renesas,iic-r8a7796", 679 "renesas,rcar-gen3-iic", 680 "renesas,rmobile-iic"; 681 reg = <0 0xe60b0000 0 0x425>; 682 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 683 clocks = <&cpg CPG_MOD 926>; 684 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 685 resets = <&cpg 926>; 686 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 687 dma-names = "tx", "rx"; 688 status = "disabled"; 689 }; 690 691 hscif0: serial@e6540000 { 692 compatible = "renesas,hscif-r8a7796", 693 "renesas,rcar-gen3-hscif", 694 "renesas,hscif"; 695 reg = <0 0xe6540000 0 0x60>; 696 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 697 clocks = <&cpg CPG_MOD 520>, 698 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 699 <&scif_clk>; 700 clock-names = "fck", "brg_int", "scif_clk"; 701 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 702 <&dmac2 0x31>, <&dmac2 0x30>; 703 dma-names = "tx", "rx", "tx", "rx"; 704 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 705 resets = <&cpg 520>; 706 status = "disabled"; 707 }; 708 709 hscif1: serial@e6550000 { 710 compatible = "renesas,hscif-r8a7796", 711 "renesas,rcar-gen3-hscif", 712 "renesas,hscif"; 713 reg = <0 0xe6550000 0 0x60>; 714 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 715 clocks = <&cpg CPG_MOD 519>, 716 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 717 <&scif_clk>; 718 clock-names = "fck", "brg_int", "scif_clk"; 719 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 720 <&dmac2 0x33>, <&dmac2 0x32>; 721 dma-names = "tx", "rx", "tx", "rx"; 722 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 723 resets = <&cpg 519>; 724 status = "disabled"; 725 }; 726 727 hscif2: serial@e6560000 { 728 compatible = "renesas,hscif-r8a7796", 729 "renesas,rcar-gen3-hscif", 730 "renesas,hscif"; 731 reg = <0 0xe6560000 0 0x60>; 732 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 733 clocks = <&cpg CPG_MOD 518>, 734 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 735 <&scif_clk>; 736 clock-names = "fck", "brg_int", "scif_clk"; 737 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 738 <&dmac2 0x35>, <&dmac2 0x34>; 739 dma-names = "tx", "rx", "tx", "rx"; 740 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 741 resets = <&cpg 518>; 742 status = "disabled"; 743 }; 744 745 hscif3: serial@e66a0000 { 746 compatible = "renesas,hscif-r8a7796", 747 "renesas,rcar-gen3-hscif", 748 "renesas,hscif"; 749 reg = <0 0xe66a0000 0 0x60>; 750 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 751 clocks = <&cpg CPG_MOD 517>, 752 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 753 <&scif_clk>; 754 clock-names = "fck", "brg_int", "scif_clk"; 755 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 756 dma-names = "tx", "rx"; 757 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 758 resets = <&cpg 517>; 759 status = "disabled"; 760 }; 761 762 hscif4: serial@e66b0000 { 763 compatible = "renesas,hscif-r8a7796", 764 "renesas,rcar-gen3-hscif", 765 "renesas,hscif"; 766 reg = <0 0xe66b0000 0 0x60>; 767 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 768 clocks = <&cpg CPG_MOD 516>, 769 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 770 <&scif_clk>; 771 clock-names = "fck", "brg_int", "scif_clk"; 772 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 773 dma-names = "tx", "rx"; 774 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 775 resets = <&cpg 516>; 776 status = "disabled"; 777 }; 778 779 hsusb: usb@e6590000 { 780 compatible = "renesas,usbhs-r8a7796", 781 "renesas,rcar-gen3-usbhs"; 782 reg = <0 0xe6590000 0 0x200>; 783 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 784 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 785 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 786 <&usb_dmac1 0>, <&usb_dmac1 1>; 787 dma-names = "ch0", "ch1", "ch2", "ch3"; 788 renesas,buswait = <11>; 789 phys = <&usb2_phy0 3>; 790 phy-names = "usb"; 791 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 792 resets = <&cpg 704>, <&cpg 703>; 793 status = "disabled"; 794 }; 795 796 usb_dmac0: dma-controller@e65a0000 { 797 compatible = "renesas,r8a7796-usb-dmac", 798 "renesas,usb-dmac"; 799 reg = <0 0xe65a0000 0 0x100>; 800 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 801 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 802 interrupt-names = "ch0", "ch1"; 803 clocks = <&cpg CPG_MOD 330>; 804 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 805 resets = <&cpg 330>; 806 #dma-cells = <1>; 807 dma-channels = <2>; 808 }; 809 810 usb_dmac1: dma-controller@e65b0000 { 811 compatible = "renesas,r8a7796-usb-dmac", 812 "renesas,usb-dmac"; 813 reg = <0 0xe65b0000 0 0x100>; 814 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 815 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 816 interrupt-names = "ch0", "ch1"; 817 clocks = <&cpg CPG_MOD 331>; 818 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 819 resets = <&cpg 331>; 820 #dma-cells = <1>; 821 dma-channels = <2>; 822 }; 823 824 usb3_phy0: usb-phy@e65ee000 { 825 compatible = "renesas,r8a7796-usb3-phy", 826 "renesas,rcar-gen3-usb3-phy"; 827 reg = <0 0xe65ee000 0 0x90>; 828 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 829 <&usb_extal_clk>; 830 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 831 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 832 resets = <&cpg 328>; 833 #phy-cells = <0>; 834 status = "disabled"; 835 }; 836 837 dmac0: dma-controller@e6700000 { 838 compatible = "renesas,dmac-r8a7796", 839 "renesas,rcar-dmac"; 840 reg = <0 0xe6700000 0 0x10000>; 841 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 842 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 843 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 844 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 845 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 846 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 847 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 848 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 849 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 850 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 851 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 852 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 853 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 854 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 855 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 856 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 857 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 858 interrupt-names = "error", 859 "ch0", "ch1", "ch2", "ch3", 860 "ch4", "ch5", "ch6", "ch7", 861 "ch8", "ch9", "ch10", "ch11", 862 "ch12", "ch13", "ch14", "ch15"; 863 clocks = <&cpg CPG_MOD 219>; 864 clock-names = "fck"; 865 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 866 resets = <&cpg 219>; 867 #dma-cells = <1>; 868 dma-channels = <16>; 869 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 870 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 871 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 872 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 873 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 874 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 875 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 876 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 877 }; 878 879 dmac1: dma-controller@e7300000 { 880 compatible = "renesas,dmac-r8a7796", 881 "renesas,rcar-dmac"; 882 reg = <0 0xe7300000 0 0x10000>; 883 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 884 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 885 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 886 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 887 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 888 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 889 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 890 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 891 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 892 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 893 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 894 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 895 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 896 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 897 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 898 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 899 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 900 interrupt-names = "error", 901 "ch0", "ch1", "ch2", "ch3", 902 "ch4", "ch5", "ch6", "ch7", 903 "ch8", "ch9", "ch10", "ch11", 904 "ch12", "ch13", "ch14", "ch15"; 905 clocks = <&cpg CPG_MOD 218>; 906 clock-names = "fck"; 907 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 908 resets = <&cpg 218>; 909 #dma-cells = <1>; 910 dma-channels = <16>; 911 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 912 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 913 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 914 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 915 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 916 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 917 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 918 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 919 }; 920 921 dmac2: dma-controller@e7310000 { 922 compatible = "renesas,dmac-r8a7796", 923 "renesas,rcar-dmac"; 924 reg = <0 0xe7310000 0 0x10000>; 925 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 926 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 927 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 928 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 929 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 930 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 931 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 932 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 933 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 934 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 935 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 936 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 937 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 938 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 939 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 940 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 941 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 942 interrupt-names = "error", 943 "ch0", "ch1", "ch2", "ch3", 944 "ch4", "ch5", "ch6", "ch7", 945 "ch8", "ch9", "ch10", "ch11", 946 "ch12", "ch13", "ch14", "ch15"; 947 clocks = <&cpg CPG_MOD 217>; 948 clock-names = "fck"; 949 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 950 resets = <&cpg 217>; 951 #dma-cells = <1>; 952 dma-channels = <16>; 953 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 954 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 955 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 956 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 957 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 958 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 959 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 960 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 961 }; 962 963 ipmmu_ds0: mmu@e6740000 { 964 compatible = "renesas,ipmmu-r8a7796"; 965 reg = <0 0xe6740000 0 0x1000>; 966 renesas,ipmmu-main = <&ipmmu_mm 0>; 967 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 968 #iommu-cells = <1>; 969 }; 970 971 ipmmu_ds1: mmu@e7740000 { 972 compatible = "renesas,ipmmu-r8a7796"; 973 reg = <0 0xe7740000 0 0x1000>; 974 renesas,ipmmu-main = <&ipmmu_mm 1>; 975 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 976 #iommu-cells = <1>; 977 }; 978 979 ipmmu_hc: mmu@e6570000 { 980 compatible = "renesas,ipmmu-r8a7796"; 981 reg = <0 0xe6570000 0 0x1000>; 982 renesas,ipmmu-main = <&ipmmu_mm 2>; 983 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 984 #iommu-cells = <1>; 985 }; 986 987 ipmmu_ir: mmu@ff8b0000 { 988 compatible = "renesas,ipmmu-r8a7796"; 989 reg = <0 0xff8b0000 0 0x1000>; 990 renesas,ipmmu-main = <&ipmmu_mm 3>; 991 power-domains = <&sysc R8A7796_PD_A3IR>; 992 #iommu-cells = <1>; 993 }; 994 995 ipmmu_mm: mmu@e67b0000 { 996 compatible = "renesas,ipmmu-r8a7796"; 997 reg = <0 0xe67b0000 0 0x1000>; 998 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1000 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1001 #iommu-cells = <1>; 1002 }; 1003 1004 ipmmu_mp: mmu@ec670000 { 1005 compatible = "renesas,ipmmu-r8a7796"; 1006 reg = <0 0xec670000 0 0x1000>; 1007 renesas,ipmmu-main = <&ipmmu_mm 4>; 1008 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1009 #iommu-cells = <1>; 1010 }; 1011 1012 ipmmu_pv0: mmu@fd800000 { 1013 compatible = "renesas,ipmmu-r8a7796"; 1014 reg = <0 0xfd800000 0 0x1000>; 1015 renesas,ipmmu-main = <&ipmmu_mm 5>; 1016 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1017 #iommu-cells = <1>; 1018 }; 1019 1020 ipmmu_pv1: mmu@fd950000 { 1021 compatible = "renesas,ipmmu-r8a7796"; 1022 reg = <0 0xfd950000 0 0x1000>; 1023 renesas,ipmmu-main = <&ipmmu_mm 6>; 1024 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1025 #iommu-cells = <1>; 1026 }; 1027 1028 ipmmu_rt: mmu@ffc80000 { 1029 compatible = "renesas,ipmmu-r8a7796"; 1030 reg = <0 0xffc80000 0 0x1000>; 1031 renesas,ipmmu-main = <&ipmmu_mm 7>; 1032 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1033 #iommu-cells = <1>; 1034 }; 1035 1036 ipmmu_vc0: mmu@fe6b0000 { 1037 compatible = "renesas,ipmmu-r8a7796"; 1038 reg = <0 0xfe6b0000 0 0x1000>; 1039 renesas,ipmmu-main = <&ipmmu_mm 8>; 1040 power-domains = <&sysc R8A7796_PD_A3VC>; 1041 #iommu-cells = <1>; 1042 }; 1043 1044 ipmmu_vi0: mmu@febd0000 { 1045 compatible = "renesas,ipmmu-r8a7796"; 1046 reg = <0 0xfebd0000 0 0x1000>; 1047 renesas,ipmmu-main = <&ipmmu_mm 9>; 1048 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1049 #iommu-cells = <1>; 1050 }; 1051 1052 avb: ethernet@e6800000 { 1053 compatible = "renesas,etheravb-r8a7796", 1054 "renesas,etheravb-rcar-gen3"; 1055 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1056 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1057 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1058 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1059 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1060 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1061 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1062 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1063 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1064 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1065 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1066 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1067 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1068 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1069 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1070 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1071 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1072 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1073 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1074 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1075 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1076 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1077 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1078 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1079 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1080 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1081 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1082 "ch4", "ch5", "ch6", "ch7", 1083 "ch8", "ch9", "ch10", "ch11", 1084 "ch12", "ch13", "ch14", "ch15", 1085 "ch16", "ch17", "ch18", "ch19", 1086 "ch20", "ch21", "ch22", "ch23", 1087 "ch24"; 1088 clocks = <&cpg CPG_MOD 812>; 1089 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1090 resets = <&cpg 812>; 1091 phy-mode = "rgmii"; 1092 iommus = <&ipmmu_ds0 16>; 1093 #address-cells = <1>; 1094 #size-cells = <0>; 1095 status = "disabled"; 1096 }; 1097 1098 can0: can@e6c30000 { 1099 compatible = "renesas,can-r8a7796", 1100 "renesas,rcar-gen3-can"; 1101 reg = <0 0xe6c30000 0 0x1000>; 1102 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1103 clocks = <&cpg CPG_MOD 916>, 1104 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1105 <&can_clk>; 1106 clock-names = "clkp1", "clkp2", "can_clk"; 1107 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1108 assigned-clock-rates = <40000000>; 1109 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1110 resets = <&cpg 916>; 1111 status = "disabled"; 1112 }; 1113 1114 can1: can@e6c38000 { 1115 compatible = "renesas,can-r8a7796", 1116 "renesas,rcar-gen3-can"; 1117 reg = <0 0xe6c38000 0 0x1000>; 1118 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1119 clocks = <&cpg CPG_MOD 915>, 1120 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1121 <&can_clk>; 1122 clock-names = "clkp1", "clkp2", "can_clk"; 1123 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1124 assigned-clock-rates = <40000000>; 1125 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1126 resets = <&cpg 915>; 1127 status = "disabled"; 1128 }; 1129 1130 canfd: can@e66c0000 { 1131 compatible = "renesas,r8a7796-canfd", 1132 "renesas,rcar-gen3-canfd"; 1133 reg = <0 0xe66c0000 0 0x8000>; 1134 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1135 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1136 clocks = <&cpg CPG_MOD 914>, 1137 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1138 <&can_clk>; 1139 clock-names = "fck", "canfd", "can_clk"; 1140 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1141 assigned-clock-rates = <40000000>; 1142 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1143 resets = <&cpg 914>; 1144 status = "disabled"; 1145 1146 channel0 { 1147 status = "disabled"; 1148 }; 1149 1150 channel1 { 1151 status = "disabled"; 1152 }; 1153 }; 1154 1155 pwm0: pwm@e6e30000 { 1156 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1157 reg = <0 0xe6e30000 0 8>; 1158 #pwm-cells = <2>; 1159 clocks = <&cpg CPG_MOD 523>; 1160 resets = <&cpg 523>; 1161 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1162 status = "disabled"; 1163 }; 1164 1165 pwm1: pwm@e6e31000 { 1166 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1167 reg = <0 0xe6e31000 0 8>; 1168 #pwm-cells = <2>; 1169 clocks = <&cpg CPG_MOD 523>; 1170 resets = <&cpg 523>; 1171 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1172 status = "disabled"; 1173 }; 1174 1175 pwm2: pwm@e6e32000 { 1176 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1177 reg = <0 0xe6e32000 0 8>; 1178 #pwm-cells = <2>; 1179 clocks = <&cpg CPG_MOD 523>; 1180 resets = <&cpg 523>; 1181 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1182 status = "disabled"; 1183 }; 1184 1185 pwm3: pwm@e6e33000 { 1186 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1187 reg = <0 0xe6e33000 0 8>; 1188 #pwm-cells = <2>; 1189 clocks = <&cpg CPG_MOD 523>; 1190 resets = <&cpg 523>; 1191 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1192 status = "disabled"; 1193 }; 1194 1195 pwm4: pwm@e6e34000 { 1196 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1197 reg = <0 0xe6e34000 0 8>; 1198 #pwm-cells = <2>; 1199 clocks = <&cpg CPG_MOD 523>; 1200 resets = <&cpg 523>; 1201 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1202 status = "disabled"; 1203 }; 1204 1205 pwm5: pwm@e6e35000 { 1206 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1207 reg = <0 0xe6e35000 0 8>; 1208 #pwm-cells = <2>; 1209 clocks = <&cpg CPG_MOD 523>; 1210 resets = <&cpg 523>; 1211 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1212 status = "disabled"; 1213 }; 1214 1215 pwm6: pwm@e6e36000 { 1216 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1217 reg = <0 0xe6e36000 0 8>; 1218 #pwm-cells = <2>; 1219 clocks = <&cpg CPG_MOD 523>; 1220 resets = <&cpg 523>; 1221 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1222 status = "disabled"; 1223 }; 1224 1225 scif0: serial@e6e60000 { 1226 compatible = "renesas,scif-r8a7796", 1227 "renesas,rcar-gen3-scif", "renesas,scif"; 1228 reg = <0 0xe6e60000 0 64>; 1229 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1230 clocks = <&cpg CPG_MOD 207>, 1231 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1232 <&scif_clk>; 1233 clock-names = "fck", "brg_int", "scif_clk"; 1234 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1235 <&dmac2 0x51>, <&dmac2 0x50>; 1236 dma-names = "tx", "rx", "tx", "rx"; 1237 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1238 resets = <&cpg 207>; 1239 status = "disabled"; 1240 }; 1241 1242 scif1: serial@e6e68000 { 1243 compatible = "renesas,scif-r8a7796", 1244 "renesas,rcar-gen3-scif", "renesas,scif"; 1245 reg = <0 0xe6e68000 0 64>; 1246 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1247 clocks = <&cpg CPG_MOD 206>, 1248 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1249 <&scif_clk>; 1250 clock-names = "fck", "brg_int", "scif_clk"; 1251 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1252 <&dmac2 0x53>, <&dmac2 0x52>; 1253 dma-names = "tx", "rx", "tx", "rx"; 1254 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1255 resets = <&cpg 206>; 1256 status = "disabled"; 1257 }; 1258 1259 scif2: serial@e6e88000 { 1260 compatible = "renesas,scif-r8a7796", 1261 "renesas,rcar-gen3-scif", "renesas,scif"; 1262 reg = <0 0xe6e88000 0 64>; 1263 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1264 clocks = <&cpg CPG_MOD 310>, 1265 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1266 <&scif_clk>; 1267 clock-names = "fck", "brg_int", "scif_clk"; 1268 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1269 <&dmac2 0x13>, <&dmac2 0x12>; 1270 dma-names = "tx", "rx", "tx", "rx"; 1271 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1272 resets = <&cpg 310>; 1273 status = "disabled"; 1274 }; 1275 1276 scif3: serial@e6c50000 { 1277 compatible = "renesas,scif-r8a7796", 1278 "renesas,rcar-gen3-scif", "renesas,scif"; 1279 reg = <0 0xe6c50000 0 64>; 1280 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1281 clocks = <&cpg CPG_MOD 204>, 1282 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1283 <&scif_clk>; 1284 clock-names = "fck", "brg_int", "scif_clk"; 1285 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1286 dma-names = "tx", "rx"; 1287 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1288 resets = <&cpg 204>; 1289 status = "disabled"; 1290 }; 1291 1292 scif4: serial@e6c40000 { 1293 compatible = "renesas,scif-r8a7796", 1294 "renesas,rcar-gen3-scif", "renesas,scif"; 1295 reg = <0 0xe6c40000 0 64>; 1296 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1297 clocks = <&cpg CPG_MOD 203>, 1298 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1299 <&scif_clk>; 1300 clock-names = "fck", "brg_int", "scif_clk"; 1301 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1302 dma-names = "tx", "rx"; 1303 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1304 resets = <&cpg 203>; 1305 status = "disabled"; 1306 }; 1307 1308 scif5: serial@e6f30000 { 1309 compatible = "renesas,scif-r8a7796", 1310 "renesas,rcar-gen3-scif", "renesas,scif"; 1311 reg = <0 0xe6f30000 0 64>; 1312 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1313 clocks = <&cpg CPG_MOD 202>, 1314 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1315 <&scif_clk>; 1316 clock-names = "fck", "brg_int", "scif_clk"; 1317 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1318 <&dmac2 0x5b>, <&dmac2 0x5a>; 1319 dma-names = "tx", "rx", "tx", "rx"; 1320 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1321 resets = <&cpg 202>; 1322 status = "disabled"; 1323 }; 1324 1325 tpu: pwm@e6e80000 { 1326 compatible = "renesas,tpu-r8a7796", "renesas,tpu"; 1327 reg = <0 0xe6e80000 0 0x148>; 1328 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1329 clocks = <&cpg CPG_MOD 304>; 1330 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1331 resets = <&cpg 304>; 1332 #pwm-cells = <3>; 1333 status = "disabled"; 1334 }; 1335 1336 msiof0: spi@e6e90000 { 1337 compatible = "renesas,msiof-r8a7796", 1338 "renesas,rcar-gen3-msiof"; 1339 reg = <0 0xe6e90000 0 0x0064>; 1340 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1341 clocks = <&cpg CPG_MOD 211>; 1342 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1343 <&dmac2 0x41>, <&dmac2 0x40>; 1344 dma-names = "tx", "rx", "tx", "rx"; 1345 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1346 resets = <&cpg 211>; 1347 #address-cells = <1>; 1348 #size-cells = <0>; 1349 status = "disabled"; 1350 }; 1351 1352 msiof1: spi@e6ea0000 { 1353 compatible = "renesas,msiof-r8a7796", 1354 "renesas,rcar-gen3-msiof"; 1355 reg = <0 0xe6ea0000 0 0x0064>; 1356 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1357 clocks = <&cpg CPG_MOD 210>; 1358 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1359 <&dmac2 0x43>, <&dmac2 0x42>; 1360 dma-names = "tx", "rx", "tx", "rx"; 1361 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1362 resets = <&cpg 210>; 1363 #address-cells = <1>; 1364 #size-cells = <0>; 1365 status = "disabled"; 1366 }; 1367 1368 msiof2: spi@e6c00000 { 1369 compatible = "renesas,msiof-r8a7796", 1370 "renesas,rcar-gen3-msiof"; 1371 reg = <0 0xe6c00000 0 0x0064>; 1372 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1373 clocks = <&cpg CPG_MOD 209>; 1374 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1375 dma-names = "tx", "rx"; 1376 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1377 resets = <&cpg 209>; 1378 #address-cells = <1>; 1379 #size-cells = <0>; 1380 status = "disabled"; 1381 }; 1382 1383 msiof3: spi@e6c10000 { 1384 compatible = "renesas,msiof-r8a7796", 1385 "renesas,rcar-gen3-msiof"; 1386 reg = <0 0xe6c10000 0 0x0064>; 1387 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1388 clocks = <&cpg CPG_MOD 208>; 1389 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1390 dma-names = "tx", "rx"; 1391 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1392 resets = <&cpg 208>; 1393 #address-cells = <1>; 1394 #size-cells = <0>; 1395 status = "disabled"; 1396 }; 1397 1398 vin0: video@e6ef0000 { 1399 compatible = "renesas,vin-r8a7796"; 1400 reg = <0 0xe6ef0000 0 0x1000>; 1401 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1402 clocks = <&cpg CPG_MOD 811>; 1403 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1404 resets = <&cpg 811>; 1405 renesas,id = <0>; 1406 status = "disabled"; 1407 1408 ports { 1409 #address-cells = <1>; 1410 #size-cells = <0>; 1411 1412 port@1 { 1413 #address-cells = <1>; 1414 #size-cells = <0>; 1415 1416 reg = <1>; 1417 1418 vin0csi20: endpoint@0 { 1419 reg = <0>; 1420 remote-endpoint = <&csi20vin0>; 1421 }; 1422 vin0csi40: endpoint@2 { 1423 reg = <2>; 1424 remote-endpoint = <&csi40vin0>; 1425 }; 1426 }; 1427 }; 1428 }; 1429 1430 vin1: video@e6ef1000 { 1431 compatible = "renesas,vin-r8a7796"; 1432 reg = <0 0xe6ef1000 0 0x1000>; 1433 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1434 clocks = <&cpg CPG_MOD 810>; 1435 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1436 resets = <&cpg 810>; 1437 renesas,id = <1>; 1438 status = "disabled"; 1439 1440 ports { 1441 #address-cells = <1>; 1442 #size-cells = <0>; 1443 1444 port@1 { 1445 #address-cells = <1>; 1446 #size-cells = <0>; 1447 1448 reg = <1>; 1449 1450 vin1csi20: endpoint@0 { 1451 reg = <0>; 1452 remote-endpoint = <&csi20vin1>; 1453 }; 1454 vin1csi40: endpoint@2 { 1455 reg = <2>; 1456 remote-endpoint = <&csi40vin1>; 1457 }; 1458 }; 1459 }; 1460 }; 1461 1462 vin2: video@e6ef2000 { 1463 compatible = "renesas,vin-r8a7796"; 1464 reg = <0 0xe6ef2000 0 0x1000>; 1465 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1466 clocks = <&cpg CPG_MOD 809>; 1467 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1468 resets = <&cpg 809>; 1469 renesas,id = <2>; 1470 status = "disabled"; 1471 1472 ports { 1473 #address-cells = <1>; 1474 #size-cells = <0>; 1475 1476 port@1 { 1477 #address-cells = <1>; 1478 #size-cells = <0>; 1479 1480 reg = <1>; 1481 1482 vin2csi20: endpoint@0 { 1483 reg = <0>; 1484 remote-endpoint = <&csi20vin2>; 1485 }; 1486 vin2csi40: endpoint@2 { 1487 reg = <2>; 1488 remote-endpoint = <&csi40vin2>; 1489 }; 1490 }; 1491 }; 1492 }; 1493 1494 vin3: video@e6ef3000 { 1495 compatible = "renesas,vin-r8a7796"; 1496 reg = <0 0xe6ef3000 0 0x1000>; 1497 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1498 clocks = <&cpg CPG_MOD 808>; 1499 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1500 resets = <&cpg 808>; 1501 renesas,id = <3>; 1502 status = "disabled"; 1503 1504 ports { 1505 #address-cells = <1>; 1506 #size-cells = <0>; 1507 1508 port@1 { 1509 #address-cells = <1>; 1510 #size-cells = <0>; 1511 1512 reg = <1>; 1513 1514 vin3csi20: endpoint@0 { 1515 reg = <0>; 1516 remote-endpoint = <&csi20vin3>; 1517 }; 1518 vin3csi40: endpoint@2 { 1519 reg = <2>; 1520 remote-endpoint = <&csi40vin3>; 1521 }; 1522 }; 1523 }; 1524 }; 1525 1526 vin4: video@e6ef4000 { 1527 compatible = "renesas,vin-r8a7796"; 1528 reg = <0 0xe6ef4000 0 0x1000>; 1529 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1530 clocks = <&cpg CPG_MOD 807>; 1531 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1532 resets = <&cpg 807>; 1533 renesas,id = <4>; 1534 status = "disabled"; 1535 1536 ports { 1537 #address-cells = <1>; 1538 #size-cells = <0>; 1539 1540 port@1 { 1541 #address-cells = <1>; 1542 #size-cells = <0>; 1543 1544 reg = <1>; 1545 1546 vin4csi20: endpoint@0 { 1547 reg = <0>; 1548 remote-endpoint = <&csi20vin4>; 1549 }; 1550 vin4csi40: endpoint@2 { 1551 reg = <2>; 1552 remote-endpoint = <&csi40vin4>; 1553 }; 1554 }; 1555 }; 1556 }; 1557 1558 vin5: video@e6ef5000 { 1559 compatible = "renesas,vin-r8a7796"; 1560 reg = <0 0xe6ef5000 0 0x1000>; 1561 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1562 clocks = <&cpg CPG_MOD 806>; 1563 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1564 resets = <&cpg 806>; 1565 renesas,id = <5>; 1566 status = "disabled"; 1567 1568 ports { 1569 #address-cells = <1>; 1570 #size-cells = <0>; 1571 1572 port@1 { 1573 #address-cells = <1>; 1574 #size-cells = <0>; 1575 1576 reg = <1>; 1577 1578 vin5csi20: endpoint@0 { 1579 reg = <0>; 1580 remote-endpoint = <&csi20vin5>; 1581 }; 1582 vin5csi40: endpoint@2 { 1583 reg = <2>; 1584 remote-endpoint = <&csi40vin5>; 1585 }; 1586 }; 1587 }; 1588 }; 1589 1590 vin6: video@e6ef6000 { 1591 compatible = "renesas,vin-r8a7796"; 1592 reg = <0 0xe6ef6000 0 0x1000>; 1593 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1594 clocks = <&cpg CPG_MOD 805>; 1595 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1596 resets = <&cpg 805>; 1597 renesas,id = <6>; 1598 status = "disabled"; 1599 1600 ports { 1601 #address-cells = <1>; 1602 #size-cells = <0>; 1603 1604 port@1 { 1605 #address-cells = <1>; 1606 #size-cells = <0>; 1607 1608 reg = <1>; 1609 1610 vin6csi20: endpoint@0 { 1611 reg = <0>; 1612 remote-endpoint = <&csi20vin6>; 1613 }; 1614 vin6csi40: endpoint@2 { 1615 reg = <2>; 1616 remote-endpoint = <&csi40vin6>; 1617 }; 1618 }; 1619 }; 1620 }; 1621 1622 vin7: video@e6ef7000 { 1623 compatible = "renesas,vin-r8a7796"; 1624 reg = <0 0xe6ef7000 0 0x1000>; 1625 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1626 clocks = <&cpg CPG_MOD 804>; 1627 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1628 resets = <&cpg 804>; 1629 renesas,id = <7>; 1630 status = "disabled"; 1631 1632 ports { 1633 #address-cells = <1>; 1634 #size-cells = <0>; 1635 1636 port@1 { 1637 #address-cells = <1>; 1638 #size-cells = <0>; 1639 1640 reg = <1>; 1641 1642 vin7csi20: endpoint@0 { 1643 reg = <0>; 1644 remote-endpoint = <&csi20vin7>; 1645 }; 1646 vin7csi40: endpoint@2 { 1647 reg = <2>; 1648 remote-endpoint = <&csi40vin7>; 1649 }; 1650 }; 1651 }; 1652 }; 1653 1654 drif00: rif@e6f40000 { 1655 compatible = "renesas,r8a7796-drif", 1656 "renesas,rcar-gen3-drif"; 1657 reg = <0 0xe6f40000 0 0x64>; 1658 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1659 clocks = <&cpg CPG_MOD 515>; 1660 clock-names = "fck"; 1661 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1662 dma-names = "rx", "rx"; 1663 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1664 resets = <&cpg 515>; 1665 renesas,bonding = <&drif01>; 1666 status = "disabled"; 1667 }; 1668 1669 drif01: rif@e6f50000 { 1670 compatible = "renesas,r8a7796-drif", 1671 "renesas,rcar-gen3-drif"; 1672 reg = <0 0xe6f50000 0 0x64>; 1673 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1674 clocks = <&cpg CPG_MOD 514>; 1675 clock-names = "fck"; 1676 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1677 dma-names = "rx", "rx"; 1678 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1679 resets = <&cpg 514>; 1680 renesas,bonding = <&drif00>; 1681 status = "disabled"; 1682 }; 1683 1684 drif10: rif@e6f60000 { 1685 compatible = "renesas,r8a7796-drif", 1686 "renesas,rcar-gen3-drif"; 1687 reg = <0 0xe6f60000 0 0x64>; 1688 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1689 clocks = <&cpg CPG_MOD 513>; 1690 clock-names = "fck"; 1691 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1692 dma-names = "rx", "rx"; 1693 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1694 resets = <&cpg 513>; 1695 renesas,bonding = <&drif11>; 1696 status = "disabled"; 1697 }; 1698 1699 drif11: rif@e6f70000 { 1700 compatible = "renesas,r8a7796-drif", 1701 "renesas,rcar-gen3-drif"; 1702 reg = <0 0xe6f70000 0 0x64>; 1703 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1704 clocks = <&cpg CPG_MOD 512>; 1705 clock-names = "fck"; 1706 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1707 dma-names = "rx", "rx"; 1708 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1709 resets = <&cpg 512>; 1710 renesas,bonding = <&drif10>; 1711 status = "disabled"; 1712 }; 1713 1714 drif20: rif@e6f80000 { 1715 compatible = "renesas,r8a7796-drif", 1716 "renesas,rcar-gen3-drif"; 1717 reg = <0 0xe6f80000 0 0x64>; 1718 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1719 clocks = <&cpg CPG_MOD 511>; 1720 clock-names = "fck"; 1721 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1722 dma-names = "rx", "rx"; 1723 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1724 resets = <&cpg 511>; 1725 renesas,bonding = <&drif21>; 1726 status = "disabled"; 1727 }; 1728 1729 drif21: rif@e6f90000 { 1730 compatible = "renesas,r8a7796-drif", 1731 "renesas,rcar-gen3-drif"; 1732 reg = <0 0xe6f90000 0 0x64>; 1733 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1734 clocks = <&cpg CPG_MOD 510>; 1735 clock-names = "fck"; 1736 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1737 dma-names = "rx", "rx"; 1738 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1739 resets = <&cpg 510>; 1740 renesas,bonding = <&drif20>; 1741 status = "disabled"; 1742 }; 1743 1744 drif30: rif@e6fa0000 { 1745 compatible = "renesas,r8a7796-drif", 1746 "renesas,rcar-gen3-drif"; 1747 reg = <0 0xe6fa0000 0 0x64>; 1748 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1749 clocks = <&cpg CPG_MOD 509>; 1750 clock-names = "fck"; 1751 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1752 dma-names = "rx", "rx"; 1753 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1754 resets = <&cpg 509>; 1755 renesas,bonding = <&drif31>; 1756 status = "disabled"; 1757 }; 1758 1759 drif31: rif@e6fb0000 { 1760 compatible = "renesas,r8a7796-drif", 1761 "renesas,rcar-gen3-drif"; 1762 reg = <0 0xe6fb0000 0 0x64>; 1763 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1764 clocks = <&cpg CPG_MOD 508>; 1765 clock-names = "fck"; 1766 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1767 dma-names = "rx", "rx"; 1768 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1769 resets = <&cpg 508>; 1770 renesas,bonding = <&drif30>; 1771 status = "disabled"; 1772 }; 1773 1774 rcar_sound: sound@ec500000 { 1775 /* 1776 * #sound-dai-cells is required 1777 * 1778 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1779 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1780 */ 1781 /* 1782 * #clock-cells is required for audio_clkout0/1/2/3 1783 * 1784 * clkout : #clock-cells = <0>; <&rcar_sound>; 1785 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1786 */ 1787 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; 1788 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1789 <0 0xec5a0000 0 0x100>, /* ADG */ 1790 <0 0xec540000 0 0x1000>, /* SSIU */ 1791 <0 0xec541000 0 0x280>, /* SSI */ 1792 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1793 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1794 1795 clocks = <&cpg CPG_MOD 1005>, 1796 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1797 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1798 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1799 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1800 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1801 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1802 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1803 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1804 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1805 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1806 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1807 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1808 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1809 <&audio_clk_a>, <&audio_clk_b>, 1810 <&audio_clk_c>, 1811 <&cpg CPG_CORE R8A7796_CLK_S0D4>; 1812 clock-names = "ssi-all", 1813 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1814 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1815 "ssi.1", "ssi.0", 1816 "src.9", "src.8", "src.7", "src.6", 1817 "src.5", "src.4", "src.3", "src.2", 1818 "src.1", "src.0", 1819 "mix.1", "mix.0", 1820 "ctu.1", "ctu.0", 1821 "dvc.0", "dvc.1", 1822 "clk_a", "clk_b", "clk_c", "clk_i"; 1823 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1824 resets = <&cpg 1005>, 1825 <&cpg 1006>, <&cpg 1007>, 1826 <&cpg 1008>, <&cpg 1009>, 1827 <&cpg 1010>, <&cpg 1011>, 1828 <&cpg 1012>, <&cpg 1013>, 1829 <&cpg 1014>, <&cpg 1015>; 1830 reset-names = "ssi-all", 1831 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1832 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1833 "ssi.1", "ssi.0"; 1834 status = "disabled"; 1835 1836 rcar_sound,ctu { 1837 ctu00: ctu-0 { }; 1838 ctu01: ctu-1 { }; 1839 ctu02: ctu-2 { }; 1840 ctu03: ctu-3 { }; 1841 ctu10: ctu-4 { }; 1842 ctu11: ctu-5 { }; 1843 ctu12: ctu-6 { }; 1844 ctu13: ctu-7 { }; 1845 }; 1846 1847 rcar_sound,dvc { 1848 dvc0: dvc-0 { 1849 dmas = <&audma1 0xbc>; 1850 dma-names = "tx"; 1851 }; 1852 dvc1: dvc-1 { 1853 dmas = <&audma1 0xbe>; 1854 dma-names = "tx"; 1855 }; 1856 }; 1857 1858 rcar_sound,mix { 1859 mix0: mix-0 { }; 1860 mix1: mix-1 { }; 1861 }; 1862 1863 rcar_sound,src { 1864 src0: src-0 { 1865 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1866 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1867 dma-names = "rx", "tx"; 1868 }; 1869 src1: src-1 { 1870 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1871 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1872 dma-names = "rx", "tx"; 1873 }; 1874 src2: src-2 { 1875 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1876 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1877 dma-names = "rx", "tx"; 1878 }; 1879 src3: src-3 { 1880 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1881 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1882 dma-names = "rx", "tx"; 1883 }; 1884 src4: src-4 { 1885 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1886 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1887 dma-names = "rx", "tx"; 1888 }; 1889 src5: src-5 { 1890 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1891 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1892 dma-names = "rx", "tx"; 1893 }; 1894 src6: src-6 { 1895 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1896 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1897 dma-names = "rx", "tx"; 1898 }; 1899 src7: src-7 { 1900 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1901 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1902 dma-names = "rx", "tx"; 1903 }; 1904 src8: src-8 { 1905 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1906 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1907 dma-names = "rx", "tx"; 1908 }; 1909 src9: src-9 { 1910 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1911 dmas = <&audma0 0x97>, <&audma1 0xba>; 1912 dma-names = "rx", "tx"; 1913 }; 1914 }; 1915 1916 rcar_sound,ssi { 1917 ssi0: ssi-0 { 1918 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1919 dmas = <&audma0 0x01>, <&audma1 0x02>; 1920 dma-names = "rx", "tx"; 1921 }; 1922 ssi1: ssi-1 { 1923 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1924 dmas = <&audma0 0x03>, <&audma1 0x04>; 1925 dma-names = "rx", "tx"; 1926 }; 1927 ssi2: ssi-2 { 1928 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1929 dmas = <&audma0 0x05>, <&audma1 0x06>; 1930 dma-names = "rx", "tx"; 1931 }; 1932 ssi3: ssi-3 { 1933 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1934 dmas = <&audma0 0x07>, <&audma1 0x08>; 1935 dma-names = "rx", "tx"; 1936 }; 1937 ssi4: ssi-4 { 1938 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1939 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1940 dma-names = "rx", "tx"; 1941 }; 1942 ssi5: ssi-5 { 1943 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1944 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1945 dma-names = "rx", "tx"; 1946 }; 1947 ssi6: ssi-6 { 1948 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1949 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1950 dma-names = "rx", "tx"; 1951 }; 1952 ssi7: ssi-7 { 1953 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1954 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1955 dma-names = "rx", "tx"; 1956 }; 1957 ssi8: ssi-8 { 1958 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1959 dmas = <&audma0 0x11>, <&audma1 0x12>; 1960 dma-names = "rx", "tx"; 1961 }; 1962 ssi9: ssi-9 { 1963 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1964 dmas = <&audma0 0x13>, <&audma1 0x14>; 1965 dma-names = "rx", "tx"; 1966 }; 1967 }; 1968 1969 rcar_sound,ssiu { 1970 ssiu00: ssiu-0 { 1971 dmas = <&audma0 0x15>, <&audma1 0x16>; 1972 dma-names = "rx", "tx"; 1973 }; 1974 ssiu01: ssiu-1 { 1975 dmas = <&audma0 0x35>, <&audma1 0x36>; 1976 dma-names = "rx", "tx"; 1977 }; 1978 ssiu02: ssiu-2 { 1979 dmas = <&audma0 0x37>, <&audma1 0x38>; 1980 dma-names = "rx", "tx"; 1981 }; 1982 ssiu03: ssiu-3 { 1983 dmas = <&audma0 0x47>, <&audma1 0x48>; 1984 dma-names = "rx", "tx"; 1985 }; 1986 ssiu04: ssiu-4 { 1987 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1988 dma-names = "rx", "tx"; 1989 }; 1990 ssiu05: ssiu-5 { 1991 dmas = <&audma0 0x43>, <&audma1 0x44>; 1992 dma-names = "rx", "tx"; 1993 }; 1994 ssiu06: ssiu-6 { 1995 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1996 dma-names = "rx", "tx"; 1997 }; 1998 ssiu07: ssiu-7 { 1999 dmas = <&audma0 0x53>, <&audma1 0x54>; 2000 dma-names = "rx", "tx"; 2001 }; 2002 ssiu10: ssiu-8 { 2003 dmas = <&audma0 0x49>, <&audma1 0x4a>; 2004 dma-names = "rx", "tx"; 2005 }; 2006 ssiu11: ssiu-9 { 2007 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 2008 dma-names = "rx", "tx"; 2009 }; 2010 ssiu12: ssiu-10 { 2011 dmas = <&audma0 0x57>, <&audma1 0x58>; 2012 dma-names = "rx", "tx"; 2013 }; 2014 ssiu13: ssiu-11 { 2015 dmas = <&audma0 0x59>, <&audma1 0x5A>; 2016 dma-names = "rx", "tx"; 2017 }; 2018 ssiu14: ssiu-12 { 2019 dmas = <&audma0 0x5F>, <&audma1 0x60>; 2020 dma-names = "rx", "tx"; 2021 }; 2022 ssiu15: ssiu-13 { 2023 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 2024 dma-names = "rx", "tx"; 2025 }; 2026 ssiu16: ssiu-14 { 2027 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 2028 dma-names = "rx", "tx"; 2029 }; 2030 ssiu17: ssiu-15 { 2031 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 2032 dma-names = "rx", "tx"; 2033 }; 2034 ssiu20: ssiu-16 { 2035 dmas = <&audma0 0x63>, <&audma1 0x64>; 2036 dma-names = "rx", "tx"; 2037 }; 2038 ssiu21: ssiu-17 { 2039 dmas = <&audma0 0x67>, <&audma1 0x68>; 2040 dma-names = "rx", "tx"; 2041 }; 2042 ssiu22: ssiu-18 { 2043 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2044 dma-names = "rx", "tx"; 2045 }; 2046 ssiu23: ssiu-19 { 2047 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2048 dma-names = "rx", "tx"; 2049 }; 2050 ssiu24: ssiu-20 { 2051 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2052 dma-names = "rx", "tx"; 2053 }; 2054 ssiu25: ssiu-21 { 2055 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2056 dma-names = "rx", "tx"; 2057 }; 2058 ssiu26: ssiu-22 { 2059 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2060 dma-names = "rx", "tx"; 2061 }; 2062 ssiu27: ssiu-23 { 2063 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2064 dma-names = "rx", "tx"; 2065 }; 2066 ssiu30: ssiu-24 { 2067 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2068 dma-names = "rx", "tx"; 2069 }; 2070 ssiu31: ssiu-25 { 2071 dmas = <&audma0 0x21>, <&audma1 0x22>; 2072 dma-names = "rx", "tx"; 2073 }; 2074 ssiu32: ssiu-26 { 2075 dmas = <&audma0 0x23>, <&audma1 0x24>; 2076 dma-names = "rx", "tx"; 2077 }; 2078 ssiu33: ssiu-27 { 2079 dmas = <&audma0 0x25>, <&audma1 0x26>; 2080 dma-names = "rx", "tx"; 2081 }; 2082 ssiu34: ssiu-28 { 2083 dmas = <&audma0 0x27>, <&audma1 0x28>; 2084 dma-names = "rx", "tx"; 2085 }; 2086 ssiu35: ssiu-29 { 2087 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2088 dma-names = "rx", "tx"; 2089 }; 2090 ssiu36: ssiu-30 { 2091 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2092 dma-names = "rx", "tx"; 2093 }; 2094 ssiu37: ssiu-31 { 2095 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2096 dma-names = "rx", "tx"; 2097 }; 2098 ssiu40: ssiu-32 { 2099 dmas = <&audma0 0x71>, <&audma1 0x72>; 2100 dma-names = "rx", "tx"; 2101 }; 2102 ssiu41: ssiu-33 { 2103 dmas = <&audma0 0x17>, <&audma1 0x18>; 2104 dma-names = "rx", "tx"; 2105 }; 2106 ssiu42: ssiu-34 { 2107 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2108 dma-names = "rx", "tx"; 2109 }; 2110 ssiu43: ssiu-35 { 2111 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2112 dma-names = "rx", "tx"; 2113 }; 2114 ssiu44: ssiu-36 { 2115 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2116 dma-names = "rx", "tx"; 2117 }; 2118 ssiu45: ssiu-37 { 2119 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2120 dma-names = "rx", "tx"; 2121 }; 2122 ssiu46: ssiu-38 { 2123 dmas = <&audma0 0x31>, <&audma1 0x32>; 2124 dma-names = "rx", "tx"; 2125 }; 2126 ssiu47: ssiu-39 { 2127 dmas = <&audma0 0x33>, <&audma1 0x34>; 2128 dma-names = "rx", "tx"; 2129 }; 2130 ssiu50: ssiu-40 { 2131 dmas = <&audma0 0x73>, <&audma1 0x74>; 2132 dma-names = "rx", "tx"; 2133 }; 2134 ssiu60: ssiu-41 { 2135 dmas = <&audma0 0x75>, <&audma1 0x76>; 2136 dma-names = "rx", "tx"; 2137 }; 2138 ssiu70: ssiu-42 { 2139 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2140 dma-names = "rx", "tx"; 2141 }; 2142 ssiu80: ssiu-43 { 2143 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2144 dma-names = "rx", "tx"; 2145 }; 2146 ssiu90: ssiu-44 { 2147 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2148 dma-names = "rx", "tx"; 2149 }; 2150 ssiu91: ssiu-45 { 2151 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2152 dma-names = "rx", "tx"; 2153 }; 2154 ssiu92: ssiu-46 { 2155 dmas = <&audma0 0x81>, <&audma1 0x82>; 2156 dma-names = "rx", "tx"; 2157 }; 2158 ssiu93: ssiu-47 { 2159 dmas = <&audma0 0x83>, <&audma1 0x84>; 2160 dma-names = "rx", "tx"; 2161 }; 2162 ssiu94: ssiu-48 { 2163 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2164 dma-names = "rx", "tx"; 2165 }; 2166 ssiu95: ssiu-49 { 2167 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2168 dma-names = "rx", "tx"; 2169 }; 2170 ssiu96: ssiu-50 { 2171 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2172 dma-names = "rx", "tx"; 2173 }; 2174 ssiu97: ssiu-51 { 2175 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2176 dma-names = "rx", "tx"; 2177 }; 2178 }; 2179 }; 2180 2181 audma0: dma-controller@ec700000 { 2182 compatible = "renesas,dmac-r8a7796", 2183 "renesas,rcar-dmac"; 2184 reg = <0 0xec700000 0 0x10000>; 2185 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 2186 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 2187 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 2188 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 2189 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 2190 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 2191 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 2192 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 2193 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 2194 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 2195 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 2196 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 2197 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 2198 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 2199 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 2200 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 2201 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2202 interrupt-names = "error", 2203 "ch0", "ch1", "ch2", "ch3", 2204 "ch4", "ch5", "ch6", "ch7", 2205 "ch8", "ch9", "ch10", "ch11", 2206 "ch12", "ch13", "ch14", "ch15"; 2207 clocks = <&cpg CPG_MOD 502>; 2208 clock-names = "fck"; 2209 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2210 resets = <&cpg 502>; 2211 #dma-cells = <1>; 2212 dma-channels = <16>; 2213 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2214 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2215 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2216 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2217 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2218 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2219 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2220 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2221 }; 2222 2223 audma1: dma-controller@ec720000 { 2224 compatible = "renesas,dmac-r8a7796", 2225 "renesas,rcar-dmac"; 2226 reg = <0 0xec720000 0 0x10000>; 2227 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH 2228 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 2229 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 2230 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 2231 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 2232 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 2233 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 2234 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 2235 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 2236 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 2237 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH 2238 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH 2239 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 2240 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 2241 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH 2242 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 2243 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2244 interrupt-names = "error", 2245 "ch0", "ch1", "ch2", "ch3", 2246 "ch4", "ch5", "ch6", "ch7", 2247 "ch8", "ch9", "ch10", "ch11", 2248 "ch12", "ch13", "ch14", "ch15"; 2249 clocks = <&cpg CPG_MOD 501>; 2250 clock-names = "fck"; 2251 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2252 resets = <&cpg 501>; 2253 #dma-cells = <1>; 2254 dma-channels = <16>; 2255 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2256 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2257 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2258 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2259 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2260 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2261 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2262 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2263 }; 2264 2265 xhci0: usb@ee000000 { 2266 compatible = "renesas,xhci-r8a7796", 2267 "renesas,rcar-gen3-xhci"; 2268 reg = <0 0xee000000 0 0xc00>; 2269 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2270 clocks = <&cpg CPG_MOD 328>; 2271 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2272 resets = <&cpg 328>; 2273 status = "disabled"; 2274 }; 2275 2276 usb3_peri0: usb@ee020000 { 2277 compatible = "renesas,r8a7796-usb3-peri", 2278 "renesas,rcar-gen3-usb3-peri"; 2279 reg = <0 0xee020000 0 0x400>; 2280 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2281 clocks = <&cpg CPG_MOD 328>; 2282 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2283 resets = <&cpg 328>; 2284 status = "disabled"; 2285 }; 2286 2287 ohci0: usb@ee080000 { 2288 compatible = "generic-ohci"; 2289 reg = <0 0xee080000 0 0x100>; 2290 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2291 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2292 phys = <&usb2_phy0 1>; 2293 phy-names = "usb"; 2294 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2295 resets = <&cpg 703>, <&cpg 704>; 2296 status = "disabled"; 2297 }; 2298 2299 ohci1: usb@ee0a0000 { 2300 compatible = "generic-ohci"; 2301 reg = <0 0xee0a0000 0 0x100>; 2302 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2303 clocks = <&cpg CPG_MOD 702>; 2304 phys = <&usb2_phy1 1>; 2305 phy-names = "usb"; 2306 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2307 resets = <&cpg 702>; 2308 status = "disabled"; 2309 }; 2310 2311 ehci0: usb@ee080100 { 2312 compatible = "generic-ehci"; 2313 reg = <0 0xee080100 0 0x100>; 2314 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2315 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2316 phys = <&usb2_phy0 2>; 2317 phy-names = "usb"; 2318 companion = <&ohci0>; 2319 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2320 resets = <&cpg 703>, <&cpg 704>; 2321 status = "disabled"; 2322 }; 2323 2324 ehci1: usb@ee0a0100 { 2325 compatible = "generic-ehci"; 2326 reg = <0 0xee0a0100 0 0x100>; 2327 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2328 clocks = <&cpg CPG_MOD 702>; 2329 phys = <&usb2_phy1 2>; 2330 phy-names = "usb"; 2331 companion = <&ohci1>; 2332 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2333 resets = <&cpg 702>; 2334 status = "disabled"; 2335 }; 2336 2337 usb2_phy0: usb-phy@ee080200 { 2338 compatible = "renesas,usb2-phy-r8a7796", 2339 "renesas,rcar-gen3-usb2-phy"; 2340 reg = <0 0xee080200 0 0x700>; 2341 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2342 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2343 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2344 resets = <&cpg 703>, <&cpg 704>; 2345 #phy-cells = <1>; 2346 status = "disabled"; 2347 }; 2348 2349 usb2_phy1: usb-phy@ee0a0200 { 2350 compatible = "renesas,usb2-phy-r8a7796", 2351 "renesas,rcar-gen3-usb2-phy"; 2352 reg = <0 0xee0a0200 0 0x700>; 2353 clocks = <&cpg CPG_MOD 702>; 2354 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2355 resets = <&cpg 702>; 2356 #phy-cells = <1>; 2357 status = "disabled"; 2358 }; 2359 2360 sdhi0: sd@ee100000 { 2361 compatible = "renesas,sdhi-r8a7796", 2362 "renesas,rcar-gen3-sdhi"; 2363 reg = <0 0xee100000 0 0x2000>; 2364 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2365 clocks = <&cpg CPG_MOD 314>; 2366 max-frequency = <200000000>; 2367 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2368 resets = <&cpg 314>; 2369 status = "disabled"; 2370 }; 2371 2372 sdhi1: sd@ee120000 { 2373 compatible = "renesas,sdhi-r8a7796", 2374 "renesas,rcar-gen3-sdhi"; 2375 reg = <0 0xee120000 0 0x2000>; 2376 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2377 clocks = <&cpg CPG_MOD 313>; 2378 max-frequency = <200000000>; 2379 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2380 resets = <&cpg 313>; 2381 status = "disabled"; 2382 }; 2383 2384 sdhi2: sd@ee140000 { 2385 compatible = "renesas,sdhi-r8a7796", 2386 "renesas,rcar-gen3-sdhi"; 2387 reg = <0 0xee140000 0 0x2000>; 2388 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2389 clocks = <&cpg CPG_MOD 312>; 2390 max-frequency = <200000000>; 2391 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2392 resets = <&cpg 312>; 2393 status = "disabled"; 2394 }; 2395 2396 sdhi3: sd@ee160000 { 2397 compatible = "renesas,sdhi-r8a7796", 2398 "renesas,rcar-gen3-sdhi"; 2399 reg = <0 0xee160000 0 0x2000>; 2400 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2401 clocks = <&cpg CPG_MOD 311>; 2402 max-frequency = <200000000>; 2403 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2404 resets = <&cpg 311>; 2405 status = "disabled"; 2406 }; 2407 2408 gic: interrupt-controller@f1010000 { 2409 compatible = "arm,gic-400"; 2410 #interrupt-cells = <3>; 2411 #address-cells = <0>; 2412 interrupt-controller; 2413 reg = <0x0 0xf1010000 0 0x1000>, 2414 <0x0 0xf1020000 0 0x20000>, 2415 <0x0 0xf1040000 0 0x20000>, 2416 <0x0 0xf1060000 0 0x20000>; 2417 interrupts = <GIC_PPI 9 2418 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 2419 clocks = <&cpg CPG_MOD 408>; 2420 clock-names = "clk"; 2421 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2422 resets = <&cpg 408>; 2423 }; 2424 2425 pciec0: pcie@fe000000 { 2426 compatible = "renesas,pcie-r8a7796", 2427 "renesas,pcie-rcar-gen3"; 2428 reg = <0 0xfe000000 0 0x80000>; 2429 #address-cells = <3>; 2430 #size-cells = <2>; 2431 bus-range = <0x00 0xff>; 2432 device_type = "pci"; 2433 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 2434 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 2435 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 2436 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2437 /* Map all possible DDR as inbound ranges */ 2438 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2439 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2440 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2441 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2442 #interrupt-cells = <1>; 2443 interrupt-map-mask = <0 0 0 0>; 2444 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2445 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2446 clock-names = "pcie", "pcie_bus"; 2447 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2448 resets = <&cpg 319>; 2449 status = "disabled"; 2450 }; 2451 2452 pciec1: pcie@ee800000 { 2453 compatible = "renesas,pcie-r8a7796", 2454 "renesas,pcie-rcar-gen3"; 2455 reg = <0 0xee800000 0 0x80000>; 2456 #address-cells = <3>; 2457 #size-cells = <2>; 2458 bus-range = <0x00 0xff>; 2459 device_type = "pci"; 2460 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 2461 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 2462 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 2463 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2464 /* Map all possible DDR as inbound ranges */ 2465 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2466 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2467 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2468 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2469 #interrupt-cells = <1>; 2470 interrupt-map-mask = <0 0 0 0>; 2471 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2472 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2473 clock-names = "pcie", "pcie_bus"; 2474 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2475 resets = <&cpg 318>; 2476 status = "disabled"; 2477 }; 2478 2479 imr-lx4@fe860000 { 2480 compatible = "renesas,r8a7796-imr-lx4", 2481 "renesas,imr-lx4"; 2482 reg = <0 0xfe860000 0 0x2000>; 2483 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2484 clocks = <&cpg CPG_MOD 823>; 2485 power-domains = <&sysc R8A7796_PD_A3VC>; 2486 resets = <&cpg 823>; 2487 }; 2488 2489 imr-lx4@fe870000 { 2490 compatible = "renesas,r8a7796-imr-lx4", 2491 "renesas,imr-lx4"; 2492 reg = <0 0xfe870000 0 0x2000>; 2493 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2494 clocks = <&cpg CPG_MOD 822>; 2495 power-domains = <&sysc R8A7796_PD_A3VC>; 2496 resets = <&cpg 822>; 2497 }; 2498 2499 fdp1@fe940000 { 2500 compatible = "renesas,fdp1"; 2501 reg = <0 0xfe940000 0 0x2400>; 2502 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2503 clocks = <&cpg CPG_MOD 119>; 2504 power-domains = <&sysc R8A7796_PD_A3VC>; 2505 resets = <&cpg 119>; 2506 renesas,fcp = <&fcpf0>; 2507 }; 2508 2509 fcpf0: fcp@fe950000 { 2510 compatible = "renesas,fcpf"; 2511 reg = <0 0xfe950000 0 0x200>; 2512 clocks = <&cpg CPG_MOD 615>; 2513 power-domains = <&sysc R8A7796_PD_A3VC>; 2514 resets = <&cpg 615>; 2515 }; 2516 2517 fcpvb0: fcp@fe96f000 { 2518 compatible = "renesas,fcpv"; 2519 reg = <0 0xfe96f000 0 0x200>; 2520 clocks = <&cpg CPG_MOD 607>; 2521 power-domains = <&sysc R8A7796_PD_A3VC>; 2522 resets = <&cpg 607>; 2523 }; 2524 2525 fcpvi0: fcp@fe9af000 { 2526 compatible = "renesas,fcpv"; 2527 reg = <0 0xfe9af000 0 0x200>; 2528 clocks = <&cpg CPG_MOD 611>; 2529 power-domains = <&sysc R8A7796_PD_A3VC>; 2530 resets = <&cpg 611>; 2531 iommus = <&ipmmu_vc0 19>; 2532 }; 2533 2534 fcpvd0: fcp@fea27000 { 2535 compatible = "renesas,fcpv"; 2536 reg = <0 0xfea27000 0 0x200>; 2537 clocks = <&cpg CPG_MOD 603>; 2538 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2539 resets = <&cpg 603>; 2540 iommus = <&ipmmu_vi0 8>; 2541 }; 2542 2543 fcpvd1: fcp@fea2f000 { 2544 compatible = "renesas,fcpv"; 2545 reg = <0 0xfea2f000 0 0x200>; 2546 clocks = <&cpg CPG_MOD 602>; 2547 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2548 resets = <&cpg 602>; 2549 iommus = <&ipmmu_vi0 9>; 2550 }; 2551 2552 fcpvd2: fcp@fea37000 { 2553 compatible = "renesas,fcpv"; 2554 reg = <0 0xfea37000 0 0x200>; 2555 clocks = <&cpg CPG_MOD 601>; 2556 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2557 resets = <&cpg 601>; 2558 iommus = <&ipmmu_vi0 10>; 2559 }; 2560 2561 vspb: vsp@fe960000 { 2562 compatible = "renesas,vsp2"; 2563 reg = <0 0xfe960000 0 0x8000>; 2564 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2565 clocks = <&cpg CPG_MOD 626>; 2566 power-domains = <&sysc R8A7796_PD_A3VC>; 2567 resets = <&cpg 626>; 2568 2569 renesas,fcp = <&fcpvb0>; 2570 }; 2571 2572 vspd0: vsp@fea20000 { 2573 compatible = "renesas,vsp2"; 2574 reg = <0 0xfea20000 0 0x5000>; 2575 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2576 clocks = <&cpg CPG_MOD 623>; 2577 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2578 resets = <&cpg 623>; 2579 2580 renesas,fcp = <&fcpvd0>; 2581 }; 2582 2583 vspd1: vsp@fea28000 { 2584 compatible = "renesas,vsp2"; 2585 reg = <0 0xfea28000 0 0x5000>; 2586 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2587 clocks = <&cpg CPG_MOD 622>; 2588 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2589 resets = <&cpg 622>; 2590 2591 renesas,fcp = <&fcpvd1>; 2592 }; 2593 2594 vspd2: vsp@fea30000 { 2595 compatible = "renesas,vsp2"; 2596 reg = <0 0xfea30000 0 0x5000>; 2597 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2598 clocks = <&cpg CPG_MOD 621>; 2599 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2600 resets = <&cpg 621>; 2601 2602 renesas,fcp = <&fcpvd2>; 2603 }; 2604 2605 vspi0: vsp@fe9a0000 { 2606 compatible = "renesas,vsp2"; 2607 reg = <0 0xfe9a0000 0 0x8000>; 2608 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2609 clocks = <&cpg CPG_MOD 631>; 2610 power-domains = <&sysc R8A7796_PD_A3VC>; 2611 resets = <&cpg 631>; 2612 2613 renesas,fcp = <&fcpvi0>; 2614 }; 2615 2616 csi20: csi2@fea80000 { 2617 compatible = "renesas,r8a7796-csi2"; 2618 reg = <0 0xfea80000 0 0x10000>; 2619 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2620 clocks = <&cpg CPG_MOD 714>; 2621 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2622 resets = <&cpg 714>; 2623 status = "disabled"; 2624 2625 ports { 2626 #address-cells = <1>; 2627 #size-cells = <0>; 2628 2629 port@1 { 2630 #address-cells = <1>; 2631 #size-cells = <0>; 2632 2633 reg = <1>; 2634 2635 csi20vin0: endpoint@0 { 2636 reg = <0>; 2637 remote-endpoint = <&vin0csi20>; 2638 }; 2639 csi20vin1: endpoint@1 { 2640 reg = <1>; 2641 remote-endpoint = <&vin1csi20>; 2642 }; 2643 csi20vin2: endpoint@2 { 2644 reg = <2>; 2645 remote-endpoint = <&vin2csi20>; 2646 }; 2647 csi20vin3: endpoint@3 { 2648 reg = <3>; 2649 remote-endpoint = <&vin3csi20>; 2650 }; 2651 csi20vin4: endpoint@4 { 2652 reg = <4>; 2653 remote-endpoint = <&vin4csi20>; 2654 }; 2655 csi20vin5: endpoint@5 { 2656 reg = <5>; 2657 remote-endpoint = <&vin5csi20>; 2658 }; 2659 csi20vin6: endpoint@6 { 2660 reg = <6>; 2661 remote-endpoint = <&vin6csi20>; 2662 }; 2663 csi20vin7: endpoint@7 { 2664 reg = <7>; 2665 remote-endpoint = <&vin7csi20>; 2666 }; 2667 }; 2668 }; 2669 }; 2670 2671 csi40: csi2@feaa0000 { 2672 compatible = "renesas,r8a7796-csi2"; 2673 reg = <0 0xfeaa0000 0 0x10000>; 2674 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2675 clocks = <&cpg CPG_MOD 716>; 2676 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2677 resets = <&cpg 716>; 2678 status = "disabled"; 2679 2680 ports { 2681 #address-cells = <1>; 2682 #size-cells = <0>; 2683 2684 port@1 { 2685 #address-cells = <1>; 2686 #size-cells = <0>; 2687 2688 reg = <1>; 2689 2690 csi40vin0: endpoint@0 { 2691 reg = <0>; 2692 remote-endpoint = <&vin0csi40>; 2693 }; 2694 csi40vin1: endpoint@1 { 2695 reg = <1>; 2696 remote-endpoint = <&vin1csi40>; 2697 }; 2698 csi40vin2: endpoint@2 { 2699 reg = <2>; 2700 remote-endpoint = <&vin2csi40>; 2701 }; 2702 csi40vin3: endpoint@3 { 2703 reg = <3>; 2704 remote-endpoint = <&vin3csi40>; 2705 }; 2706 csi40vin4: endpoint@4 { 2707 reg = <4>; 2708 remote-endpoint = <&vin4csi40>; 2709 }; 2710 csi40vin5: endpoint@5 { 2711 reg = <5>; 2712 remote-endpoint = <&vin5csi40>; 2713 }; 2714 csi40vin6: endpoint@6 { 2715 reg = <6>; 2716 remote-endpoint = <&vin6csi40>; 2717 }; 2718 csi40vin7: endpoint@7 { 2719 reg = <7>; 2720 remote-endpoint = <&vin7csi40>; 2721 }; 2722 }; 2723 2724 }; 2725 }; 2726 2727 hdmi0: hdmi@fead0000 { 2728 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; 2729 reg = <0 0xfead0000 0 0x10000>; 2730 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2731 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; 2732 clock-names = "iahb", "isfr"; 2733 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2734 resets = <&cpg 729>; 2735 status = "disabled"; 2736 2737 ports { 2738 #address-cells = <1>; 2739 #size-cells = <0>; 2740 port@0 { 2741 reg = <0>; 2742 dw_hdmi0_in: endpoint { 2743 remote-endpoint = <&du_out_hdmi0>; 2744 }; 2745 }; 2746 port@1 { 2747 reg = <1>; 2748 }; 2749 port@2 { 2750 /* HDMI sound */ 2751 reg = <2>; 2752 }; 2753 }; 2754 }; 2755 2756 du: display@feb00000 { 2757 compatible = "renesas,du-r8a7796"; 2758 reg = <0 0xfeb00000 0 0x70000>; 2759 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2760 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2761 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 2762 clocks = <&cpg CPG_MOD 724>, 2763 <&cpg CPG_MOD 723>, 2764 <&cpg CPG_MOD 722>; 2765 clock-names = "du.0", "du.1", "du.2"; 2766 status = "disabled"; 2767 2768 vsps = <&vspd0 &vspd1 &vspd2>; 2769 2770 ports { 2771 #address-cells = <1>; 2772 #size-cells = <0>; 2773 2774 port@0 { 2775 reg = <0>; 2776 du_out_rgb: endpoint { 2777 }; 2778 }; 2779 port@1 { 2780 reg = <1>; 2781 du_out_hdmi0: endpoint { 2782 remote-endpoint = <&dw_hdmi0_in>; 2783 }; 2784 }; 2785 port@2 { 2786 reg = <2>; 2787 du_out_lvds0: endpoint { 2788 remote-endpoint = <&lvds0_in>; 2789 }; 2790 }; 2791 }; 2792 }; 2793 2794 lvds0: lvds@feb90000 { 2795 compatible = "renesas,r8a7796-lvds"; 2796 reg = <0 0xfeb90000 0 0x14>; 2797 clocks = <&cpg CPG_MOD 727>; 2798 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2799 resets = <&cpg 727>; 2800 status = "disabled"; 2801 2802 ports { 2803 #address-cells = <1>; 2804 #size-cells = <0>; 2805 2806 port@0 { 2807 reg = <0>; 2808 lvds0_in: endpoint { 2809 remote-endpoint = <&du_out_lvds0>; 2810 }; 2811 }; 2812 port@1 { 2813 reg = <1>; 2814 lvds0_out: endpoint { 2815 }; 2816 }; 2817 }; 2818 }; 2819 2820 prr: chipid@fff00044 { 2821 compatible = "renesas,prr"; 2822 reg = <0 0xfff00044 0 4>; 2823 }; 2824 }; 2825 2826 thermal-zones { 2827 sensor_thermal1: sensor-thermal1 { 2828 polling-delay-passive = <250>; 2829 polling-delay = <1000>; 2830 thermal-sensors = <&tsc 0>; 2831 sustainable-power = <3874>; 2832 2833 trips { 2834 sensor1_crit: sensor1-crit { 2835 temperature = <120000>; 2836 hysteresis = <1000>; 2837 type = "critical"; 2838 }; 2839 }; 2840 }; 2841 2842 sensor_thermal2: sensor-thermal2 { 2843 polling-delay-passive = <250>; 2844 polling-delay = <1000>; 2845 thermal-sensors = <&tsc 1>; 2846 sustainable-power = <3874>; 2847 2848 trips { 2849 sensor2_crit: sensor2-crit { 2850 temperature = <120000>; 2851 hysteresis = <1000>; 2852 type = "critical"; 2853 }; 2854 }; 2855 }; 2856 2857 sensor_thermal3: sensor-thermal3 { 2858 polling-delay-passive = <250>; 2859 polling-delay = <1000>; 2860 thermal-sensors = <&tsc 2>; 2861 sustainable-power = <3874>; 2862 2863 cooling-maps { 2864 map0 { 2865 trip = <&target>; 2866 cooling-device = <&a57_0 2 4>; 2867 contribution = <1024>; 2868 }; 2869 map1 { 2870 trip = <&target>; 2871 cooling-device = <&a53_0 0 2>; 2872 contribution = <1024>; 2873 }; 2874 }; 2875 trips { 2876 target: trip-point1 { 2877 temperature = <100000>; 2878 hysteresis = <1000>; 2879 type = "passive"; 2880 }; 2881 2882 sensor3_crit: sensor3-crit { 2883 temperature = <120000>; 2884 hysteresis = <1000>; 2885 type = "critical"; 2886 }; 2887 }; 2888 }; 2889 }; 2890 2891 timer { 2892 compatible = "arm,armv8-timer"; 2893 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2894 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2895 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2896 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 2897 }; 2898 2899 /* External USB clocks - can be overridden by the board */ 2900 usb3s0_clk: usb3s0 { 2901 compatible = "fixed-clock"; 2902 #clock-cells = <0>; 2903 clock-frequency = <0>; 2904 }; 2905 2906 usb_extal_clk: usb_extal { 2907 compatible = "fixed-clock"; 2908 #clock-cells = <0>; 2909 clock-frequency = <0>; 2910 }; 2911}; 2912
