1 /*
2 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
3 * Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/i2c.h>
23 #include <linux/property.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/spi/spi.h>
26 #include <linux/spi/eeprom.h>
27 #include <linux/irq.h>
28 #include <linux/delay.h>
29 #include <linux/gpio.h>
30 #include <linux/usb/otg.h>
31 #include <linux/usb/ulpi.h>
32
33 #include <asm/mach/arch.h>
34 #include <asm/mach-types.h>
35 #include <asm/mach/time.h>
36
37 #include "common.h"
38 #include "devices-imx27.h"
39 #include "ehci.h"
40 #include "hardware.h"
41 #include "iomux-mx27.h"
42 #include "ulpi.h"
43
44 #define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
45 #define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
46 #define SPI1_SS0 (GPIO_PORTD + 28)
47 #define SPI1_SS1 (GPIO_PORTD + 27)
48 #define SD2_CD (GPIO_PORTC + 29)
49
50 static const int pca100_pins[] __initconst = {
51 /* UART1 */
52 PE12_PF_UART1_TXD,
53 PE13_PF_UART1_RXD,
54 PE14_PF_UART1_CTS,
55 PE15_PF_UART1_RTS,
56 /* SDHC */
57 PB4_PF_SD2_D0,
58 PB5_PF_SD2_D1,
59 PB6_PF_SD2_D2,
60 PB7_PF_SD2_D3,
61 PB8_PF_SD2_CMD,
62 PB9_PF_SD2_CLK,
63 SD2_CD | GPIO_GPIO | GPIO_IN,
64 /* FEC */
65 PD0_AIN_FEC_TXD0,
66 PD1_AIN_FEC_TXD1,
67 PD2_AIN_FEC_TXD2,
68 PD3_AIN_FEC_TXD3,
69 PD4_AOUT_FEC_RX_ER,
70 PD5_AOUT_FEC_RXD1,
71 PD6_AOUT_FEC_RXD2,
72 PD7_AOUT_FEC_RXD3,
73 PD8_AF_FEC_MDIO,
74 PD9_AIN_FEC_MDC,
75 PD10_AOUT_FEC_CRS,
76 PD11_AOUT_FEC_TX_CLK,
77 PD12_AOUT_FEC_RXD0,
78 PD13_AOUT_FEC_RX_DV,
79 PD14_AOUT_FEC_RX_CLK,
80 PD15_AOUT_FEC_COL,
81 PD16_AIN_FEC_TX_ER,
82 PF23_AIN_FEC_TX_EN,
83 /* SSI1 */
84 PC20_PF_SSI1_FS,
85 PC21_PF_SSI1_RXD,
86 PC22_PF_SSI1_TXD,
87 PC23_PF_SSI1_CLK,
88 /* onboard I2C */
89 PC5_PF_I2C2_SDA,
90 PC6_PF_I2C2_SCL,
91 /* external I2C */
92 PD17_PF_I2C_DATA,
93 PD18_PF_I2C_CLK,
94 /* SPI1 */
95 PD25_PF_CSPI1_RDY,
96 PD29_PF_CSPI1_SCLK,
97 PD30_PF_CSPI1_MISO,
98 PD31_PF_CSPI1_MOSI,
99 /* OTG */
100 OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
101 PC7_PF_USBOTG_DATA5,
102 PC8_PF_USBOTG_DATA6,
103 PC9_PF_USBOTG_DATA0,
104 PC10_PF_USBOTG_DATA2,
105 PC11_PF_USBOTG_DATA1,
106 PC12_PF_USBOTG_DATA4,
107 PC13_PF_USBOTG_DATA3,
108 PE0_PF_USBOTG_NXT,
109 PE1_PF_USBOTG_STP,
110 PE2_PF_USBOTG_DIR,
111 PE24_PF_USBOTG_CLK,
112 PE25_PF_USBOTG_DATA7,
113 /* USBH2 */
114 USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
115 PA0_PF_USBH2_CLK,
116 PA1_PF_USBH2_DIR,
117 PA2_PF_USBH2_DATA7,
118 PA3_PF_USBH2_NXT,
119 PA4_PF_USBH2_STP,
120 PD19_AF_USBH2_DATA4,
121 PD20_AF_USBH2_DATA3,
122 PD21_AF_USBH2_DATA6,
123 PD22_AF_USBH2_DATA0,
124 PD23_AF_USBH2_DATA2,
125 PD24_AF_USBH2_DATA1,
126 PD26_AF_USBH2_DATA5,
127 /* display */
128 PA5_PF_LSCLK,
129 PA6_PF_LD0,
130 PA7_PF_LD1,
131 PA8_PF_LD2,
132 PA9_PF_LD3,
133 PA10_PF_LD4,
134 PA11_PF_LD5,
135 PA12_PF_LD6,
136 PA13_PF_LD7,
137 PA14_PF_LD8,
138 PA15_PF_LD9,
139 PA16_PF_LD10,
140 PA17_PF_LD11,
141 PA18_PF_LD12,
142 PA19_PF_LD13,
143 PA20_PF_LD14,
144 PA21_PF_LD15,
145 PA22_PF_LD16,
146 PA23_PF_LD17,
147 PA26_PF_PS,
148 PA28_PF_HSYNC,
149 PA29_PF_VSYNC,
150 PA31_PF_OE_ACD,
151 /* free GPIO */
152 GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN, /* GPIO0_IRQ */
153 GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN, /* GPIO1_IRQ */
154 GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */
155 };
156
157 static const struct imxuart_platform_data uart_pdata __initconst = {
158 .flags = IMXUART_HAVE_RTSCTS,
159 };
160
161 static const struct mxc_nand_platform_data
162 pca100_nand_board_info __initconst = {
163 .width = 1,
164 .hw_ecc = 1,
165 };
166
167 static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
168 .bitrate = 100000,
169 };
170
171 static const struct property_entry board_eeprom_properties[] = {
172 PROPERTY_ENTRY_U32("pagesize", 32),
173 { }
174 };
175
176 static struct i2c_board_info pca100_i2c_devices[] = {
177 {
178 I2C_BOARD_INFO("24c32", 0x52), /* E0=0, E1=1, E2=0 */
179 .properties = board_eeprom_properties,
180 }, {
181 I2C_BOARD_INFO("pcf8563", 0x51),
182 }, {
183 I2C_BOARD_INFO("lm75", 0x4a),
184 }
185 };
186
187 static struct spi_eeprom at25320 = {
188 .name = "at25320an",
189 .byte_len = 4096,
190 .page_size = 32,
191 .flags = EE_ADDR2,
192 };
193
194 static struct spi_board_info pca100_spi_board_info[] __initdata = {
195 {
196 .modalias = "at25",
197 .max_speed_hz = 30000,
198 .bus_num = 0,
199 .chip_select = 1,
200 .platform_data = &at25320,
201 },
202 };
203
204 static int pca100_spi_cs[] = {SPI1_SS0, SPI1_SS1};
205
206 static const struct spi_imx_master pca100_spi0_data __initconst = {
207 .chipselect = pca100_spi_cs,
208 .num_chipselect = ARRAY_SIZE(pca100_spi_cs),
209 };
210
pca100_ac97_warm_reset(struct snd_ac97 * ac97)211 static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
212 {
213 mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
214 gpio_set_value(GPIO_PORTC + 20, 1);
215 udelay(2);
216 gpio_set_value(GPIO_PORTC + 20, 0);
217 mxc_gpio_mode(PC20_PF_SSI1_FS);
218 msleep(2);
219 }
220
pca100_ac97_cold_reset(struct snd_ac97 * ac97)221 static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
222 {
223 mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT); /* FS */
224 gpio_set_value(GPIO_PORTC + 20, 0);
225 mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT); /* TX */
226 gpio_set_value(GPIO_PORTC + 22, 0);
227 mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT); /* reset */
228 gpio_set_value(GPIO_PORTC + 28, 0);
229 udelay(10);
230 gpio_set_value(GPIO_PORTC + 28, 1);
231 mxc_gpio_mode(PC20_PF_SSI1_FS);
232 mxc_gpio_mode(PC22_PF_SSI1_TXD);
233 msleep(2);
234 }
235
236 static const struct imx_ssi_platform_data pca100_ssi_pdata __initconst = {
237 .ac97_reset = pca100_ac97_cold_reset,
238 .ac97_warm_reset = pca100_ac97_warm_reset,
239 .flags = IMX_SSI_USE_AC97,
240 };
241
pca100_sdhc2_init(struct device * dev,irq_handler_t detect_irq,void * data)242 static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
243 void *data)
244 {
245 int ret;
246
247 ret = request_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), detect_irq,
248 IRQF_TRIGGER_FALLING, "imx-mmc-detect", data);
249 if (ret)
250 printk(KERN_ERR
251 "pca100: Failed to request irq for sd/mmc detection\n");
252
253 return ret;
254 }
255
pca100_sdhc2_exit(struct device * dev,void * data)256 static void pca100_sdhc2_exit(struct device *dev, void *data)
257 {
258 free_irq(gpio_to_irq(IMX_GPIO_NR(3, 29)), data);
259 }
260
261 static const struct imxmmc_platform_data sdhc_pdata __initconst = {
262 .init = pca100_sdhc2_init,
263 .exit = pca100_sdhc2_exit,
264 };
265
otg_phy_init(struct platform_device * pdev)266 static int otg_phy_init(struct platform_device *pdev)
267 {
268 gpio_set_value(OTG_PHY_CS_GPIO, 0);
269
270 mdelay(10);
271
272 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
273 }
274
275 static struct mxc_usbh_platform_data otg_pdata __initdata = {
276 .init = otg_phy_init,
277 .portsc = MXC_EHCI_MODE_ULPI,
278 };
279
usbh2_phy_init(struct platform_device * pdev)280 static int usbh2_phy_init(struct platform_device *pdev)
281 {
282 gpio_set_value(USBH2_PHY_CS_GPIO, 0);
283
284 mdelay(10);
285
286 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
287 }
288
289 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
290 .init = usbh2_phy_init,
291 .portsc = MXC_EHCI_MODE_ULPI,
292 };
293
294 static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
295 .operating_mode = FSL_USB2_DR_DEVICE,
296 .phy_mode = FSL_USB2_PHY_ULPI,
297 };
298
299 static bool otg_mode_host __initdata;
300
pca100_otg_mode(char * options)301 static int __init pca100_otg_mode(char *options)
302 {
303 if (!strcmp(options, "host"))
304 otg_mode_host = true;
305 else if (!strcmp(options, "device"))
306 otg_mode_host = false;
307 else
308 pr_info("otg_mode neither \"host\" nor \"device\". "
309 "Defaulting to device\n");
310 return 1;
311 }
312 __setup("otg_mode=", pca100_otg_mode);
313
314 /* framebuffer info */
315 static struct imx_fb_videomode pca100_fb_modes[] = {
316 {
317 .mode = {
318 .name = "EMERGING-ETV570G0DHU",
319 .refresh = 60,
320 .xres = 640,
321 .yres = 480,
322 .pixclock = 39722, /* in ps (25.175 MHz) */
323 .hsync_len = 30,
324 .left_margin = 114,
325 .right_margin = 16,
326 .vsync_len = 3,
327 .upper_margin = 32,
328 .lower_margin = 0,
329 },
330 /*
331 * TFT
332 * Pixel pol active high
333 * HSYNC active low
334 * VSYNC active low
335 * use HSYNC for ACD count
336 * line clock disable while idle
337 * always enable line clock even if no data
338 */
339 .pcr = 0xf0c08080,
340 .bpp = 16,
341 },
342 };
343
344 static const struct imx_fb_platform_data pca100_fb_data __initconst = {
345 .mode = pca100_fb_modes,
346 .num_modes = ARRAY_SIZE(pca100_fb_modes),
347
348 .pwmr = 0x00A903FF,
349 .lscr1 = 0x00120300,
350 .dmacr = 0x00020010,
351 };
352
pca100_init(void)353 static void __init pca100_init(void)
354 {
355 int ret;
356
357 imx27_soc_init();
358
359 ret = mxc_gpio_setup_multiple_pins(pca100_pins,
360 ARRAY_SIZE(pca100_pins), "PCA100");
361 if (ret)
362 printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
363
364 imx27_add_imx_uart0(&uart_pdata);
365
366 imx27_add_mxc_nand(&pca100_nand_board_info);
367
368 /* only the i2c master 1 is used on this CPU card */
369 i2c_register_board_info(1, pca100_i2c_devices,
370 ARRAY_SIZE(pca100_i2c_devices));
371
372 imx27_add_imx_i2c(1, &pca100_i2c1_data);
373
374 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN);
375 mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
376 spi_register_board_info(pca100_spi_board_info,
377 ARRAY_SIZE(pca100_spi_board_info));
378 imx27_add_spi_imx0(&pca100_spi0_data);
379
380 imx27_add_imx_fb(&pca100_fb_data);
381
382 imx27_add_fec(NULL);
383 imx27_add_imx2_wdt();
384 imx27_add_mxc_w1();
385 }
386
pca100_late_init(void)387 static void __init pca100_late_init(void)
388 {
389 imx27_add_imx_ssi(0, &pca100_ssi_pdata);
390
391 imx27_add_mxc_mmc(1, &sdhc_pdata);
392
393 gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
394 gpio_direction_output(OTG_PHY_CS_GPIO, 1);
395 gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
396 gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
397
398 if (otg_mode_host) {
399 otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
400 ULPI_OTG_DRVVBUS_EXT);
401
402 if (otg_pdata.otg)
403 imx27_add_mxc_ehci_otg(&otg_pdata);
404 } else {
405 gpio_set_value(OTG_PHY_CS_GPIO, 0);
406 imx27_add_fsl_usb2_udc(&otg_device_pdata);
407 }
408
409 usbh2_pdata.otg = imx_otg_ulpi_create(
410 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
411
412 if (usbh2_pdata.otg)
413 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
414 }
415
pca100_timer_init(void)416 static void __init pca100_timer_init(void)
417 {
418 mx27_clocks_init(26000000);
419 }
420
421 MACHINE_START(PCA100, "phyCARD-i.MX27")
422 .atag_offset = 0x100,
423 .map_io = mx27_map_io,
424 .init_early = imx27_init_early,
425 .init_irq = mx27_init_irq,
426 .init_machine = pca100_init,
427 .init_late = pca100_late_init,
428 .init_time = pca100_timer_init,
429 .restart = mxc_restart,
430 MACHINE_END
431
