1 /* 2 * cros_ec_lpc_reg - LPC access to the Chrome OS Embedded Controller 3 * 4 * Copyright (C) 2016 Google, Inc 5 * 6 * This software is licensed under the terms of the GNU General Public 7 * License version 2, as published by the Free Software Foundation, and 8 * may be copied, distributed, and modified under those terms. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * This driver uses the Chrome OS EC byte-level message-based protocol for 16 * communicating the keyboard state (which keys are pressed) from a keyboard EC 17 * to the AP over some bus (such as i2c, lpc, spi). The EC does debouncing, 18 * but everything else (including deghosting) is done here. The main 19 * motivation for this is to keep the EC firmware as simple as possible, since 20 * it cannot be easily upgraded and EC flash/IRAM space is relatively 21 * expensive. 22 */ 23 24 #ifndef __LINUX_MFD_CROS_EC_REG_H 25 #define __LINUX_MFD_CROS_EC_REG_H 26 27 /** 28 * cros_ec_lpc_read_bytes - Read bytes from a given LPC-mapped address. 29 * Returns 8-bit checksum of all bytes read. 30 * 31 * @offset: Base read address 32 * @length: Number of bytes to read 33 * @dest: Destination buffer 34 */ 35 u8 cros_ec_lpc_read_bytes(unsigned int offset, unsigned int length, u8 *dest); 36 37 /** 38 * cros_ec_lpc_write_bytes - Write bytes to a given LPC-mapped address. 39 * Returns 8-bit checksum of all bytes written. 40 * 41 * @offset: Base write address 42 * @length: Number of bytes to write 43 * @msg: Write data buffer 44 */ 45 u8 cros_ec_lpc_write_bytes(unsigned int offset, unsigned int length, u8 *msg); 46 47 /** 48 * cros_ec_lpc_reg_init 49 * 50 * Initialize register I/O. 51 */ 52 void cros_ec_lpc_reg_init(void); 53 54 /** 55 * cros_ec_lpc_reg_destroy 56 * 57 * Cleanup reg I/O. 58 */ 59 void cros_ec_lpc_reg_destroy(void); 60 61 #endif /* __LINUX_MFD_CROS_EC_REG_H */ 62