1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __IO_PGTABLE_H
3 #define __IO_PGTABLE_H
4 
5 #include <linux/bitops.h>
6 #include <linux/iommu.h>
7 
8 /*
9  * Public API for use by IOMMU drivers
10  */
11 enum io_pgtable_fmt {
12 	ARM_32_LPAE_S1,
13 	ARM_32_LPAE_S2,
14 	ARM_64_LPAE_S1,
15 	ARM_64_LPAE_S2,
16 	ARM_V7S,
17 	ARM_MALI_LPAE,
18 	IO_PGTABLE_NUM_FMTS,
19 };
20 
21 /**
22  * struct iommu_flush_ops - IOMMU callbacks for TLB and page table management.
23  *
24  * @tlb_flush_all:  Synchronously invalidate the entire TLB context.
25  * @tlb_flush_walk: Synchronously invalidate all intermediate TLB state
26  *                  (sometimes referred to as the "walk cache") for a virtual
27  *                  address range.
28  * @tlb_flush_leaf: Synchronously invalidate all leaf TLB state for a virtual
29  *                  address range.
30  * @tlb_add_page:   Optional callback to queue up leaf TLB invalidation for a
31  *                  single page.  IOMMUs that cannot batch TLB invalidation
32  *                  operations efficiently will typically issue them here, but
33  *                  others may decide to update the iommu_iotlb_gather structure
34  *                  and defer the invalidation until iommu_iotlb_sync() instead.
35  *
36  * Note that these can all be called in atomic context and must therefore
37  * not block.
38  */
39 struct iommu_flush_ops {
40 	void (*tlb_flush_all)(void *cookie);
41 	void (*tlb_flush_walk)(unsigned long iova, size_t size, size_t granule,
42 			       void *cookie);
43 	void (*tlb_flush_leaf)(unsigned long iova, size_t size, size_t granule,
44 			       void *cookie);
45 	void (*tlb_add_page)(struct iommu_iotlb_gather *gather,
46 			     unsigned long iova, size_t granule, void *cookie);
47 };
48 
49 /**
50  * struct io_pgtable_cfg - Configuration data for a set of page tables.
51  *
52  * @quirks:        A bitmap of hardware quirks that require some special
53  *                 action by the low-level page table allocator.
54  * @pgsize_bitmap: A bitmap of page sizes supported by this set of page
55  *                 tables.
56  * @ias:           Input address (iova) size, in bits.
57  * @oas:           Output address (paddr) size, in bits.
58  * @coherent_walk  A flag to indicate whether or not page table walks made
59  *                 by the IOMMU are coherent with the CPU caches.
60  * @tlb:           TLB management callbacks for this set of tables.
61  * @iommu_dev:     The device representing the DMA configuration for the
62  *                 page table walker.
63  */
64 struct io_pgtable_cfg {
65 	/*
66 	 * IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in
67 	 *	stage 1 PTEs, for hardware which insists on validating them
68 	 *	even in	non-secure state where they should normally be ignored.
69 	 *
70 	 * IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and
71 	 *	IOMMU_NOEXEC flags and map everything with full access, for
72 	 *	hardware which does not implement the permissions of a given
73 	 *	format, and/or requires some format-specific default value.
74 	 *
75 	 * IO_PGTABLE_QUIRK_TLBI_ON_MAP: If the format forbids caching invalid
76 	 *	(unmapped) entries but the hardware might do so anyway, perform
77 	 *	TLB maintenance when mapping as well as when unmapping.
78 	 *
79 	 * IO_PGTABLE_QUIRK_ARM_MTK_EXT: (ARM v7s format) MediaTek IOMMUs extend
80 	 *	to support up to 34 bits PA where the bit32 and bit33 are
81 	 *	encoded in the bit9 and bit4 of the PTE respectively.
82 	 *
83 	 * IO_PGTABLE_QUIRK_NON_STRICT: Skip issuing synchronous leaf TLBIs
84 	 *	on unmap, for DMA domains using the flush queue mechanism for
85 	 *	delayed invalidation.
86 	 *
87 	 * IO_PGTABLE_QUIRK_ARM_TTBR1: (ARM LPAE format) Configure the table
88 	 *	for use in the upper half of a split address space.
89 	 */
90 	#define IO_PGTABLE_QUIRK_ARM_NS		BIT(0)
91 	#define IO_PGTABLE_QUIRK_NO_PERMS	BIT(1)
92 	#define IO_PGTABLE_QUIRK_TLBI_ON_MAP	BIT(2)
93 	#define IO_PGTABLE_QUIRK_ARM_MTK_EXT	BIT(3)
94 	#define IO_PGTABLE_QUIRK_NON_STRICT	BIT(4)
95 	#define IO_PGTABLE_QUIRK_ARM_TTBR1	BIT(5)
96 	unsigned long			quirks;
97 	unsigned long			pgsize_bitmap;
98 	unsigned int			ias;
99 	unsigned int			oas;
100 	bool				coherent_walk;
101 	const struct iommu_flush_ops	*tlb;
102 	struct device			*iommu_dev;
103 
104 	/* Low-level data specific to the table format */
105 	union {
106 		struct {
107 			u64	ttbr;
108 			struct {
109 				u32	ips:3;
110 				u32	tg:2;
111 				u32	sh:2;
112 				u32	orgn:2;
113 				u32	irgn:2;
114 				u32	tsz:6;
115 			}	tcr;
116 			u64	mair;
117 		} arm_lpae_s1_cfg;
118 
119 		struct {
120 			u64	vttbr;
121 			struct {
122 				u32	ps:3;
123 				u32	tg:2;
124 				u32	sh:2;
125 				u32	orgn:2;
126 				u32	irgn:2;
127 				u32	sl:2;
128 				u32	tsz:6;
129 			}	vtcr;
130 		} arm_lpae_s2_cfg;
131 
132 		struct {
133 			u32	ttbr;
134 			u32	tcr;
135 			u32	nmrr;
136 			u32	prrr;
137 		} arm_v7s_cfg;
138 
139 		struct {
140 			u64	transtab;
141 			u64	memattr;
142 		} arm_mali_lpae_cfg;
143 	};
144 };
145 
146 /**
147  * struct io_pgtable_ops - Page table manipulation API for IOMMU drivers.
148  *
149  * @map:          Map a physically contiguous memory region.
150  * @unmap:        Unmap a physically contiguous memory region.
151  * @iova_to_phys: Translate iova to physical address.
152  *
153  * These functions map directly onto the iommu_ops member functions with
154  * the same names.
155  */
156 struct io_pgtable_ops {
157 	int (*map)(struct io_pgtable_ops *ops, unsigned long iova,
158 		   phys_addr_t paddr, size_t size, int prot, gfp_t gfp);
159 	size_t (*unmap)(struct io_pgtable_ops *ops, unsigned long iova,
160 			size_t size, struct iommu_iotlb_gather *gather);
161 	phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops,
162 				    unsigned long iova);
163 };
164 
165 /**
166  * alloc_io_pgtable_ops() - Allocate a page table allocator for use by an IOMMU.
167  *
168  * @fmt:    The page table format.
169  * @cfg:    The page table configuration. This will be modified to represent
170  *          the configuration actually provided by the allocator (e.g. the
171  *          pgsize_bitmap may be restricted).
172  * @cookie: An opaque token provided by the IOMMU driver and passed back to
173  *          the callback routines in cfg->tlb.
174  */
175 struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt,
176 					    struct io_pgtable_cfg *cfg,
177 					    void *cookie);
178 
179 /**
180  * free_io_pgtable_ops() - Free an io_pgtable_ops structure. The caller
181  *                         *must* ensure that the page table is no longer
182  *                         live, but the TLB can be dirty.
183  *
184  * @ops: The ops returned from alloc_io_pgtable_ops.
185  */
186 void free_io_pgtable_ops(struct io_pgtable_ops *ops);
187 
188 
189 /*
190  * Internal structures for page table allocator implementations.
191  */
192 
193 /**
194  * struct io_pgtable - Internal structure describing a set of page tables.
195  *
196  * @fmt:    The page table format.
197  * @cookie: An opaque token provided by the IOMMU driver and passed back to
198  *          any callback routines.
199  * @cfg:    A copy of the page table configuration.
200  * @ops:    The page table operations in use for this set of page tables.
201  */
202 struct io_pgtable {
203 	enum io_pgtable_fmt	fmt;
204 	void			*cookie;
205 	struct io_pgtable_cfg	cfg;
206 	struct io_pgtable_ops	ops;
207 };
208 
209 #define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops)
210 
io_pgtable_tlb_flush_all(struct io_pgtable * iop)211 static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop)
212 {
213 	iop->cfg.tlb->tlb_flush_all(iop->cookie);
214 }
215 
216 static inline void
io_pgtable_tlb_flush_walk(struct io_pgtable * iop,unsigned long iova,size_t size,size_t granule)217 io_pgtable_tlb_flush_walk(struct io_pgtable *iop, unsigned long iova,
218 			  size_t size, size_t granule)
219 {
220 	iop->cfg.tlb->tlb_flush_walk(iova, size, granule, iop->cookie);
221 }
222 
223 static inline void
io_pgtable_tlb_flush_leaf(struct io_pgtable * iop,unsigned long iova,size_t size,size_t granule)224 io_pgtable_tlb_flush_leaf(struct io_pgtable *iop, unsigned long iova,
225 			  size_t size, size_t granule)
226 {
227 	iop->cfg.tlb->tlb_flush_leaf(iova, size, granule, iop->cookie);
228 }
229 
230 static inline void
io_pgtable_tlb_add_page(struct io_pgtable * iop,struct iommu_iotlb_gather * gather,unsigned long iova,size_t granule)231 io_pgtable_tlb_add_page(struct io_pgtable *iop,
232 			struct iommu_iotlb_gather * gather, unsigned long iova,
233 			size_t granule)
234 {
235 	if (iop->cfg.tlb->tlb_add_page)
236 		iop->cfg.tlb->tlb_add_page(gather, iova, granule, iop->cookie);
237 }
238 
239 /**
240  * struct io_pgtable_init_fns - Alloc/free a set of page tables for a
241  *                              particular format.
242  *
243  * @alloc: Allocate a set of page tables described by cfg.
244  * @free:  Free the page tables associated with iop.
245  */
246 struct io_pgtable_init_fns {
247 	struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie);
248 	void (*free)(struct io_pgtable *iop);
249 };
250 
251 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns;
252 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns;
253 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns;
254 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns;
255 extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns;
256 extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns;
257 
258 #endif /* __IO_PGTABLE_H */
259