1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include <drm/drmP.h>
30 #include <drm/drm_atomic_helper.h>
31 #include <drm/drm_crtc.h>
32 #include "intel_drv.h"
33 #include <drm/i915_drm.h>
34 #include "i915_drv.h"
35 #include "dvo.h"
36
37 #define SIL164_ADDR 0x38
38 #define CH7xxx_ADDR 0x76
39 #define TFP410_ADDR 0x38
40 #define NS2501_ADDR 0x38
41
42 static const struct intel_dvo_device intel_dvo_devices[] = {
43 {
44 .type = INTEL_DVO_CHIP_TMDS,
45 .name = "sil164",
46 .dvo_reg = DVOC,
47 .dvo_srcdim_reg = DVOC_SRCDIM,
48 .slave_addr = SIL164_ADDR,
49 .dev_ops = &sil164_ops,
50 },
51 {
52 .type = INTEL_DVO_CHIP_TMDS,
53 .name = "ch7xxx",
54 .dvo_reg = DVOC,
55 .dvo_srcdim_reg = DVOC_SRCDIM,
56 .slave_addr = CH7xxx_ADDR,
57 .dev_ops = &ch7xxx_ops,
58 },
59 {
60 .type = INTEL_DVO_CHIP_TMDS,
61 .name = "ch7xxx",
62 .dvo_reg = DVOC,
63 .dvo_srcdim_reg = DVOC_SRCDIM,
64 .slave_addr = 0x75, /* For some ch7010 */
65 .dev_ops = &ch7xxx_ops,
66 },
67 {
68 .type = INTEL_DVO_CHIP_LVDS,
69 .name = "ivch",
70 .dvo_reg = DVOA,
71 .dvo_srcdim_reg = DVOA_SRCDIM,
72 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
73 .dev_ops = &ivch_ops,
74 },
75 {
76 .type = INTEL_DVO_CHIP_TMDS,
77 .name = "tfp410",
78 .dvo_reg = DVOC,
79 .dvo_srcdim_reg = DVOC_SRCDIM,
80 .slave_addr = TFP410_ADDR,
81 .dev_ops = &tfp410_ops,
82 },
83 {
84 .type = INTEL_DVO_CHIP_LVDS,
85 .name = "ch7017",
86 .dvo_reg = DVOC,
87 .dvo_srcdim_reg = DVOC_SRCDIM,
88 .slave_addr = 0x75,
89 .gpio = GMBUS_PIN_DPB,
90 .dev_ops = &ch7017_ops,
91 },
92 {
93 .type = INTEL_DVO_CHIP_TMDS,
94 .name = "ns2501",
95 .dvo_reg = DVOB,
96 .dvo_srcdim_reg = DVOB_SRCDIM,
97 .slave_addr = NS2501_ADDR,
98 .dev_ops = &ns2501_ops,
99 }
100 };
101
102 struct intel_dvo {
103 struct intel_encoder base;
104
105 struct intel_dvo_device dev;
106
107 struct intel_connector *attached_connector;
108
109 bool panel_wants_dither;
110 };
111
enc_to_dvo(struct intel_encoder * encoder)112 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
113 {
114 return container_of(encoder, struct intel_dvo, base);
115 }
116
intel_attached_dvo(struct drm_connector * connector)117 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
118 {
119 return enc_to_dvo(intel_attached_encoder(connector));
120 }
121
intel_dvo_connector_get_hw_state(struct intel_connector * connector)122 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
123 {
124 struct drm_device *dev = connector->base.dev;
125 struct drm_i915_private *dev_priv = to_i915(dev);
126 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
127 u32 tmp;
128
129 tmp = I915_READ(intel_dvo->dev.dvo_reg);
130
131 if (!(tmp & DVO_ENABLE))
132 return false;
133
134 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
135 }
136
intel_dvo_get_hw_state(struct intel_encoder * encoder,enum pipe * pipe)137 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
138 enum pipe *pipe)
139 {
140 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
141 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
142 u32 tmp;
143
144 tmp = I915_READ(intel_dvo->dev.dvo_reg);
145
146 *pipe = (tmp & DVO_PIPE_SEL_MASK) >> DVO_PIPE_SEL_SHIFT;
147
148 return tmp & DVO_ENABLE;
149 }
150
intel_dvo_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config)151 static void intel_dvo_get_config(struct intel_encoder *encoder,
152 struct intel_crtc_state *pipe_config)
153 {
154 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
155 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
156 u32 tmp, flags = 0;
157
158 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
159
160 tmp = I915_READ(intel_dvo->dev.dvo_reg);
161 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
162 flags |= DRM_MODE_FLAG_PHSYNC;
163 else
164 flags |= DRM_MODE_FLAG_NHSYNC;
165 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
166 flags |= DRM_MODE_FLAG_PVSYNC;
167 else
168 flags |= DRM_MODE_FLAG_NVSYNC;
169
170 pipe_config->base.adjusted_mode.flags |= flags;
171
172 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
173 }
174
intel_disable_dvo(struct intel_encoder * encoder,const struct intel_crtc_state * old_crtc_state,const struct drm_connector_state * old_conn_state)175 static void intel_disable_dvo(struct intel_encoder *encoder,
176 const struct intel_crtc_state *old_crtc_state,
177 const struct drm_connector_state *old_conn_state)
178 {
179 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
180 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
181 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
182 u32 temp = I915_READ(dvo_reg);
183
184 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
185 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
186 I915_READ(dvo_reg);
187 }
188
intel_enable_dvo(struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)189 static void intel_enable_dvo(struct intel_encoder *encoder,
190 const struct intel_crtc_state *pipe_config,
191 const struct drm_connector_state *conn_state)
192 {
193 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
194 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
195 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
196 u32 temp = I915_READ(dvo_reg);
197
198 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
199 &pipe_config->base.mode,
200 &pipe_config->base.adjusted_mode);
201
202 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
203 I915_READ(dvo_reg);
204
205 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
206 }
207
208 static enum drm_mode_status
intel_dvo_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)209 intel_dvo_mode_valid(struct drm_connector *connector,
210 struct drm_display_mode *mode)
211 {
212 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
213 const struct drm_display_mode *fixed_mode =
214 to_intel_connector(connector)->panel.fixed_mode;
215 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
216 int target_clock = mode->clock;
217
218 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
219 return MODE_NO_DBLESCAN;
220
221 /* XXX: Validate clock range */
222
223 if (fixed_mode) {
224 if (mode->hdisplay > fixed_mode->hdisplay)
225 return MODE_PANEL;
226 if (mode->vdisplay > fixed_mode->vdisplay)
227 return MODE_PANEL;
228
229 target_clock = fixed_mode->clock;
230 }
231
232 if (target_clock > max_dotclk)
233 return MODE_CLOCK_HIGH;
234
235 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
236 }
237
intel_dvo_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state)238 static bool intel_dvo_compute_config(struct intel_encoder *encoder,
239 struct intel_crtc_state *pipe_config,
240 struct drm_connector_state *conn_state)
241 {
242 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
243 const struct drm_display_mode *fixed_mode =
244 intel_dvo->attached_connector->panel.fixed_mode;
245 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
246
247 /*
248 * If we have timings from the BIOS for the panel, put them in
249 * to the adjusted mode. The CRTC will be set up for this mode,
250 * with the panel scaling set up to source from the H/VDisplay
251 * of the original mode.
252 */
253 if (fixed_mode)
254 intel_fixed_panel_mode(fixed_mode, adjusted_mode);
255
256 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
257 return false;
258
259 return true;
260 }
261
intel_dvo_pre_enable(struct intel_encoder * encoder,const struct intel_crtc_state * pipe_config,const struct drm_connector_state * conn_state)262 static void intel_dvo_pre_enable(struct intel_encoder *encoder,
263 const struct intel_crtc_state *pipe_config,
264 const struct drm_connector_state *conn_state)
265 {
266 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
267 struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
268 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
269 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
270 int pipe = crtc->pipe;
271 u32 dvo_val;
272 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg;
273 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg;
274
275 /* Save the data order, since I don't know what it should be set to. */
276 dvo_val = I915_READ(dvo_reg) &
277 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
278 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
279 DVO_BLANK_ACTIVE_HIGH;
280
281 dvo_val |= DVO_PIPE_SEL(pipe);
282 dvo_val |= DVO_PIPE_STALL;
283 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
284 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
285 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
286 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
287
288 /*I915_WRITE(DVOB_SRCDIM,
289 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
290 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
291 I915_WRITE(dvo_srcdim_reg,
292 (adjusted_mode->crtc_hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
293 (adjusted_mode->crtc_vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
294 /*I915_WRITE(DVOB, dvo_val);*/
295 I915_WRITE(dvo_reg, dvo_val);
296 }
297
298 static enum drm_connector_status
intel_dvo_detect(struct drm_connector * connector,bool force)299 intel_dvo_detect(struct drm_connector *connector, bool force)
300 {
301 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
302 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
303 connector->base.id, connector->name);
304 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
305 }
306
intel_dvo_get_modes(struct drm_connector * connector)307 static int intel_dvo_get_modes(struct drm_connector *connector)
308 {
309 struct drm_i915_private *dev_priv = to_i915(connector->dev);
310 const struct drm_display_mode *fixed_mode =
311 to_intel_connector(connector)->panel.fixed_mode;
312
313 /*
314 * We should probably have an i2c driver get_modes function for those
315 * devices which will have a fixed set of modes determined by the chip
316 * (TV-out, for example), but for now with just TMDS and LVDS,
317 * that's not the case.
318 */
319 intel_ddc_get_modes(connector,
320 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
321 if (!list_empty(&connector->probed_modes))
322 return 1;
323
324 if (fixed_mode) {
325 struct drm_display_mode *mode;
326 mode = drm_mode_duplicate(connector->dev, fixed_mode);
327 if (mode) {
328 drm_mode_probed_add(connector, mode);
329 return 1;
330 }
331 }
332
333 return 0;
334 }
335
intel_dvo_destroy(struct drm_connector * connector)336 static void intel_dvo_destroy(struct drm_connector *connector)
337 {
338 drm_connector_cleanup(connector);
339 intel_panel_fini(&to_intel_connector(connector)->panel);
340 kfree(connector);
341 }
342
343 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
344 .detect = intel_dvo_detect,
345 .late_register = intel_connector_register,
346 .early_unregister = intel_connector_unregister,
347 .destroy = intel_dvo_destroy,
348 .fill_modes = drm_helper_probe_single_connector_modes,
349 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
350 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
351 };
352
353 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
354 .mode_valid = intel_dvo_mode_valid,
355 .get_modes = intel_dvo_get_modes,
356 };
357
intel_dvo_enc_destroy(struct drm_encoder * encoder)358 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
359 {
360 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
361
362 if (intel_dvo->dev.dev_ops->destroy)
363 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
364
365 intel_encoder_destroy(encoder);
366 }
367
368 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
369 .destroy = intel_dvo_enc_destroy,
370 };
371
372 /*
373 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
374 *
375 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
376 * chip being on DVOB/C and having multiple pipes.
377 */
378 static struct drm_display_mode *
intel_dvo_get_current_mode(struct intel_encoder * encoder)379 intel_dvo_get_current_mode(struct intel_encoder *encoder)
380 {
381 struct drm_display_mode *mode;
382
383 mode = intel_encoder_current_mode(encoder);
384 if (mode) {
385 DRM_DEBUG_KMS("using current (BIOS) mode: ");
386 drm_mode_debug_printmodeline(mode);
387 mode->type |= DRM_MODE_TYPE_PREFERRED;
388 }
389
390 return mode;
391 }
392
intel_dvo_port(i915_reg_t dvo_reg)393 static enum port intel_dvo_port(i915_reg_t dvo_reg)
394 {
395 if (i915_mmio_reg_equal(dvo_reg, DVOA))
396 return PORT_A;
397 else if (i915_mmio_reg_equal(dvo_reg, DVOB))
398 return PORT_B;
399 else
400 return PORT_C;
401 }
402
intel_dvo_init(struct drm_i915_private * dev_priv)403 void intel_dvo_init(struct drm_i915_private *dev_priv)
404 {
405 struct intel_encoder *intel_encoder;
406 struct intel_dvo *intel_dvo;
407 struct intel_connector *intel_connector;
408 int i;
409 int encoder_type = DRM_MODE_ENCODER_NONE;
410
411 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
412 if (!intel_dvo)
413 return;
414
415 intel_connector = intel_connector_alloc();
416 if (!intel_connector) {
417 kfree(intel_dvo);
418 return;
419 }
420
421 intel_dvo->attached_connector = intel_connector;
422
423 intel_encoder = &intel_dvo->base;
424
425 intel_encoder->disable = intel_disable_dvo;
426 intel_encoder->enable = intel_enable_dvo;
427 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
428 intel_encoder->get_config = intel_dvo_get_config;
429 intel_encoder->compute_config = intel_dvo_compute_config;
430 intel_encoder->pre_enable = intel_dvo_pre_enable;
431 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
432
433 /* Now, try to find a controller */
434 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
435 struct drm_connector *connector = &intel_connector->base;
436 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
437 struct i2c_adapter *i2c;
438 int gpio;
439 bool dvoinit;
440 enum pipe pipe;
441 u32 dpll[I915_MAX_PIPES];
442 enum port port;
443
444 /*
445 * Allow the I2C driver info to specify the GPIO to be used in
446 * special cases, but otherwise default to what's defined
447 * in the spec.
448 */
449 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
450 gpio = dvo->gpio;
451 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
452 gpio = GMBUS_PIN_SSC;
453 else
454 gpio = GMBUS_PIN_DPB;
455
456 /*
457 * Set up the I2C bus necessary for the chip we're probing.
458 * It appears that everything is on GPIOE except for panels
459 * on i830 laptops, which are on GPIOB (DVOA).
460 */
461 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
462
463 intel_dvo->dev = *dvo;
464
465 /*
466 * GMBUS NAK handling seems to be unstable, hence let the
467 * transmitter detection run in bit banging mode for now.
468 */
469 intel_gmbus_force_bit(i2c, true);
470
471 /*
472 * ns2501 requires the DVO 2x clock before it will
473 * respond to i2c accesses, so make sure we have
474 * have the clock enabled before we attempt to
475 * initialize the device.
476 */
477 for_each_pipe(dev_priv, pipe) {
478 dpll[pipe] = I915_READ(DPLL(pipe));
479 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
480 }
481
482 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
483
484 /* restore the DVO 2x clock state to original */
485 for_each_pipe(dev_priv, pipe) {
486 I915_WRITE(DPLL(pipe), dpll[pipe]);
487 }
488
489 intel_gmbus_force_bit(i2c, false);
490
491 if (!dvoinit)
492 continue;
493
494 port = intel_dvo_port(dvo->dvo_reg);
495 drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
496 &intel_dvo_enc_funcs, encoder_type,
497 "DVO %c", port_name(port));
498
499 intel_encoder->type = INTEL_OUTPUT_DVO;
500 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
501 intel_encoder->port = port;
502 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
503
504 switch (dvo->type) {
505 case INTEL_DVO_CHIP_TMDS:
506 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
507 (1 << INTEL_OUTPUT_DVO);
508 drm_connector_init(&dev_priv->drm, connector,
509 &intel_dvo_connector_funcs,
510 DRM_MODE_CONNECTOR_DVII);
511 encoder_type = DRM_MODE_ENCODER_TMDS;
512 break;
513 case INTEL_DVO_CHIP_LVDS:
514 intel_encoder->cloneable = 0;
515 drm_connector_init(&dev_priv->drm, connector,
516 &intel_dvo_connector_funcs,
517 DRM_MODE_CONNECTOR_LVDS);
518 encoder_type = DRM_MODE_ENCODER_LVDS;
519 break;
520 }
521
522 drm_connector_helper_add(connector,
523 &intel_dvo_connector_helper_funcs);
524 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
525 connector->interlace_allowed = false;
526 connector->doublescan_allowed = false;
527
528 intel_connector_attach_encoder(intel_connector, intel_encoder);
529 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
530 /*
531 * For our LVDS chipsets, we should hopefully be able
532 * to dig the fixed panel mode out of the BIOS data.
533 * However, it's in a different format from the BIOS
534 * data on chipsets with integrated LVDS (stored in AIM
535 * headers, likely), so for now, just get the current
536 * mode being output through DVO.
537 */
538 intel_panel_init(&intel_connector->panel,
539 intel_dvo_get_current_mode(intel_encoder),
540 NULL);
541 intel_dvo->panel_wants_dither = true;
542 }
543
544 return;
545 }
546
547 kfree(intel_dvo);
548 kfree(intel_connector);
549 }
550
