1 /* 2 * shmob_drm.h -- SH Mobile DRM driver 3 * 4 * Copyright (C) 2012 Renesas Corporation 5 * 6 * Laurent Pinchart (laurent.pinchart@ideasonboard.com) 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 */ 13 14 #ifndef __SHMOB_DRM_H__ 15 #define __SHMOB_DRM_H__ 16 17 #include <linux/kernel.h> 18 19 #include <drm/drm_mode.h> 20 21 enum shmob_drm_clk_source { 22 SHMOB_DRM_CLK_BUS, 23 SHMOB_DRM_CLK_PERIPHERAL, 24 SHMOB_DRM_CLK_EXTERNAL, 25 }; 26 27 enum shmob_drm_interface { 28 SHMOB_DRM_IFACE_RGB8, /* 24bpp, 8:8:8 */ 29 SHMOB_DRM_IFACE_RGB9, /* 18bpp, 9:9 */ 30 SHMOB_DRM_IFACE_RGB12A, /* 24bpp, 12:12 */ 31 SHMOB_DRM_IFACE_RGB12B, /* 12bpp */ 32 SHMOB_DRM_IFACE_RGB16, /* 16bpp */ 33 SHMOB_DRM_IFACE_RGB18, /* 18bpp */ 34 SHMOB_DRM_IFACE_RGB24, /* 24bpp */ 35 SHMOB_DRM_IFACE_YUV422, /* 16bpp */ 36 SHMOB_DRM_IFACE_SYS8A, /* 24bpp, 8:8:8 */ 37 SHMOB_DRM_IFACE_SYS8B, /* 18bpp, 8:8:2 */ 38 SHMOB_DRM_IFACE_SYS8C, /* 18bpp, 2:8:8 */ 39 SHMOB_DRM_IFACE_SYS8D, /* 16bpp, 8:8 */ 40 SHMOB_DRM_IFACE_SYS9, /* 18bpp, 9:9 */ 41 SHMOB_DRM_IFACE_SYS12, /* 24bpp, 12:12 */ 42 SHMOB_DRM_IFACE_SYS16A, /* 16bpp */ 43 SHMOB_DRM_IFACE_SYS16B, /* 18bpp, 16:2 */ 44 SHMOB_DRM_IFACE_SYS16C, /* 18bpp, 2:16 */ 45 SHMOB_DRM_IFACE_SYS18, /* 18bpp */ 46 SHMOB_DRM_IFACE_SYS24, /* 24bpp */ 47 }; 48 49 struct shmob_drm_backlight_data { 50 const char *name; 51 int max_brightness; 52 int (*get_brightness)(void); 53 int (*set_brightness)(int brightness); 54 }; 55 56 struct shmob_drm_panel_data { 57 unsigned int width_mm; /* Panel width in mm */ 58 unsigned int height_mm; /* Panel height in mm */ 59 struct drm_mode_modeinfo mode; 60 }; 61 62 struct shmob_drm_sys_interface_data { 63 unsigned int read_latch:6; 64 unsigned int read_setup:8; 65 unsigned int read_cycle:8; 66 unsigned int read_strobe:8; 67 unsigned int write_setup:8; 68 unsigned int write_cycle:8; 69 unsigned int write_strobe:8; 70 unsigned int cs_setup:3; 71 unsigned int vsync_active_high:1; 72 unsigned int vsync_dir_input:1; 73 }; 74 75 #define SHMOB_DRM_IFACE_FL_DWPOL (1 << 0) /* Rising edge dot clock data latch */ 76 #define SHMOB_DRM_IFACE_FL_DIPOL (1 << 1) /* Active low display enable */ 77 #define SHMOB_DRM_IFACE_FL_DAPOL (1 << 2) /* Active low display data */ 78 #define SHMOB_DRM_IFACE_FL_HSCNT (1 << 3) /* Disable HSYNC during VBLANK */ 79 #define SHMOB_DRM_IFACE_FL_DWCNT (1 << 4) /* Disable dotclock during blanking */ 80 81 struct shmob_drm_interface_data { 82 enum shmob_drm_interface interface; 83 struct shmob_drm_sys_interface_data sys; 84 unsigned int clk_div; 85 unsigned int flags; 86 }; 87 88 struct shmob_drm_platform_data { 89 enum shmob_drm_clk_source clk_source; 90 struct shmob_drm_interface_data iface; 91 struct shmob_drm_panel_data panel; 92 struct shmob_drm_backlight_data backlight; 93 }; 94 95 #endif /* __SHMOB_DRM_H__ */ 96
