1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright 2013 Freescale Semiconductor, Inc. 4 * 5 * Author: Fabio Estevam <fabio.estevam@freescale.com> 6 */ 7 8#include <dt-bindings/gpio/gpio.h> 9 10/ { 11 sound { 12 compatible = "fsl,imx6-wandboard-sgtl5000", 13 "fsl,imx-audio-sgtl5000"; 14 model = "imx6-wandboard-sgtl5000"; 15 ssi-controller = <&ssi1>; 16 audio-codec = <&codec>; 17 audio-routing = 18 "MIC_IN", "Mic Jack", 19 "Mic Jack", "Mic Bias", 20 "Headphone Jack", "HP_OUT"; 21 mux-int-port = <1>; 22 mux-ext-port = <3>; 23 }; 24 25 sound-spdif { 26 compatible = "fsl,imx-audio-spdif"; 27 model = "imx-spdif"; 28 spdif-controller = <&spdif>; 29 spdif-out; 30 }; 31 32 reg_2p5v: regulator-2p5v { 33 compatible = "regulator-fixed"; 34 regulator-name = "2P5V"; 35 regulator-min-microvolt = <2500000>; 36 regulator-max-microvolt = <2500000>; 37 regulator-always-on; 38 }; 39 40 reg_3p3v: regulator-3p3v { 41 compatible = "regulator-fixed"; 42 regulator-name = "3P3V"; 43 regulator-min-microvolt = <3300000>; 44 regulator-max-microvolt = <3300000>; 45 regulator-always-on; 46 }; 47 48 reg_usb_otg_vbus: regulator-usbotgvbus { 49 compatible = "regulator-fixed"; 50 regulator-name = "usb_otg_vbus"; 51 regulator-min-microvolt = <5000000>; 52 regulator-max-microvolt = <5000000>; 53 pinctrl-names = "default"; 54 pinctrl-0 = <&pinctrl_usbotgvbus>; 55 gpio = <&gpio3 22 GPIO_ACTIVE_LOW>; 56 }; 57}; 58 59&audmux { 60 pinctrl-names = "default"; 61 pinctrl-0 = <&pinctrl_audmux>; 62 status = "okay"; 63}; 64 65&hdmi { 66 ddc-i2c-bus = <&i2c1>; 67 status = "okay"; 68}; 69 70&i2c1 { 71 clock-frequency = <100000>; 72 pinctrl-names = "default"; 73 pinctrl-0 = <&pinctrl_i2c1>; 74 status = "okay"; 75}; 76 77&i2c2 { 78 clock-frequency = <100000>; 79 pinctrl-names = "default"; 80 pinctrl-0 = <&pinctrl_i2c2>; 81 status = "okay"; 82 83 codec: sgtl5000@a { 84 pinctrl-names = "default"; 85 pinctrl-0 = <&pinctrl_mclk>; 86 compatible = "fsl,sgtl5000"; 87 reg = <0x0a>; 88 clocks = <&clks IMX6QDL_CLK_CKO>; 89 VDDA-supply = <®_2p5v>; 90 VDDIO-supply = <®_3p3v>; 91 lrclk-strength = <3>; 92 }; 93}; 94 95&iomuxc { 96 pinctrl-names = "default"; 97 98 imx6qdl-wandboard { 99 100 pinctrl_audmux: audmuxgrp { 101 fsl,pins = < 102 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 103 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 104 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 105 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 106 >; 107 }; 108 109 pinctrl_enet: enetgrp { 110 fsl,pins = < 111 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 112 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 113 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 114 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 115 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 116 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 117 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 118 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 119 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 120 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 121 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 122 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 123 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 124 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 125 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 126 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 127 MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1 128 >; 129 }; 130 131 pinctrl_i2c1: i2c1grp { 132 fsl,pins = < 133 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 134 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 135 >; 136 }; 137 138 pinctrl_i2c2: i2c2grp { 139 fsl,pins = < 140 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 141 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 142 >; 143 }; 144 145 pinctrl_mclk: mclkgrp { 146 fsl,pins = < 147 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 148 >; 149 }; 150 151 pinctrl_spdif: spdifgrp { 152 fsl,pins = < 153 MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0 154 >; 155 }; 156 157 pinctrl_uart1: uart1grp { 158 fsl,pins = < 159 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 160 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 161 >; 162 }; 163 164 pinctrl_uart3: uart3grp { 165 fsl,pins = < 166 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 167 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 168 MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 169 MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 170 >; 171 }; 172 173 pinctrl_usbotg: usbotggrp { 174 fsl,pins = < 175 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 176 >; 177 }; 178 179 pinctrl_usbotgvbus: usbotgvbusgrp { 180 fsl,pins = < 181 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x130b0 182 >; 183 }; 184 185 pinctrl_usdhc1: usdhc1grp { 186 fsl,pins = < 187 MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059 188 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059 189 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059 190 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059 191 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059 192 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059 193 >; 194 }; 195 196 pinctrl_usdhc2: usdhc2grp { 197 fsl,pins = < 198 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 199 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 200 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 201 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 202 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 203 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 204 >; 205 }; 206 207 pinctrl_usdhc3: usdhc3grp { 208 fsl,pins = < 209 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 210 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 211 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 212 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 213 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 214 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 215 >; 216 }; 217 }; 218}; 219 220&fec { 221 pinctrl-names = "default"; 222 pinctrl-0 = <&pinctrl_enet>; 223 phy-mode = "rgmii"; 224 phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; 225 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 226 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 227 fsl,err006687-workaround-present; 228 status = "okay"; 229}; 230 231&spdif { 232 pinctrl-names = "default"; 233 pinctrl-0 = <&pinctrl_spdif>; 234 status = "okay"; 235}; 236 237&ssi1 { 238 status = "okay"; 239}; 240 241&uart1 { 242 pinctrl-names = "default"; 243 pinctrl-0 = <&pinctrl_uart1>; 244 status = "okay"; 245}; 246 247&uart3 { 248 pinctrl-names = "default"; 249 pinctrl-0 = <&pinctrl_uart3>; 250 uart-has-rtscts; 251 status = "okay"; 252}; 253 254&usbh1 { 255 status = "okay"; 256}; 257 258&usbotg { 259 vbus-supply = <®_usb_otg_vbus>; 260 pinctrl-names = "default"; 261 pinctrl-0 = <&pinctrl_usbotg>; 262 disable-over-current; 263 dr_mode = "otg"; 264 status = "okay"; 265}; 266 267&usdhc1 { 268 pinctrl-names = "default"; 269 pinctrl-0 = <&pinctrl_usdhc1>; 270 cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 271 status = "okay"; 272}; 273 274&usdhc3 { 275 pinctrl-names = "default"; 276 pinctrl-0 = <&pinctrl_usdhc3>; 277 cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>; 278 status = "okay"; 279}; 280