1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2018 PHYTEC Messtechnik GmbH
4 * Author: Christian Hemp <c.hemp@phytec.de>
5 */
6
7
8/ {
9	aliases {
10		rtc0 = &i2c_rtc;
11	};
12
13	backlight: backlight {
14		compatible = "pwm-backlight";
15		brightness-levels = <0 4 8 16 32 64 128 255>;
16		default-brightness-level = <7>;
17		power-supply = <&reg_backlight>;
18		pwms = <&pwm1 0 5000000>;
19		status = "okay";
20	};
21
22	gpio_leds: leds {
23		compatible = "gpio-leds";
24		pinctrl-names = "default";
25		pinctrl-0 = <&pinctrl_gpioleds>;
26		status = "disabled";
27
28		red {
29			label = "phyboard-mira:red";
30			gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>;
31		};
32
33		green {
34			label = "phyboard-mira:green";
35			gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>;
36		};
37
38		blue {
39			label = "phyboard-mira:blue";
40			gpios = <&gpio5 24 GPIO_ACTIVE_HIGH>;
41			linux,default-trigger = "mmc0";
42		};
43	};
44
45	reg_backlight: regulator-backlight {
46		compatible = "regulator-fixed";
47		regulator-name = "backlight_3v3";
48		regulator-min-microvolt = <3300000>;
49		regulator-max-microvolt = <3300000>;
50		regulator-always-on;
51	};
52
53	reg_en_switch: regulator-en-switch {
54		compatible = "regulator-fixed";
55		pinctrl-names = "default";
56		pinctrl-0 = <&pinctrl_en_switch>;
57		regulator-name = "Enable Switch";
58		regulator-min-microvolt = <3300000>;
59		regulator-max-microvolt = <3300000>;
60		enable-active-high;
61		gpio = <&gpio3 4 GPIO_ACTIVE_HIGH>;
62		regulator-always-on;
63	};
64
65	reg_flexcan1: regulator-flexcan1 {
66		compatible = "regulator-fixed";
67		pinctrl-names = "default";
68		pinctrl-0 = <&pinctrl_flexcan1_en>;
69		regulator-name = "flexcan1-reg";
70		regulator-min-microvolt = <1500000>;
71		regulator-max-microvolt = <1500000>;
72		gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>;
73		enable-active-high;
74	};
75
76	reg_panel: regulator-panel {
77		compatible = "regulator-fixed";
78		regulator-name = "panel-power-supply";
79		regulator-min-microvolt = <12000000>;
80		regulator-max-microvolt = <12000000>;
81		regulator-always-on;
82	};
83
84	reg_pcie: regulator-pcie {
85		compatible = "regulator-fixed";
86		pinctrl-names = "default";
87		pinctrl-0 = <&pinctrl_pcie_reg>;
88		regulator-name = "mPCIe_1V5";
89		regulator-min-microvolt = <1500000>;
90		regulator-max-microvolt = <1500000>;
91		gpio = <&gpio3 0 GPIO_ACTIVE_HIGH>;
92		enable-active-high;
93	};
94
95	reg_usb_h1_vbus: usb-h1-vbus {
96		compatible = "regulator-fixed";
97		pinctrl-names = "default";
98		pinctrl-0 = <&pinctrl_usbh1_vbus>;
99		regulator-name = "usb_h1_vbus";
100		regulator-min-microvolt = <5000000>;
101		regulator-max-microvolt = <5000000>;
102		gpio = <&gpio2 18 GPIO_ACTIVE_HIGH>;
103		enable-active-high;
104	};
105
106	reg_usbotg_vbus: usbotg-vbus {
107		compatible = "regulator-fixed";
108		pinctrl-names = "default";
109		pinctrl-0 = <&pinctrl_usbotg_vbus>;
110		regulator-name = "usb_otg_vbus";
111		regulator-min-microvolt = <5000000>;
112		regulator-max-microvolt = <5000000>;
113		gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
114		enable-active-high;
115	};
116
117	panel {
118		compatible = "auo,g104sn02";
119		pinctrl-names = "default";
120		pinctrl-0 = <&pinctrl_panel_en>;
121		power-supply = <&reg_panel>;
122		enable-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
123		backlight = <&backlight>;
124
125		port {
126			panel_in: endpoint {
127				remote-endpoint = <&lvds0_out>;
128			};
129		};
130	};
131};
132
133&can1 {
134	pinctrl-names = "default";
135	pinctrl-0 = <&pinctrl_flexcan1>;
136	xceiver-supply = <&reg_flexcan1>;
137	status = "disabled";
138};
139
140&hdmi {
141	pinctrl-names = "default";
142	pinctrl-0 = <&pinctrl_hdmicec>;
143	ddc-i2c-bus = <&i2c2>;
144	status = "disabled";
145};
146
147&i2c1 {
148	pinctrl-names = "default";
149	pinctrl-0 = <&pinctrl_i2c1>;
150	clock-frequency = <400000>;
151	status = "disabled";
152
153	stmpe: touchctrl@44 {
154		compatible = "st,stmpe811";
155		pinctrl-names = "default";
156		pinctrl-0 = <&pinctrl_stmpe>;
157		reg = <0x44>;
158		interrupt-parent = <&gpio7>;
159		interrupts = <12 IRQ_TYPE_NONE>;
160		status = "disabled";
161
162		stmpe_touchscreen {
163			compatible = "st,stmpe-ts";
164			st,sample-time = <4>;
165			st,mod-12b = <1>;
166			st,ref-sel = <0>;
167			st,adc-freq = <1>;
168			st,ave-ctrl = <1>;
169			st,touch-det-delay = <2>;
170			st,settling = <2>;
171			st,fraction-z = <7>;
172			st,i-drive = <1>;
173		};
174	};
175
176	i2c_rtc: rtc@68 {
177		compatible = "microcrystal,rv4162";
178		pinctrl-names = "default";
179		pinctrl-0 = <&pinctrl_rtc_int>;
180		reg = <0x68>;
181		interrupt-parent = <&gpio7>;
182		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
183		status = "disabled";
184	};
185};
186
187&i2c2 {
188	pinctrl-names = "default";
189	pinctrl-0 = <&pinctrl_i2c2>;
190	clock-frequency = <100000>;
191	status = "disabled";
192};
193
194&ldb {
195	status = "okay";
196
197	lvds-channel@0 {
198		fsl,data-mapping = "spwg";
199		fsl,data-width = <24>;
200		status = "disabled";
201
202		port@4 {
203			reg = <4>;
204
205			lvds0_out: endpoint {
206				remote-endpoint = <&panel_in>;
207			};
208		};
209	};
210};
211
212&pcie {
213	pinctrl-names = "default";
214	pinctrl-0 = <&pinctrl_pcie>;
215	reset-gpio = <&gpio2 25 GPIO_ACTIVE_LOW>;
216	vpcie-supply = <&reg_pcie>;
217	status = "disabled";
218};
219
220&pwm1 {
221	#pwm-cells = <2>;
222	pinctrl-names = "default";
223	pinctrl-0 = <&pinctrl_pwm1>;
224	status = "okay";
225};
226
227&uart2 {
228	pinctrl-names = "default";
229	pinctrl-0 = <&pinctrl_uart2>;
230	status = "okay";
231};
232
233&uart3 {
234	pinctrl-names = "default";
235	pinctrl-0 = <&pinctrl_uart3>;
236	uart-has-rtscts;
237	status = "disabled";
238};
239
240&usbh1 {
241	vbus-supply = <&reg_usb_h1_vbus>;
242	disable-over-current;
243	status = "disabled";
244};
245
246&usbotg {
247	pinctrl-names = "default";
248	pinctrl-0 = <&pinctrl_usbotg>;
249	vbus-supply = <&reg_usbotg_vbus>;
250	disable-over-current;
251	status = "disabled";
252};
253
254&usdhc1 {
255	pinctrl-names = "default";
256	pinctrl-0 = <&pinctrl_usdhc1>;
257	cd-gpios = <&gpio6 31 GPIO_ACTIVE_LOW>;
258	no-1-8-v;
259	status = "disabled";
260};
261
262&iomuxc {
263	pinctrl_panel_en: panelen1grp {
264		fsl,pins = <
265			MX6QDL_PAD_EIM_EB0__GPIO2_IO28		0xb0b1
266		>;
267	};
268
269	pinctrl_en_switch: enswitchgrp {
270		fsl,pins = <
271			MX6QDL_PAD_EIM_DA4__GPIO3_IO04		0xb0b1
272		>;
273	};
274
275	pinctrl_flexcan1: flexcan1grp {
276		fsl,pins = <
277			MX6QDL_PAD_GPIO_7__FLEXCAN1_TX		0x1b0b0
278			MX6QDL_PAD_GPIO_8__FLEXCAN1_RX		0x1b0b0
279		>;
280	};
281
282	pinctrl_flexcan1_en: flexcan1engrp {
283		fsl,pins = <
284			MX6QDL_PAD_EIM_A18__GPIO2_IO20		0xb0b1
285		>;
286	};
287
288	pinctrl_gpioleds: gpioledsgrp {
289		fsl,pins = <
290			MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22	0x1b0b0
291			MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23	0x1b0b0
292			MX6QDL_PAD_CSI0_DAT6__GPIO5_IO24	0x1b0b0
293		>;
294	};
295
296	pinctrl_hdmicec: hdmicecgrp {
297		fsl,pins = <
298			MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE	0x1f8b0
299		>;
300	};
301
302	pinctrl_i2c2: i2c2grp {
303		fsl,pins = <
304			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
305			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
306		>;
307	};
308
309	pinctrl_i2c1: i2c1grp {
310		fsl,pins = <
311			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
312			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
313		>;
314	};
315
316	pinctrl_pcie: pciegrp {
317		fsl,pins = <
318			MX6QDL_PAD_EIM_OE__GPIO2_IO25		0xb0b1
319		>;
320	};
321
322	pinctrl_pcie_reg: pciereggrp {
323		fsl,pins = <
324			MX6QDL_PAD_EIM_DA0__GPIO3_IO00		0xb0b1
325		>;
326	};
327
328	pinctrl_pwm1: pwm1grp {
329		fsl,pins = <
330			MX6QDL_PAD_GPIO_9__PWM1_OUT		0x1b0b1
331		>;
332	};
333
334	pinctrl_rtc_int: rtcintgrp {
335		fsl,pins = <
336			MX6QDL_PAD_SD3_RST__GPIO7_IO08		0x1b0b0
337		>;
338	};
339
340	pinctrl_stmpe: stmpegrp {
341		fsl,pins = <
342			MX6QDL_PAD_GPIO_17__GPIO7_IO12		0x1b0b0
343		>;
344	};
345
346	pinctrl_uart2: uart2grp {
347		fsl,pins = <
348			MX6QDL_PAD_EIM_D26__UART2_TX_DATA	0x1b0b1
349			MX6QDL_PAD_EIM_D27__UART2_RX_DATA	0x1b0b1
350		>;
351	};
352
353	pinctrl_uart3: uart3grp {
354		fsl,pins = <
355			MX6QDL_PAD_EIM_EB3__UART3_CTS_B		0x1b0b1
356			MX6QDL_PAD_EIM_D23__UART3_RTS_B		0x1b0b1
357			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
358			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
359		>;
360	};
361
362	pinctrl_usbh1_vbus: usbh1vbusgrp {
363		fsl,pins = <
364			MX6QDL_PAD_EIM_A20__GPIO2_IO18		0xb0b1
365		>;
366	};
367
368	pinctrl_usbotg: usbotggrp {
369		fsl,pins = <
370			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
371		>;
372	};
373
374	pinctrl_usbotg_vbus: usbotgvbusgrp {
375		fsl,pins = <
376			MX6QDL_PAD_EIM_A19__GPIO2_IO19		0xb0b1
377		>;
378	};
379
380	pinctrl_usdhc1: usdhc1grp {
381		fsl,pins = <
382			MX6QDL_PAD_SD1_CMD__SD1_CMD		0x170f9
383			MX6QDL_PAD_SD1_CLK__SD1_CLK		0x100f9
384			MX6QDL_PAD_SD1_DAT0__SD1_DATA0		0x170f9
385			MX6QDL_PAD_SD1_DAT1__SD1_DATA1		0x170f9
386			MX6QDL_PAD_SD1_DAT2__SD1_DATA2		0x170f9
387			MX6QDL_PAD_SD1_DAT3__SD1_DATA3		0x170f9
388			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31		0xb0b1  /* CD */
389		>;
390	};
391};
392