1 /* SPDX-License-Identifier: GPL-2.0 */
2 /******************************************************************************
3  *
4  * Copyright(c) 2016  Realtek Corporation.
5  *
6  * Contact Information:
7  * wlanfae <wlanfae@realtek.com>
8  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
9  * Hsinchu 300, Taiwan.
10  *
11  * Larry Finger <Larry.Finger@lwfinger.net>
12  *
13  *****************************************************************************/
14 #ifndef _HALMAC_TX_BD_NIC_H_
15 #define _HALMAC_TX_BD_NIC_H_
16 
17 /*TXBD_DW0*/
18 
19 #define SET_TX_BD_OWN(__tx_bd, __value)                                        \
20 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x00, 31, 1, __value)
21 #define GET_TX_BD_OWN(__tx_bd) LE_BITS_TO_4BYTE(__tx_bd + 0x00, 31, 1)
22 #define SET_TX_BD_PSB(__tx_bd, __value)                                        \
23 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x00, 16, 8, __value)
24 #define GET_TX_BD_PSB(__tx_bd) LE_BITS_TO_4BYTE(__tx_bd + 0x00, 16, 8)
25 #define SET_TX_BD_TX_BUFF_SIZE0(__tx_bd, __value)                              \
26 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x00, 0, 16, __value)
27 #define GET_TX_BD_TX_BUFF_SIZE0(__tx_bd) LE_BITS_TO_4BYTE(__tx_bd + 0x00, 0, 16)
28 
29 /*TXBD_DW1*/
30 
31 #define SET_TX_BD_PHYSICAL_ADDR0_LOW(__tx_bd, __value)                         \
32 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x04, 0, 32, __value)
33 #define GET_TX_BD_PHYSICAL_ADDR0_LOW(__tx_bd)                                  \
34 	LE_BITS_TO_4BYTE(__tx_bd + 0x04, 0, 32)
35 
36 /*TXBD_DW2*/
37 
38 #define SET_TX_BD_PHYSICAL_ADDR0_HIGH(__tx_bd, __value)                        \
39 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x08, 0, 32, __value)
40 #define GET_TX_BD_PHYSICAL_ADDR0_HIGH(__tx_bd)                                 \
41 	LE_BITS_TO_4BYTE(__tx_bd + 0x08, 0, 32)
42 
43 /*TXBD_DW4*/
44 
45 #define SET_TX_BD_A1(__tx_bd, __value)                                         \
46 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x10, 31, 1, __value)
47 #define GET_TX_BD_A1(__tx_bd) LE_BITS_TO_4BYTE(__tx_bd + 0x10, 31, 1)
48 #define SET_TX_BD_TX_BUFF_SIZE1(__tx_bd, __value)                              \
49 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x10, 0, 16, __value)
50 #define GET_TX_BD_TX_BUFF_SIZE1(__tx_bd) LE_BITS_TO_4BYTE(__tx_bd + 0x10, 0, 16)
51 
52 /*TXBD_DW5*/
53 
54 #define SET_TX_BD_PHYSICAL_ADDR1_LOW(__tx_bd, __value)                         \
55 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x14, 0, 32, __value)
56 #define GET_TX_BD_PHYSICAL_ADDR1_LOW(__tx_bd)                                  \
57 	LE_BITS_TO_4BYTE(__tx_bd + 0x14, 0, 32)
58 
59 /*TXBD_DW6*/
60 
61 #define SET_TX_BD_PHYSICAL_ADDR1_HIGH(__tx_bd, __value)                        \
62 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x18, 0, 32, __value)
63 #define GET_TX_BD_PHYSICAL_ADDR1_HIGH(__tx_bd)                                 \
64 	LE_BITS_TO_4BYTE(__tx_bd + 0x18, 0, 32)
65 
66 /*TXBD_DW8*/
67 
68 #define SET_TX_BD_A2(__tx_bd, __value)                                         \
69 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x20, 31, 1, __value)
70 #define GET_TX_BD_A2(__tx_bd) LE_BITS_TO_4BYTE(__tx_bd + 0x20, 31, 1)
71 #define SET_TX_BD_TX_BUFF_SIZE2(__tx_bd, __value)                              \
72 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x20, 0, 16, __value)
73 #define GET_TX_BD_TX_BUFF_SIZE2(__tx_bd) LE_BITS_TO_4BYTE(__tx_bd + 0x20, 0, 16)
74 
75 /*TXBD_DW9*/
76 
77 #define SET_TX_BD_PHYSICAL_ADDR2_LOW(__tx_bd, __value)                         \
78 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x24, 0, 32, __value)
79 #define GET_TX_BD_PHYSICAL_ADDR2_LOW(__tx_bd)                                  \
80 	LE_BITS_TO_4BYTE(__tx_bd + 0x24, 0, 32)
81 
82 /*TXBD_DW10*/
83 
84 #define SET_TX_BD_PHYSICAL_ADDR2_HIGH(__tx_bd, __value)                        \
85 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x28, 0, 32, __value)
86 #define GET_TX_BD_PHYSICAL_ADDR2_HIGH(__tx_bd)                                 \
87 	LE_BITS_TO_4BYTE(__tx_bd + 0x28, 0, 32)
88 
89 /*TXBD_DW12*/
90 
91 #define SET_TX_BD_A3(__tx_bd, __value)                                         \
92 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x30, 31, 1, __value)
93 #define GET_TX_BD_A3(__tx_bd) LE_BITS_TO_4BYTE(__tx_bd + 0x30, 31, 1)
94 #define SET_TX_BD_TX_BUFF_SIZE3(__tx_bd, __value)                              \
95 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x30, 0, 16, __value)
96 #define GET_TX_BD_TX_BUFF_SIZE3(__tx_bd) LE_BITS_TO_4BYTE(__tx_bd + 0x30, 0, 16)
97 
98 /*TXBD_DW13*/
99 
100 #define SET_TX_BD_PHYSICAL_ADDR3_LOW(__tx_bd, __value)                         \
101 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x34, 0, 32, __value)
102 #define GET_TX_BD_PHYSICAL_ADDR3_LOW(__tx_bd)                                  \
103 	LE_BITS_TO_4BYTE(__tx_bd + 0x34, 0, 32)
104 
105 /*TXBD_DW14*/
106 
107 #define SET_TX_BD_PHYSICAL_ADDR3_HIGH(__tx_bd, __value)                        \
108 	SET_BITS_TO_LE_4BYTE(__tx_bd + 0x38, 0, 32, __value)
109 #define GET_TX_BD_PHYSICAL_ADDR3_HIGH(__tx_bd)                                 \
110 	LE_BITS_TO_4BYTE(__tx_bd + 0x38, 0, 32)
111 
112 #endif
113