1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) 2016 Realtek Corporation. 5 * 6 * Contact Information: 7 * wlanfae <wlanfae@realtek.com> 8 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, 9 * Hsinchu 300, Taiwan. 10 * 11 * Larry Finger <Larry.Finger@lwfinger.net> 12 * 13 *****************************************************************************/ 14 #ifndef _HALMAC_TX_BD_CHIP_H_ 15 #define _HALMAC_TX_BD_CHIP_H_ 16 17 /*TXBD_DW0*/ 18 19 #define SET_TX_BD_OWN_8822B(__tx_bd, __value) SET_TX_BD_OWN(__tx_bd, __value) 20 #define GET_TX_BD_OWN_8822B(__tx_bd) GET_TX_BD_OWN(__tx_bd) 21 #define SET_TX_BD_PSB_8822B(__tx_bd, __value) SET_TX_BD_PSB(__tx_bd, __value) 22 #define GET_TX_BD_PSB_8822B(__tx_bd) GET_TX_BD_PSB(__tx_bd) 23 #define SET_TX_BD_TX_BUFF_SIZE0_8822B(__tx_bd, __value) \ 24 SET_TX_BD_TX_BUFF_SIZE0(__tx_bd, __value) 25 #define GET_TX_BD_TX_BUFF_SIZE0_8822B(__tx_bd) GET_TX_BD_TX_BUFF_SIZE0(__tx_bd) 26 27 /*TXBD_DW1*/ 28 29 #define SET_TX_BD_PHYSICAL_ADDR0_LOW_8822B(__tx_bd, __value) \ 30 SET_TX_BD_PHYSICAL_ADDR0_LOW(__tx_bd, __value) 31 #define GET_TX_BD_PHYSICAL_ADDR0_LOW_8822B(__tx_bd) \ 32 GET_TX_BD_PHYSICAL_ADDR0_LOW(__tx_bd) 33 34 /*TXBD_DW2*/ 35 36 #define SET_TX_BD_PHYSICAL_ADDR0_HIGH_8822B(__tx_bd, __value) \ 37 SET_TX_BD_PHYSICAL_ADDR0_HIGH(__tx_bd, __value) 38 #define GET_TX_BD_PHYSICAL_ADDR0_HIGH_8822B(__tx_bd) \ 39 GET_TX_BD_PHYSICAL_ADDR0_HIGH(__tx_bd) 40 41 /*TXBD_DW4*/ 42 43 #define SET_TX_BD_A1_8822B(__tx_bd, __value) SET_TX_BD_A1(__tx_bd, __value) 44 #define GET_TX_BD_A1_8822B(__tx_bd) GET_TX_BD_A1(__tx_bd) 45 #define SET_TX_BD_TX_BUFF_SIZE1_8822B(__tx_bd, __value) \ 46 SET_TX_BD_TX_BUFF_SIZE1(__tx_bd, __value) 47 #define GET_TX_BD_TX_BUFF_SIZE1_8822B(__tx_bd) GET_TX_BD_TX_BUFF_SIZE1(__tx_bd) 48 49 /*TXBD_DW5*/ 50 51 #define SET_TX_BD_PHYSICAL_ADDR1_LOW_8822B(__tx_bd, __value) \ 52 SET_TX_BD_PHYSICAL_ADDR1_LOW(__tx_bd, __value) 53 #define GET_TX_BD_PHYSICAL_ADDR1_LOW_8822B(__tx_bd) \ 54 GET_TX_BD_PHYSICAL_ADDR1_LOW(__tx_bd) 55 56 /*TXBD_DW6*/ 57 58 #define SET_TX_BD_PHYSICAL_ADDR1_HIGH_8822B(__tx_bd, __value) \ 59 SET_TX_BD_PHYSICAL_ADDR1_HIGH(__tx_bd, __value) 60 #define GET_TX_BD_PHYSICAL_ADDR1_HIGH_8822B(__tx_bd) \ 61 GET_TX_BD_PHYSICAL_ADDR1_HIGH(__tx_bd) 62 63 /*TXBD_DW8*/ 64 65 #define SET_TX_BD_A2_8822B(__tx_bd, __value) SET_TX_BD_A2(__tx_bd, __value) 66 #define GET_TX_BD_A2_8822B(__tx_bd) GET_TX_BD_A2(__tx_bd) 67 #define SET_TX_BD_TX_BUFF_SIZE2_8822B(__tx_bd, __value) \ 68 SET_TX_BD_TX_BUFF_SIZE2(__tx_bd, __value) 69 #define GET_TX_BD_TX_BUFF_SIZE2_8822B(__tx_bd) GET_TX_BD_TX_BUFF_SIZE2(__tx_bd) 70 71 /*TXBD_DW9*/ 72 73 #define SET_TX_BD_PHYSICAL_ADDR2_LOW_8822B(__tx_bd, __value) \ 74 SET_TX_BD_PHYSICAL_ADDR2_LOW(__tx_bd, __value) 75 #define GET_TX_BD_PHYSICAL_ADDR2_LOW_8822B(__tx_bd) \ 76 GET_TX_BD_PHYSICAL_ADDR2_LOW(__tx_bd) 77 78 /*TXBD_DW10*/ 79 80 #define SET_TX_BD_PHYSICAL_ADDR2_HIGH_8822B(__tx_bd, __value) \ 81 SET_TX_BD_PHYSICAL_ADDR2_HIGH(__tx_bd, __value) 82 #define GET_TX_BD_PHYSICAL_ADDR2_HIGH_8822B(__tx_bd) \ 83 GET_TX_BD_PHYSICAL_ADDR2_HIGH(__tx_bd) 84 85 /*TXBD_DW12*/ 86 87 #define SET_TX_BD_A3_8822B(__tx_bd, __value) SET_TX_BD_A3(__tx_bd, __value) 88 #define GET_TX_BD_A3_8822B(__tx_bd) GET_TX_BD_A3(__tx_bd) 89 #define SET_TX_BD_TX_BUFF_SIZE3_8822B(__tx_bd, __value) \ 90 SET_TX_BD_TX_BUFF_SIZE3(__tx_bd, __value) 91 #define GET_TX_BD_TX_BUFF_SIZE3_8822B(__tx_bd) GET_TX_BD_TX_BUFF_SIZE3(__tx_bd) 92 93 /*TXBD_DW13*/ 94 95 #define SET_TX_BD_PHYSICAL_ADDR3_LOW_8822B(__tx_bd, __value) \ 96 SET_TX_BD_PHYSICAL_ADDR3_LOW(__tx_bd, __value) 97 #define GET_TX_BD_PHYSICAL_ADDR3_LOW_8822B(__tx_bd) \ 98 GET_TX_BD_PHYSICAL_ADDR3_LOW(__tx_bd) 99 100 /*TXBD_DW14*/ 101 102 #define SET_TX_BD_PHYSICAL_ADDR3_HIGH_8822B(__tx_bd, __value) \ 103 SET_TX_BD_PHYSICAL_ADDR3_HIGH(__tx_bd, __value) 104 #define GET_TX_BD_PHYSICAL_ADDR3_HIGH_8822B(__tx_bd) \ 105 GET_TX_BD_PHYSICAL_ADDR3_HIGH(__tx_bd) 106 107 #endif 108
