1 /*
2  * Copyright (C) 2012 Samsung Electronics Co., Ltd.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8 
9 #ifndef FIMC_LITE_H_
10 #define FIMC_LITE_H_
11 
12 #include <linux/sizes.h>
13 #include <linux/io.h>
14 #include <linux/irqreturn.h>
15 #include <linux/platform_device.h>
16 #include <linux/sched.h>
17 #include <linux/spinlock.h>
18 #include <linux/types.h>
19 #include <linux/videodev2.h>
20 
21 #include <media/media-entity.h>
22 #include <media/videobuf2-v4l2.h>
23 #include <media/v4l2-ctrls.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-mediabus.h>
26 #include <media/drv-intf/exynos-fimc.h>
27 
28 #define FIMC_LITE_DRV_NAME	"exynos-fimc-lite"
29 #define FLITE_CLK_NAME		"flite"
30 #define FIMC_LITE_MAX_DEVS	3
31 #define FLITE_REQ_BUFS_MIN	2
32 #define FLITE_DEFAULT_WIDTH	640
33 #define FLITE_DEFAULT_HEIGHT	480
34 
35 /* Bit index definitions for struct fimc_lite::state */
36 enum {
37 	ST_FLITE_LPM,
38 	ST_FLITE_PENDING,
39 	ST_FLITE_RUN,
40 	ST_FLITE_STREAM,
41 	ST_FLITE_SUSPENDED,
42 	ST_FLITE_OFF,
43 	ST_FLITE_IN_USE,
44 	ST_FLITE_CONFIG,
45 	ST_SENSOR_STREAM,
46 };
47 
48 #define FLITE_SD_PAD_SINK	0
49 #define FLITE_SD_PAD_SOURCE_DMA	1
50 #define FLITE_SD_PAD_SOURCE_ISP	2
51 #define FLITE_SD_PADS_NUM	3
52 
53 /**
54  * struct flite_drvdata - FIMC-LITE IP variant data structure
55  * @max_width: maximum camera interface input width in pixels
56  * @max_height: maximum camera interface input height in pixels
57  * @out_width_align: minimum output width alignment in pixels
58  * @win_hor_offs_align: minimum camera interface crop window horizontal
59  *			offset alignment in pixels
60  * @out_hor_offs_align: minimum output DMA compose rectangle horizontal
61  *			offset alignment in pixels
62  * @max_dma_bufs: number of output DMA buffer start address registers
63  * @num_instances: total number of FIMC-LITE IP instances available
64  */
65 struct flite_drvdata {
66 	unsigned short max_width;
67 	unsigned short max_height;
68 	unsigned short out_width_align;
69 	unsigned short win_hor_offs_align;
70 	unsigned short out_hor_offs_align;
71 	unsigned short max_dma_bufs;
72 	unsigned short num_instances;
73 };
74 
75 struct fimc_lite_events {
76 	unsigned int data_overflow;
77 };
78 
79 #define FLITE_MAX_PLANES	1
80 
81 /**
82  * struct flite_frame - source/target frame properties
83  * @f_width: full pixel width
84  * @f_height: full pixel height
85  * @rect: crop/composition rectangle
86  * @fmt: pointer to pixel format description data structure
87  */
88 struct flite_frame {
89 	u16 f_width;
90 	u16 f_height;
91 	struct v4l2_rect rect;
92 	const struct fimc_fmt *fmt;
93 };
94 
95 /**
96  * struct flite_buffer - video buffer structure
97  * @vb:    vb2 buffer
98  * @list:  list head for the buffers queue
99  * @paddr: DMA buffer start address
100  * @index: DMA start address register's index
101  */
102 struct flite_buffer {
103 	struct vb2_v4l2_buffer vb;
104 	struct list_head list;
105 	dma_addr_t paddr;
106 	unsigned short index;
107 };
108 
109 /**
110  * struct fimc_lite - fimc lite structure
111  * @pdev: pointer to FIMC-LITE platform device
112  * @dd: SoC specific driver data structure
113  * @ve: exynos video device entity structure
114  * @v4l2_dev: pointer to top the level v4l2_device
115  * @fh: v4l2 file handle
116  * @subdev: FIMC-LITE subdev
117  * @vd_pad: media (sink) pad for the capture video node
118  * @subdev_pads: the subdev media pads
119  * @sensor: sensor subdev attached to FIMC-LITE directly or through MIPI-CSIS
120  * @ctrl_handler: v4l2 control handler
121  * @test_pattern: test pattern controls
122  * @index: FIMC-LITE platform device index
123  * @pipeline: video capture pipeline data structure
124  * @pipeline_ops: media pipeline ops for the video node driver
125  * @slock: spinlock protecting this data structure and the hw registers
126  * @lock: mutex serializing video device and the subdev operations
127  * @clock: FIMC-LITE gate clock
128  * @regs: memory mapped io registers
129  * @irq_queue: interrupt handler waitqueue
130  * @payload: image size in bytes (w x h x bpp)
131  * @inp_frame: camera input frame structure
132  * @out_frame: DMA output frame structure
133  * @out_path: output data path (DMA or FIFO)
134  * @source_subdev_grp_id: source subdev group id
135  * @state: driver state flags
136  * @pending_buf_q: pending buffers queue head
137  * @active_buf_q: the queue head of buffers scheduled in hardware
138  * @vb_queue: vb2 buffers queue
139  * @buf_index: helps to keep track of the DMA start address register index
140  * @active_buf_count: number of video buffers scheduled in hardware
141  * @frame_count: the captured frames counter
142  * @reqbufs_count: the number of buffers requested with REQBUFS ioctl
143  */
144 struct fimc_lite {
145 	struct platform_device	*pdev;
146 	struct flite_drvdata	*dd;
147 	struct exynos_video_entity ve;
148 	struct v4l2_device	*v4l2_dev;
149 	struct v4l2_fh		fh;
150 	struct v4l2_subdev	subdev;
151 	struct media_pad	vd_pad;
152 	struct media_pad	subdev_pads[FLITE_SD_PADS_NUM];
153 	struct v4l2_subdev	*sensor;
154 	struct v4l2_ctrl_handler ctrl_handler;
155 	struct v4l2_ctrl	*test_pattern;
156 	int			index;
157 
158 	struct mutex		lock;
159 	spinlock_t		slock;
160 
161 	struct clk		*clock;
162 	void __iomem		*regs;
163 	wait_queue_head_t	irq_queue;
164 
165 	unsigned long		payload[FLITE_MAX_PLANES];
166 	struct flite_frame	inp_frame;
167 	struct flite_frame	out_frame;
168 	atomic_t		out_path;
169 	unsigned int		source_subdev_grp_id;
170 
171 	unsigned long		state;
172 	struct list_head	pending_buf_q;
173 	struct list_head	active_buf_q;
174 	struct vb2_queue	vb_queue;
175 	unsigned short		buf_index;
176 	unsigned int		frame_count;
177 	unsigned int		reqbufs_count;
178 
179 	struct fimc_lite_events	events;
180 	bool			streaming;
181 };
182 
fimc_lite_active(struct fimc_lite * fimc)183 static inline bool fimc_lite_active(struct fimc_lite *fimc)
184 {
185 	unsigned long flags;
186 	bool ret;
187 
188 	spin_lock_irqsave(&fimc->slock, flags);
189 	ret = fimc->state & (1 << ST_FLITE_RUN) ||
190 		fimc->state & (1 << ST_FLITE_PENDING);
191 	spin_unlock_irqrestore(&fimc->slock, flags);
192 	return ret;
193 }
194 
fimc_lite_active_queue_add(struct fimc_lite * dev,struct flite_buffer * buf)195 static inline void fimc_lite_active_queue_add(struct fimc_lite *dev,
196 					 struct flite_buffer *buf)
197 {
198 	list_add_tail(&buf->list, &dev->active_buf_q);
199 }
200 
fimc_lite_active_queue_pop(struct fimc_lite * dev)201 static inline struct flite_buffer *fimc_lite_active_queue_pop(
202 					struct fimc_lite *dev)
203 {
204 	struct flite_buffer *buf = list_entry(dev->active_buf_q.next,
205 					      struct flite_buffer, list);
206 	list_del(&buf->list);
207 	return buf;
208 }
209 
fimc_lite_pending_queue_add(struct fimc_lite * dev,struct flite_buffer * buf)210 static inline void fimc_lite_pending_queue_add(struct fimc_lite *dev,
211 					struct flite_buffer *buf)
212 {
213 	list_add_tail(&buf->list, &dev->pending_buf_q);
214 }
215 
fimc_lite_pending_queue_pop(struct fimc_lite * dev)216 static inline struct flite_buffer *fimc_lite_pending_queue_pop(
217 					struct fimc_lite *dev)
218 {
219 	struct flite_buffer *buf = list_entry(dev->pending_buf_q.next,
220 					      struct flite_buffer, list);
221 	list_del(&buf->list);
222 	return buf;
223 }
224 
225 #endif /* FIMC_LITE_H_ */
226