1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
4 * device tree source
5*/
6
7#include <dt-bindings/sound/samsung-i2s.h>
8#include <dt-bindings/input/input.h>
9#include <dt-bindings/clock/maxim,max77686.h>
10#include "exynos4412.dtsi"
11#include "exynos4412-ppmu-common.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include "exynos-mfc-reserved-memory.dtsi"
14
15/ {
16	chosen {
17		stdout-path = &serial_1;
18	};
19
20	firmware@204f000 {
21		compatible = "samsung,secure-firmware";
22		reg = <0x0204F000 0x1000>;
23	};
24
25	gpio_keys {
26		compatible = "gpio-keys";
27		pinctrl-names = "default";
28		pinctrl-0 = <&gpio_power_key>;
29
30		power_key {
31			gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
32			linux,code = <KEY_POWER>;
33			label = "power key";
34			debounce-interval = <10>;
35			wakeup-source;
36		};
37	};
38
39	sound: sound {
40		compatible = "hardkernel,odroid-xu4-audio";
41
42		cpu {
43			sound-dai = <&i2s0 0>;
44		};
45
46		codec {
47			sound-dai = <&hdmi>, <&max98090>;
48		};
49	};
50
51	emmc_pwrseq: pwrseq {
52		pinctrl-0 = <&emmc_rstn>;
53		pinctrl-names = "default";
54		compatible = "mmc-pwrseq-emmc";
55		reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
56	};
57
58	fixed-rate-clocks {
59		xxti {
60			compatible = "samsung,clock-xxti";
61			clock-frequency = <0>;
62		};
63
64		xusbxti {
65			compatible = "samsung,clock-xusbxti";
66			clock-frequency = <24000000>;
67		};
68	};
69
70	thermal-zones {
71		cpu_thermal: cpu-thermal {
72			cooling-maps {
73				cooling_map0: map0 {
74				     /* Corresponds to 800MHz at freq_table */
75				     cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
76						      <&cpu2 7 7>, <&cpu3 7 7>;
77				};
78				cooling_map1: map1 {
79				     /* Corresponds to 200MHz at freq_table */
80				     cooling-device = <&cpu0 13 13>,
81						      <&cpu1 13 13>,
82						      <&cpu2 13 13>,
83						      <&cpu3 13 13>;
84			       };
85		       };
86		};
87	};
88};
89
90&bus_dmc {
91	devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
92	vdd-supply = <&buck1_reg>;
93	status = "okay";
94};
95
96&bus_acp {
97	devfreq = <&bus_dmc>;
98	status = "okay";
99};
100
101&bus_c2c {
102	devfreq = <&bus_dmc>;
103	status = "okay";
104};
105
106&bus_leftbus {
107	devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
108	vdd-supply = <&buck3_reg>;
109	status = "okay";
110};
111
112&bus_rightbus {
113	devfreq = <&bus_leftbus>;
114	status = "okay";
115};
116
117&bus_display {
118	devfreq = <&bus_leftbus>;
119	status = "okay";
120};
121
122&bus_fsys {
123	devfreq = <&bus_leftbus>;
124	status = "okay";
125};
126
127&bus_peri {
128	devfreq = <&bus_leftbus>;
129	status = "okay";
130};
131
132&bus_mfc {
133	devfreq = <&bus_leftbus>;
134	status = "okay";
135};
136
137&camera {
138	status = "okay";
139	pinctrl-names = "default";
140	pinctrl-0 = <>;
141};
142
143&clock {
144	assigned-clocks = <&clock CLK_FOUT_EPLL>;
145	assigned-clock-rates = <45158401>;
146};
147
148&clock_audss {
149	assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
150			<&clock_audss EXYNOS_MOUT_I2S>,
151			<&clock_audss EXYNOS_DOUT_SRP>,
152			<&clock_audss EXYNOS_DOUT_AUD_BUS>,
153			<&clock_audss EXYNOS_DOUT_I2S>;
154
155	assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
156			  <&clock_audss EXYNOS_MOUT_AUDSS>;
157
158	assigned-clock-rates = <0>, <0>,
159			<196608001>,
160			<(196608001 / 2)>,
161			<(196608001 / 8)>;
162};
163
164&cpu0 {
165	cpu0-supply = <&buck2_reg>;
166};
167
168&pinctrl_1 {
169	gpio_power_key: power_key {
170		samsung,pins = "gpx1-3";
171		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
172	};
173
174	max77686_irq: max77686-irq {
175		samsung,pins = "gpx3-2";
176		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
177		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
178		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
179	};
180
181	hdmi_hpd: hdmi-hpd {
182		samsung,pins = "gpx3-7";
183		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
184	};
185
186	emmc_rstn: emmc-rstn {
187		samsung,pins = "gpk1-2";
188		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
189	};
190};
191
192&ehci {
193	status = "okay";
194};
195
196&exynos_usbphy {
197	status = "okay";
198};
199
200&fimc_0 {
201	status = "okay";
202	assigned-clocks = <&clock CLK_MOUT_FIMC0>,
203			<&clock CLK_SCLK_FIMC0>;
204	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
205	assigned-clock-rates = <0>, <176000000>;
206};
207
208&fimc_1 {
209	status = "okay";
210	assigned-clocks = <&clock CLK_MOUT_FIMC1>,
211			<&clock CLK_SCLK_FIMC1>;
212	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
213	assigned-clock-rates = <0>, <176000000>;
214};
215
216&fimc_2 {
217	status = "okay";
218	assigned-clocks = <&clock CLK_MOUT_FIMC2>,
219			<&clock CLK_SCLK_FIMC2>;
220	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
221	assigned-clock-rates = <0>, <176000000>;
222};
223
224&fimc_3 {
225	status = "okay";
226	assigned-clocks = <&clock CLK_MOUT_FIMC3>,
227			<&clock CLK_SCLK_FIMC3>;
228	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
229	assigned-clock-rates = <0>, <176000000>;
230};
231
232&gpu {
233	mali-supply = <&buck4_reg>;
234	status = "okay";
235};
236
237&hdmi {
238	hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
239	pinctrl-names = "default";
240	pinctrl-0 = <&hdmi_hpd>;
241	vdd-supply = <&ldo8_reg>;
242	vdd_osc-supply = <&ldo10_reg>;
243	vdd_pll-supply = <&ldo8_reg>;
244	ddc = <&i2c_2>;
245	status = "okay";
246};
247
248&hdmicec {
249	status = "okay";
250};
251
252&hsotg {
253	dr_mode = "peripheral";
254	status = "okay";
255	vusb_d-supply = <&ldo15_reg>;
256	vusb_a-supply = <&ldo12_reg>;
257};
258
259&i2c_0 {
260	samsung,i2c-sda-delay = <100>;
261	samsung,i2c-max-bus-freq = <400000>;
262	status = "okay";
263
264	usb3503: usb3503@8 {
265		compatible = "smsc,usb3503";
266		reg = <0x08>;
267
268		intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
269		connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
270		reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
271		initial-mode = <1>;
272	};
273
274	max77686: pmic@9 {
275		compatible = "maxim,max77686";
276		interrupt-parent = <&gpx3>;
277		interrupts = <2 IRQ_TYPE_NONE>;
278		pinctrl-names = "default";
279		pinctrl-0 = <&max77686_irq>;
280		reg = <0x09>;
281		#clock-cells = <1>;
282
283		voltage-regulators {
284			ldo1_reg: LDO1 {
285				regulator-name = "VDD_ALIVE_1.0V";
286				regulator-min-microvolt = <1000000>;
287				regulator-max-microvolt = <1000000>;
288				regulator-always-on;
289			};
290
291			ldo2_reg: LDO2 {
292				regulator-name = "VDDQ_M1_2_1.8V";
293				regulator-min-microvolt = <1800000>;
294				regulator-max-microvolt = <1800000>;
295				regulator-always-on;
296			};
297
298			ldo3_reg: LDO3 {
299				regulator-name = "VDDQ_EXT_1.8V";
300				regulator-min-microvolt = <1800000>;
301				regulator-max-microvolt = <1800000>;
302				regulator-always-on;
303			};
304
305			ldo4_reg: LDO4 {
306				regulator-name = "VDDQ_MMC2_2.8V";
307				regulator-min-microvolt = <2800000>;
308				regulator-max-microvolt = <2800000>;
309				regulator-boot-on;
310			};
311
312			ldo5_reg: LDO5 {
313				regulator-name = "VDDQ_MMC1_3_1.8V";
314				regulator-min-microvolt = <1800000>;
315				regulator-max-microvolt = <1800000>;
316				regulator-always-on;
317				regulator-boot-on;
318			};
319
320			ldo6_reg: LDO6 {
321				regulator-name = "VDD10_MPLL_1.0V";
322				regulator-min-microvolt = <1000000>;
323				regulator-max-microvolt = <1000000>;
324				regulator-always-on;
325			};
326
327			ldo7_reg: LDO7 {
328				regulator-name = "VDD10_XPLL_1.0V";
329				regulator-min-microvolt = <1000000>;
330				regulator-max-microvolt = <1000000>;
331				regulator-always-on;
332			};
333
334			ldo8_reg: LDO8 {
335				regulator-name = "VDD10_HDMI_1.0V";
336				regulator-min-microvolt = <1000000>;
337				regulator-max-microvolt = <1000000>;
338			};
339
340			ldo10_reg: LDO10 {
341				regulator-name = "VDDQ_MIPIHSI_1.8V";
342				regulator-min-microvolt = <1800000>;
343				regulator-max-microvolt = <1800000>;
344			};
345
346			ldo11_reg: LDO11 {
347				regulator-name = "VDD18_ABB1_1.8V";
348				regulator-min-microvolt = <1800000>;
349				regulator-max-microvolt = <1800000>;
350				regulator-always-on;
351			};
352
353			ldo12_reg: LDO12 {
354				regulator-name = "VDD33_USB_3.3V";
355				regulator-min-microvolt = <3300000>;
356				regulator-max-microvolt = <3300000>;
357				regulator-always-on;
358				regulator-boot-on;
359			};
360
361			ldo13_reg: LDO13 {
362				regulator-name = "VDDQ_C2C_W_1.8V";
363				regulator-min-microvolt = <1800000>;
364				regulator-max-microvolt = <1800000>;
365				regulator-always-on;
366				regulator-boot-on;
367			};
368
369			ldo14_reg: LDO14 {
370				regulator-name = "VDD18_ABB0_2_1.8V";
371				regulator-min-microvolt = <1800000>;
372				regulator-max-microvolt = <1800000>;
373				regulator-always-on;
374				regulator-boot-on;
375			};
376
377			ldo15_reg: LDO15 {
378				regulator-name = "VDD10_HSIC_1.0V";
379				regulator-min-microvolt = <1000000>;
380				regulator-max-microvolt = <1000000>;
381				regulator-always-on;
382				regulator-boot-on;
383			};
384
385			ldo16_reg: LDO16 {
386				regulator-name = "VDD18_HSIC_1.8V";
387				regulator-min-microvolt = <1800000>;
388				regulator-max-microvolt = <1800000>;
389				regulator-always-on;
390				regulator-boot-on;
391			};
392
393			ldo20_reg: LDO20 {
394				regulator-name = "LDO20_1.8V";
395				regulator-min-microvolt = <1800000>;
396				regulator-max-microvolt = <1800000>;
397			};
398
399			ldo21_reg: LDO21 {
400				regulator-name = "TFLASH_2.8V";
401				regulator-min-microvolt = <2800000>;
402				regulator-max-microvolt = <2800000>;
403				regulator-boot-on;
404			};
405
406			ldo22_reg: LDO22 {
407				/*
408				 * Only U3 uses it, so let it define the
409				 * constraints
410				 */
411				regulator-name = "LDO22";
412				regulator-boot-on;
413			};
414
415			ldo25_reg: LDO25 {
416				regulator-name = "VDDQ_LCD_1.8V";
417				regulator-min-microvolt = <1800000>;
418				regulator-max-microvolt = <1800000>;
419				regulator-always-on;
420				regulator-boot-on;
421			};
422
423			buck1_reg: BUCK1 {
424				regulator-name = "vdd_mif";
425				regulator-min-microvolt = <900000>;
426				regulator-max-microvolt = <1100000>;
427				regulator-always-on;
428				regulator-boot-on;
429			};
430
431			buck2_reg: BUCK2 {
432				regulator-name = "vdd_arm";
433				regulator-min-microvolt = <900000>;
434				regulator-max-microvolt = <1350000>;
435				regulator-always-on;
436				regulator-boot-on;
437			};
438
439			buck3_reg: BUCK3 {
440				regulator-name = "vdd_int";
441				regulator-min-microvolt = <900000>;
442				regulator-max-microvolt = <1050000>;
443				regulator-always-on;
444				regulator-boot-on;
445			};
446
447			buck4_reg: BUCK4 {
448				regulator-name = "vdd_g3d";
449				regulator-min-microvolt = <900000>;
450				regulator-max-microvolt = <1100000>;
451				regulator-microvolt-offset = <50000>;
452			};
453
454			buck5_reg: BUCK5 {
455				regulator-name = "VDDQ_CKEM1_2_1.2V";
456				regulator-min-microvolt = <1200000>;
457				regulator-max-microvolt = <1200000>;
458				regulator-always-on;
459				regulator-boot-on;
460			};
461
462			buck6_reg: BUCK6 {
463				regulator-name = "BUCK6_1.35V";
464				regulator-min-microvolt = <1350000>;
465				regulator-max-microvolt = <1350000>;
466				regulator-always-on;
467				regulator-boot-on;
468			};
469
470			buck7_reg: BUCK7 {
471				regulator-name = "BUCK7_2.0V";
472				regulator-min-microvolt = <2000000>;
473				regulator-max-microvolt = <2000000>;
474				regulator-always-on;
475			};
476
477			buck8_reg: BUCK8 {
478				/*
479				 * Constraints set by specific board: X,
480				 * X2 and U3.
481				 */
482				regulator-name = "BUCK8_2.8V";
483			};
484		};
485	};
486};
487
488&i2c_1 {
489	status = "okay";
490	max98090: max98090@10 {
491		compatible = "maxim,max98090";
492		reg = <0x10>;
493		interrupt-parent = <&gpx0>;
494		interrupts = <0 IRQ_TYPE_NONE>;
495		clocks = <&i2s0 CLK_I2S_CDCLK>;
496		clock-names = "mclk";
497		#sound-dai-cells = <0>;
498	};
499};
500
501&i2c_2 {
502	status = "okay";
503};
504
505&i2c_8 {
506	status = "okay";
507};
508
509&i2s0 {
510	pinctrl-0 = <&i2s0_bus>;
511	pinctrl-names = "default";
512	status = "okay";
513	assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
514	assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
515};
516
517&mixer {
518	status = "okay";
519};
520
521&mshc_0 {
522	pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
523	pinctrl-names = "default";
524	vmmc-supply = <&ldo20_reg>;
525	mmc-pwrseq = <&emmc_pwrseq>;
526	status = "okay";
527
528	broken-cd;
529	card-detect-delay = <200>;
530	samsung,dw-mshc-ciu-div = <3>;
531	samsung,dw-mshc-sdr-timing = <2 3>;
532	samsung,dw-mshc-ddr-timing = <1 2>;
533	bus-width = <8>;
534	cap-mmc-highspeed;
535};
536
537&rtc {
538	status = "okay";
539	clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
540	clock-names = "rtc", "rtc_src";
541};
542
543&sdhci_2 {
544	bus-width = <4>;
545	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
546	pinctrl-names = "default";
547	vmmc-supply = <&ldo21_reg>;
548	vqmmc-supply = <&ldo4_reg>;
549	cd-gpios = <&gpk2 2 GPIO_ACTIVE_LOW>;
550	status = "okay";
551};
552
553&serial_0 {
554	status = "okay";
555};
556
557&serial_1 {
558	status = "okay";
559};
560
561&tmu {
562	vtmu-supply = <&ldo10_reg>;
563	status = "okay";
564};
565