1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
4  *  Driver EMU10K1X chips
5  *
6  *  Parts of this code were adapted from audigyls.c driver which is
7  *  Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
8  *
9  *  BUGS:
10  *    --
11  *
12  *  TODO:
13  *
14  *  Chips (SB0200 model):
15  *    - EMU10K1X-DBQ
16  *    - STAC 9708T
17  */
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/pci.h>
21 #include <linux/dma-mapping.h>
22 #include <linux/slab.h>
23 #include <linux/module.h>
24 #include <sound/core.h>
25 #include <sound/initval.h>
26 #include <sound/pcm.h>
27 #include <sound/ac97_codec.h>
28 #include <sound/info.h>
29 #include <sound/rawmidi.h>
30 
31 MODULE_AUTHOR("Francisco Moraes <fmoraes@nc.rr.com>");
32 MODULE_DESCRIPTION("EMU10K1X");
33 MODULE_LICENSE("GPL");
34 MODULE_SUPPORTED_DEVICE("{{Dell Creative Labs,SB Live!}");
35 
36 // module parameters (see "Module Parameters")
37 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
38 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
39 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
40 
41 module_param_array(index, int, NULL, 0444);
42 MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard.");
43 module_param_array(id, charp, NULL, 0444);
44 MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard.");
45 module_param_array(enable, bool, NULL, 0444);
46 MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard.");
47 
48 
49 // some definitions were borrowed from emu10k1 driver as they seem to be the same
50 /************************************************************************************************/
51 /* PCI function 0 registers, address = <val> + PCIBASE0						*/
52 /************************************************************************************************/
53 
54 #define PTR			0x00		/* Indexed register set pointer register	*/
55 						/* NOTE: The CHANNELNUM and ADDRESS words can	*/
56 						/* be modified independently of each other.	*/
57 
58 #define DATA			0x04		/* Indexed register set data register		*/
59 
60 #define IPR			0x08		/* Global interrupt pending register		*/
61 						/* Clear pending interrupts by writing a 1 to	*/
62 						/* the relevant bits and zero to the other bits	*/
63 #define IPR_MIDITRANSBUFEMPTY   0x00000001	/* MIDI UART transmit buffer empty		*/
64 #define IPR_MIDIRECVBUFEMPTY    0x00000002	/* MIDI UART receive buffer empty		*/
65 #define IPR_CH_0_LOOP           0x00000800      /* Channel 0 loop                               */
66 #define IPR_CH_0_HALF_LOOP      0x00000100      /* Channel 0 half loop                          */
67 #define IPR_CAP_0_LOOP          0x00080000      /* Channel capture loop                         */
68 #define IPR_CAP_0_HALF_LOOP     0x00010000      /* Channel capture half loop                    */
69 
70 #define INTE			0x0c		/* Interrupt enable register			*/
71 #define INTE_MIDITXENABLE       0x00000001	/* Enable MIDI transmit-buffer-empty interrupts	*/
72 #define INTE_MIDIRXENABLE       0x00000002	/* Enable MIDI receive-buffer-empty interrupts	*/
73 #define INTE_CH_0_LOOP          0x00000800      /* Channel 0 loop                               */
74 #define INTE_CH_0_HALF_LOOP     0x00000100      /* Channel 0 half loop                          */
75 #define INTE_CAP_0_LOOP         0x00080000      /* Channel capture loop                         */
76 #define INTE_CAP_0_HALF_LOOP    0x00010000      /* Channel capture half loop                    */
77 
78 #define HCFG			0x14		/* Hardware config register			*/
79 
80 #define HCFG_LOCKSOUNDCACHE	0x00000008	/* 1 = Cancel bustmaster accesses to soundcache */
81 						/* NOTE: This should generally never be used.  	*/
82 #define HCFG_AUDIOENABLE	0x00000001	/* 0 = CODECs transmit zero-valued samples	*/
83 						/* Should be set to 1 when the EMU10K1 is	*/
84 						/* completely initialized.			*/
85 #define GPIO			0x18		/* Defaults: 00001080-Analog, 00001000-SPDIF.   */
86 
87 
88 #define AC97DATA		0x1c		/* AC97 register set data register (16 bit)	*/
89 
90 #define AC97ADDRESS		0x1e		/* AC97 register set address register (8 bit)	*/
91 
92 /********************************************************************************************************/
93 /* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers			*/
94 /********************************************************************************************************/
95 #define PLAYBACK_LIST_ADDR	0x00		/* Base DMA address of a list of pointers to each period/size */
96 						/* One list entry: 4 bytes for DMA address,
97 						 * 4 bytes for period_size << 16.
98 						 * One list entry is 8 bytes long.
99 						 * One list entry for each period in the buffer.
100 						 */
101 #define PLAYBACK_LIST_SIZE	0x01		/* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000  */
102 #define PLAYBACK_LIST_PTR	0x02		/* Pointer to the current period being played */
103 #define PLAYBACK_DMA_ADDR	0x04		/* Playback DMA address */
104 #define PLAYBACK_PERIOD_SIZE	0x05		/* Playback period size */
105 #define PLAYBACK_POINTER	0x06		/* Playback period pointer. Sample currently in DAC */
106 #define PLAYBACK_UNKNOWN1       0x07
107 #define PLAYBACK_UNKNOWN2       0x08
108 
109 /* Only one capture channel supported */
110 #define CAPTURE_DMA_ADDR	0x10		/* Capture DMA address */
111 #define CAPTURE_BUFFER_SIZE	0x11		/* Capture buffer size */
112 #define CAPTURE_POINTER		0x12		/* Capture buffer pointer. Sample currently in ADC */
113 #define CAPTURE_UNKNOWN         0x13
114 
115 /* From 0x20 - 0x3f, last samples played on each channel */
116 
117 #define TRIGGER_CHANNEL         0x40            /* Trigger channel playback                     */
118 #define TRIGGER_CHANNEL_0       0x00000001      /* Trigger channel 0                            */
119 #define TRIGGER_CHANNEL_1       0x00000002      /* Trigger channel 1                            */
120 #define TRIGGER_CHANNEL_2       0x00000004      /* Trigger channel 2                            */
121 #define TRIGGER_CAPTURE         0x00000100      /* Trigger capture channel                      */
122 
123 #define ROUTING                 0x41            /* Setup sound routing ?                        */
124 #define ROUTING_FRONT_LEFT      0x00000001
125 #define ROUTING_FRONT_RIGHT     0x00000002
126 #define ROUTING_REAR_LEFT       0x00000004
127 #define ROUTING_REAR_RIGHT      0x00000008
128 #define ROUTING_CENTER_LFE      0x00010000
129 
130 #define SPCS0			0x42		/* SPDIF output Channel Status 0 register	*/
131 
132 #define SPCS1			0x43		/* SPDIF output Channel Status 1 register	*/
133 
134 #define SPCS2			0x44		/* SPDIF output Channel Status 2 register	*/
135 
136 #define SPCS_CLKACCYMASK	0x30000000	/* Clock accuracy				*/
137 #define SPCS_CLKACCY_1000PPM	0x00000000	/* 1000 parts per million			*/
138 #define SPCS_CLKACCY_50PPM	0x10000000	/* 50 parts per million				*/
139 #define SPCS_CLKACCY_VARIABLE	0x20000000	/* Variable accuracy				*/
140 #define SPCS_SAMPLERATEMASK	0x0f000000	/* Sample rate					*/
141 #define SPCS_SAMPLERATE_44	0x00000000	/* 44.1kHz sample rate				*/
142 #define SPCS_SAMPLERATE_48	0x02000000	/* 48kHz sample rate				*/
143 #define SPCS_SAMPLERATE_32	0x03000000	/* 32kHz sample rate				*/
144 #define SPCS_CHANNELNUMMASK	0x00f00000	/* Channel number				*/
145 #define SPCS_CHANNELNUM_UNSPEC	0x00000000	/* Unspecified channel number			*/
146 #define SPCS_CHANNELNUM_LEFT	0x00100000	/* Left channel					*/
147 #define SPCS_CHANNELNUM_RIGHT	0x00200000	/* Right channel				*/
148 #define SPCS_SOURCENUMMASK	0x000f0000	/* Source number				*/
149 #define SPCS_SOURCENUM_UNSPEC	0x00000000	/* Unspecified source number			*/
150 #define SPCS_GENERATIONSTATUS	0x00008000	/* Originality flag (see IEC-958 spec)		*/
151 #define SPCS_CATEGORYCODEMASK	0x00007f00	/* Category code (see IEC-958 spec)		*/
152 #define SPCS_MODEMASK		0x000000c0	/* Mode (see IEC-958 spec)			*/
153 #define SPCS_EMPHASISMASK	0x00000038	/* Emphasis					*/
154 #define SPCS_EMPHASIS_NONE	0x00000000	/* No emphasis					*/
155 #define SPCS_EMPHASIS_50_15	0x00000008	/* 50/15 usec 2 channel				*/
156 #define SPCS_COPYRIGHT		0x00000004	/* Copyright asserted flag -- do not modify	*/
157 #define SPCS_NOTAUDIODATA	0x00000002	/* 0 = Digital audio, 1 = not audio		*/
158 #define SPCS_PROFESSIONAL	0x00000001	/* 0 = Consumer (IEC-958), 1 = pro (AES3-1992)	*/
159 
160 #define SPDIF_SELECT		0x45		/* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */
161 
162 /* This is the MPU port on the card                      					*/
163 #define MUDATA		0x47
164 #define MUCMD		0x48
165 #define MUSTAT		MUCMD
166 
167 /* From 0x50 - 0x5f, last samples captured */
168 
169 /*
170  * The hardware has 3 channels for playback and 1 for capture.
171  *  - channel 0 is the front channel
172  *  - channel 1 is the rear channel
173  *  - channel 2 is the center/lfe channel
174  * Volume is controlled by the AC97 for the front and rear channels by
175  * the PCM Playback Volume, Sigmatel Surround Playback Volume and
176  * Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects
177  * the front/rear channel mixing in the REAR OUT jack. When using the
178  * 4-Speaker Stereo, both front and rear channels will be mixed in the
179  * REAR OUT.
180  * The center/lfe channel has no volume control and cannot be muted during
181  * playback.
182  */
183 
184 struct emu10k1x_voice {
185 	struct emu10k1x *emu;
186 	int number;
187 	int use;
188 
189 	struct emu10k1x_pcm *epcm;
190 };
191 
192 struct emu10k1x_pcm {
193 	struct emu10k1x *emu;
194 	struct snd_pcm_substream *substream;
195 	struct emu10k1x_voice *voice;
196 	unsigned short running;
197 };
198 
199 struct emu10k1x_midi {
200 	struct emu10k1x *emu;
201 	struct snd_rawmidi *rmidi;
202 	struct snd_rawmidi_substream *substream_input;
203 	struct snd_rawmidi_substream *substream_output;
204 	unsigned int midi_mode;
205 	spinlock_t input_lock;
206 	spinlock_t output_lock;
207 	spinlock_t open_lock;
208 	int tx_enable, rx_enable;
209 	int port;
210 	int ipr_tx, ipr_rx;
211 	void (*interrupt)(struct emu10k1x *emu, unsigned int status);
212 };
213 
214 // definition of the chip-specific record
215 struct emu10k1x {
216 	struct snd_card *card;
217 	struct pci_dev *pci;
218 
219 	unsigned long port;
220 	struct resource *res_port;
221 	int irq;
222 
223 	unsigned char revision;		/* chip revision */
224 	unsigned int serial;            /* serial number */
225 	unsigned short model;		/* subsystem id */
226 
227 	spinlock_t emu_lock;
228 	spinlock_t voice_lock;
229 
230 	struct snd_ac97 *ac97;
231 	struct snd_pcm *pcm;
232 
233 	struct emu10k1x_voice voices[3];
234 	struct emu10k1x_voice capture_voice;
235 	u32 spdif_bits[3]; // SPDIF out setup
236 
237 	struct snd_dma_buffer dma_buffer;
238 
239 	struct emu10k1x_midi midi;
240 };
241 
242 /* hardware definition */
243 static const struct snd_pcm_hardware snd_emu10k1x_playback_hw = {
244 	.info =			(SNDRV_PCM_INFO_MMAP |
245 				 SNDRV_PCM_INFO_INTERLEAVED |
246 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
247 				 SNDRV_PCM_INFO_MMAP_VALID),
248 	.formats =		SNDRV_PCM_FMTBIT_S16_LE,
249 	.rates =		SNDRV_PCM_RATE_48000,
250 	.rate_min =		48000,
251 	.rate_max =		48000,
252 	.channels_min =		2,
253 	.channels_max =		2,
254 	.buffer_bytes_max =	(32*1024),
255 	.period_bytes_min =	64,
256 	.period_bytes_max =	(16*1024),
257 	.periods_min =		2,
258 	.periods_max =		8,
259 	.fifo_size =		0,
260 };
261 
262 static const struct snd_pcm_hardware snd_emu10k1x_capture_hw = {
263 	.info =			(SNDRV_PCM_INFO_MMAP |
264 				 SNDRV_PCM_INFO_INTERLEAVED |
265 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
266 				 SNDRV_PCM_INFO_MMAP_VALID),
267 	.formats =		SNDRV_PCM_FMTBIT_S16_LE,
268 	.rates =		SNDRV_PCM_RATE_48000,
269 	.rate_min =		48000,
270 	.rate_max =		48000,
271 	.channels_min =		2,
272 	.channels_max =		2,
273 	.buffer_bytes_max =	(32*1024),
274 	.period_bytes_min =	64,
275 	.period_bytes_max =	(16*1024),
276 	.periods_min =		2,
277 	.periods_max =		2,
278 	.fifo_size =		0,
279 };
280 
snd_emu10k1x_ptr_read(struct emu10k1x * emu,unsigned int reg,unsigned int chn)281 static unsigned int snd_emu10k1x_ptr_read(struct emu10k1x * emu,
282 					  unsigned int reg,
283 					  unsigned int chn)
284 {
285 	unsigned long flags;
286 	unsigned int regptr, val;
287 
288 	regptr = (reg << 16) | chn;
289 
290 	spin_lock_irqsave(&emu->emu_lock, flags);
291 	outl(regptr, emu->port + PTR);
292 	val = inl(emu->port + DATA);
293 	spin_unlock_irqrestore(&emu->emu_lock, flags);
294 	return val;
295 }
296 
snd_emu10k1x_ptr_write(struct emu10k1x * emu,unsigned int reg,unsigned int chn,unsigned int data)297 static void snd_emu10k1x_ptr_write(struct emu10k1x *emu,
298 				   unsigned int reg,
299 				   unsigned int chn,
300 				   unsigned int data)
301 {
302 	unsigned int regptr;
303 	unsigned long flags;
304 
305 	regptr = (reg << 16) | chn;
306 
307 	spin_lock_irqsave(&emu->emu_lock, flags);
308 	outl(regptr, emu->port + PTR);
309 	outl(data, emu->port + DATA);
310 	spin_unlock_irqrestore(&emu->emu_lock, flags);
311 }
312 
snd_emu10k1x_intr_enable(struct emu10k1x * emu,unsigned int intrenb)313 static void snd_emu10k1x_intr_enable(struct emu10k1x *emu, unsigned int intrenb)
314 {
315 	unsigned long flags;
316 	unsigned int intr_enable;
317 
318 	spin_lock_irqsave(&emu->emu_lock, flags);
319 	intr_enable = inl(emu->port + INTE) | intrenb;
320 	outl(intr_enable, emu->port + INTE);
321 	spin_unlock_irqrestore(&emu->emu_lock, flags);
322 }
323 
snd_emu10k1x_intr_disable(struct emu10k1x * emu,unsigned int intrenb)324 static void snd_emu10k1x_intr_disable(struct emu10k1x *emu, unsigned int intrenb)
325 {
326 	unsigned long flags;
327 	unsigned int intr_enable;
328 
329 	spin_lock_irqsave(&emu->emu_lock, flags);
330 	intr_enable = inl(emu->port + INTE) & ~intrenb;
331 	outl(intr_enable, emu->port + INTE);
332 	spin_unlock_irqrestore(&emu->emu_lock, flags);
333 }
334 
snd_emu10k1x_gpio_write(struct emu10k1x * emu,unsigned int value)335 static void snd_emu10k1x_gpio_write(struct emu10k1x *emu, unsigned int value)
336 {
337 	unsigned long flags;
338 
339 	spin_lock_irqsave(&emu->emu_lock, flags);
340 	outl(value, emu->port + GPIO);
341 	spin_unlock_irqrestore(&emu->emu_lock, flags);
342 }
343 
snd_emu10k1x_pcm_free_substream(struct snd_pcm_runtime * runtime)344 static void snd_emu10k1x_pcm_free_substream(struct snd_pcm_runtime *runtime)
345 {
346 	kfree(runtime->private_data);
347 }
348 
snd_emu10k1x_pcm_interrupt(struct emu10k1x * emu,struct emu10k1x_voice * voice)349 static void snd_emu10k1x_pcm_interrupt(struct emu10k1x *emu, struct emu10k1x_voice *voice)
350 {
351 	struct emu10k1x_pcm *epcm;
352 
353 	if ((epcm = voice->epcm) == NULL)
354 		return;
355 	if (epcm->substream == NULL)
356 		return;
357 #if 0
358 	dev_info(emu->card->dev,
359 		 "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
360 		   epcm->substream->ops->pointer(epcm->substream),
361 		   snd_pcm_lib_period_bytes(epcm->substream),
362 		   snd_pcm_lib_buffer_bytes(epcm->substream));
363 #endif
364 	snd_pcm_period_elapsed(epcm->substream);
365 }
366 
367 /* open callback */
snd_emu10k1x_playback_open(struct snd_pcm_substream * substream)368 static int snd_emu10k1x_playback_open(struct snd_pcm_substream *substream)
369 {
370 	struct emu10k1x *chip = snd_pcm_substream_chip(substream);
371 	struct emu10k1x_pcm *epcm;
372 	struct snd_pcm_runtime *runtime = substream->runtime;
373 	int err;
374 
375 	if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) {
376 		return err;
377 	}
378 	if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
379                 return err;
380 
381 	epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
382 	if (epcm == NULL)
383 		return -ENOMEM;
384 	epcm->emu = chip;
385 	epcm->substream = substream;
386 
387 	runtime->private_data = epcm;
388 	runtime->private_free = snd_emu10k1x_pcm_free_substream;
389 
390 	runtime->hw = snd_emu10k1x_playback_hw;
391 
392 	return 0;
393 }
394 
395 /* close callback */
snd_emu10k1x_playback_close(struct snd_pcm_substream * substream)396 static int snd_emu10k1x_playback_close(struct snd_pcm_substream *substream)
397 {
398 	return 0;
399 }
400 
401 /* hw_params callback */
snd_emu10k1x_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)402 static int snd_emu10k1x_pcm_hw_params(struct snd_pcm_substream *substream,
403 				      struct snd_pcm_hw_params *hw_params)
404 {
405 	struct snd_pcm_runtime *runtime = substream->runtime;
406 	struct emu10k1x_pcm *epcm = runtime->private_data;
407 
408 	if (! epcm->voice) {
409 		epcm->voice = &epcm->emu->voices[substream->pcm->device];
410 		epcm->voice->use = 1;
411 		epcm->voice->epcm = epcm;
412 	}
413 
414 	return 0;
415 }
416 
417 /* hw_free callback */
snd_emu10k1x_pcm_hw_free(struct snd_pcm_substream * substream)418 static int snd_emu10k1x_pcm_hw_free(struct snd_pcm_substream *substream)
419 {
420 	struct snd_pcm_runtime *runtime = substream->runtime;
421 	struct emu10k1x_pcm *epcm;
422 
423 	if (runtime->private_data == NULL)
424 		return 0;
425 
426 	epcm = runtime->private_data;
427 
428 	if (epcm->voice) {
429 		epcm->voice->use = 0;
430 		epcm->voice->epcm = NULL;
431 		epcm->voice = NULL;
432 	}
433 
434 	return 0;
435 }
436 
437 /* prepare callback */
snd_emu10k1x_pcm_prepare(struct snd_pcm_substream * substream)438 static int snd_emu10k1x_pcm_prepare(struct snd_pcm_substream *substream)
439 {
440 	struct emu10k1x *emu = snd_pcm_substream_chip(substream);
441 	struct snd_pcm_runtime *runtime = substream->runtime;
442 	struct emu10k1x_pcm *epcm = runtime->private_data;
443 	int voice = epcm->voice->number;
444 	u32 *table_base = (u32 *)(emu->dma_buffer.area+1024*voice);
445 	u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
446 	int i;
447 
448 	for(i = 0; i < runtime->periods; i++) {
449 		*table_base++=runtime->dma_addr+(i*period_size_bytes);
450 		*table_base++=period_size_bytes<<16;
451 	}
452 
453 	snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer.addr+1024*voice);
454 	snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19);
455 	snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0);
456 	snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0);
457 	snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0);
458 	snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0);
459 	snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr);
460 
461 	snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16);
462 
463 	return 0;
464 }
465 
466 /* trigger callback */
snd_emu10k1x_pcm_trigger(struct snd_pcm_substream * substream,int cmd)467 static int snd_emu10k1x_pcm_trigger(struct snd_pcm_substream *substream,
468 				    int cmd)
469 {
470 	struct emu10k1x *emu = snd_pcm_substream_chip(substream);
471 	struct snd_pcm_runtime *runtime = substream->runtime;
472 	struct emu10k1x_pcm *epcm = runtime->private_data;
473 	int channel = epcm->voice->number;
474 	int result = 0;
475 
476 	/*
477 	dev_dbg(emu->card->dev,
478 		"trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n",
479 		(int)emu, cmd, (int)substream->ops->pointer(substream));
480 	*/
481 
482 	switch (cmd) {
483 	case SNDRV_PCM_TRIGGER_START:
484 		if(runtime->periods == 2)
485 			snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
486 		else
487 			snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel);
488 		epcm->running = 1;
489 		snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel));
490 		break;
491 	case SNDRV_PCM_TRIGGER_STOP:
492 		epcm->running = 0;
493 		snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
494 		snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel));
495 		break;
496 	default:
497 		result = -EINVAL;
498 		break;
499 	}
500 	return result;
501 }
502 
503 /* pointer callback */
504 static snd_pcm_uframes_t
snd_emu10k1x_pcm_pointer(struct snd_pcm_substream * substream)505 snd_emu10k1x_pcm_pointer(struct snd_pcm_substream *substream)
506 {
507 	struct emu10k1x *emu = snd_pcm_substream_chip(substream);
508 	struct snd_pcm_runtime *runtime = substream->runtime;
509 	struct emu10k1x_pcm *epcm = runtime->private_data;
510 	int channel = epcm->voice->number;
511 	snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0;
512 
513 	if (!epcm->running)
514 		return 0;
515 
516 	ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
517 	ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
518 	ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
519 
520 	if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size))
521 		return 0;
522 
523 	if (ptr3 != ptr4)
524 		ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
525 	ptr2 = bytes_to_frames(runtime, ptr1);
526 	ptr2 += (ptr4 >> 3) * runtime->period_size;
527 	ptr = ptr2;
528 
529 	if (ptr >= runtime->buffer_size)
530 		ptr -= runtime->buffer_size;
531 
532 	return ptr;
533 }
534 
535 /* operators */
536 static const struct snd_pcm_ops snd_emu10k1x_playback_ops = {
537 	.open =        snd_emu10k1x_playback_open,
538 	.close =       snd_emu10k1x_playback_close,
539 	.hw_params =   snd_emu10k1x_pcm_hw_params,
540 	.hw_free =     snd_emu10k1x_pcm_hw_free,
541 	.prepare =     snd_emu10k1x_pcm_prepare,
542 	.trigger =     snd_emu10k1x_pcm_trigger,
543 	.pointer =     snd_emu10k1x_pcm_pointer,
544 };
545 
546 /* open_capture callback */
snd_emu10k1x_pcm_open_capture(struct snd_pcm_substream * substream)547 static int snd_emu10k1x_pcm_open_capture(struct snd_pcm_substream *substream)
548 {
549 	struct emu10k1x *chip = snd_pcm_substream_chip(substream);
550 	struct emu10k1x_pcm *epcm;
551 	struct snd_pcm_runtime *runtime = substream->runtime;
552 	int err;
553 
554 	if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
555                 return err;
556 	if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
557                 return err;
558 
559 	epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
560 	if (epcm == NULL)
561 		return -ENOMEM;
562 
563 	epcm->emu = chip;
564 	epcm->substream = substream;
565 
566 	runtime->private_data = epcm;
567 	runtime->private_free = snd_emu10k1x_pcm_free_substream;
568 
569 	runtime->hw = snd_emu10k1x_capture_hw;
570 
571 	return 0;
572 }
573 
574 /* close callback */
snd_emu10k1x_pcm_close_capture(struct snd_pcm_substream * substream)575 static int snd_emu10k1x_pcm_close_capture(struct snd_pcm_substream *substream)
576 {
577 	return 0;
578 }
579 
580 /* hw_params callback */
snd_emu10k1x_pcm_hw_params_capture(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)581 static int snd_emu10k1x_pcm_hw_params_capture(struct snd_pcm_substream *substream,
582 					      struct snd_pcm_hw_params *hw_params)
583 {
584 	struct snd_pcm_runtime *runtime = substream->runtime;
585 	struct emu10k1x_pcm *epcm = runtime->private_data;
586 
587 	if (! epcm->voice) {
588 		if (epcm->emu->capture_voice.use)
589 			return -EBUSY;
590 		epcm->voice = &epcm->emu->capture_voice;
591 		epcm->voice->epcm = epcm;
592 		epcm->voice->use = 1;
593 	}
594 
595 	return 0;
596 }
597 
598 /* hw_free callback */
snd_emu10k1x_pcm_hw_free_capture(struct snd_pcm_substream * substream)599 static int snd_emu10k1x_pcm_hw_free_capture(struct snd_pcm_substream *substream)
600 {
601 	struct snd_pcm_runtime *runtime = substream->runtime;
602 
603 	struct emu10k1x_pcm *epcm;
604 
605 	if (runtime->private_data == NULL)
606 		return 0;
607 	epcm = runtime->private_data;
608 
609 	if (epcm->voice) {
610 		epcm->voice->use = 0;
611 		epcm->voice->epcm = NULL;
612 		epcm->voice = NULL;
613 	}
614 
615 	return 0;
616 }
617 
618 /* prepare capture callback */
snd_emu10k1x_pcm_prepare_capture(struct snd_pcm_substream * substream)619 static int snd_emu10k1x_pcm_prepare_capture(struct snd_pcm_substream *substream)
620 {
621 	struct emu10k1x *emu = snd_pcm_substream_chip(substream);
622 	struct snd_pcm_runtime *runtime = substream->runtime;
623 
624 	snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr);
625 	snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
626 	snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0);
627 	snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0);
628 
629 	return 0;
630 }
631 
632 /* trigger_capture callback */
snd_emu10k1x_pcm_trigger_capture(struct snd_pcm_substream * substream,int cmd)633 static int snd_emu10k1x_pcm_trigger_capture(struct snd_pcm_substream *substream,
634 					    int cmd)
635 {
636 	struct emu10k1x *emu = snd_pcm_substream_chip(substream);
637 	struct snd_pcm_runtime *runtime = substream->runtime;
638 	struct emu10k1x_pcm *epcm = runtime->private_data;
639 	int result = 0;
640 
641 	switch (cmd) {
642 	case SNDRV_PCM_TRIGGER_START:
643 		snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP |
644 					 INTE_CAP_0_HALF_LOOP);
645 		snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE);
646 		epcm->running = 1;
647 		break;
648 	case SNDRV_PCM_TRIGGER_STOP:
649 		epcm->running = 0;
650 		snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP |
651 					  INTE_CAP_0_HALF_LOOP);
652 		snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE));
653 		break;
654 	default:
655 		result = -EINVAL;
656 		break;
657 	}
658 	return result;
659 }
660 
661 /* pointer_capture callback */
662 static snd_pcm_uframes_t
snd_emu10k1x_pcm_pointer_capture(struct snd_pcm_substream * substream)663 snd_emu10k1x_pcm_pointer_capture(struct snd_pcm_substream *substream)
664 {
665 	struct emu10k1x *emu = snd_pcm_substream_chip(substream);
666 	struct snd_pcm_runtime *runtime = substream->runtime;
667 	struct emu10k1x_pcm *epcm = runtime->private_data;
668 	snd_pcm_uframes_t ptr;
669 
670 	if (!epcm->running)
671 		return 0;
672 
673 	ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0));
674 	if (ptr >= runtime->buffer_size)
675 		ptr -= runtime->buffer_size;
676 
677 	return ptr;
678 }
679 
680 static const struct snd_pcm_ops snd_emu10k1x_capture_ops = {
681 	.open =        snd_emu10k1x_pcm_open_capture,
682 	.close =       snd_emu10k1x_pcm_close_capture,
683 	.hw_params =   snd_emu10k1x_pcm_hw_params_capture,
684 	.hw_free =     snd_emu10k1x_pcm_hw_free_capture,
685 	.prepare =     snd_emu10k1x_pcm_prepare_capture,
686 	.trigger =     snd_emu10k1x_pcm_trigger_capture,
687 	.pointer =     snd_emu10k1x_pcm_pointer_capture,
688 };
689 
snd_emu10k1x_ac97_read(struct snd_ac97 * ac97,unsigned short reg)690 static unsigned short snd_emu10k1x_ac97_read(struct snd_ac97 *ac97,
691 					     unsigned short reg)
692 {
693 	struct emu10k1x *emu = ac97->private_data;
694 	unsigned long flags;
695 	unsigned short val;
696 
697 	spin_lock_irqsave(&emu->emu_lock, flags);
698 	outb(reg, emu->port + AC97ADDRESS);
699 	val = inw(emu->port + AC97DATA);
700 	spin_unlock_irqrestore(&emu->emu_lock, flags);
701 	return val;
702 }
703 
snd_emu10k1x_ac97_write(struct snd_ac97 * ac97,unsigned short reg,unsigned short val)704 static void snd_emu10k1x_ac97_write(struct snd_ac97 *ac97,
705 				    unsigned short reg, unsigned short val)
706 {
707 	struct emu10k1x *emu = ac97->private_data;
708 	unsigned long flags;
709 
710 	spin_lock_irqsave(&emu->emu_lock, flags);
711 	outb(reg, emu->port + AC97ADDRESS);
712 	outw(val, emu->port + AC97DATA);
713 	spin_unlock_irqrestore(&emu->emu_lock, flags);
714 }
715 
snd_emu10k1x_ac97(struct emu10k1x * chip)716 static int snd_emu10k1x_ac97(struct emu10k1x *chip)
717 {
718 	struct snd_ac97_bus *pbus;
719 	struct snd_ac97_template ac97;
720 	int err;
721 	static const struct snd_ac97_bus_ops ops = {
722 		.write = snd_emu10k1x_ac97_write,
723 		.read = snd_emu10k1x_ac97_read,
724 	};
725 
726 	if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
727 		return err;
728 	pbus->no_vra = 1; /* we don't need VRA */
729 
730 	memset(&ac97, 0, sizeof(ac97));
731 	ac97.private_data = chip;
732 	ac97.scaps = AC97_SCAP_NO_SPDIF;
733 	return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
734 }
735 
snd_emu10k1x_free(struct emu10k1x * chip)736 static int snd_emu10k1x_free(struct emu10k1x *chip)
737 {
738 	snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0);
739 	// disable interrupts
740 	outl(0, chip->port + INTE);
741 	// disable audio
742 	outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG);
743 
744 	/* release the irq */
745 	if (chip->irq >= 0)
746 		free_irq(chip->irq, chip);
747 
748 	// release the i/o port
749 	release_and_free_resource(chip->res_port);
750 
751 	// release the DMA
752 	if (chip->dma_buffer.area) {
753 		snd_dma_free_pages(&chip->dma_buffer);
754 	}
755 
756 	pci_disable_device(chip->pci);
757 
758 	// release the data
759 	kfree(chip);
760 	return 0;
761 }
762 
snd_emu10k1x_dev_free(struct snd_device * device)763 static int snd_emu10k1x_dev_free(struct snd_device *device)
764 {
765 	struct emu10k1x *chip = device->device_data;
766 	return snd_emu10k1x_free(chip);
767 }
768 
snd_emu10k1x_interrupt(int irq,void * dev_id)769 static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id)
770 {
771 	unsigned int status;
772 
773 	struct emu10k1x *chip = dev_id;
774 	struct emu10k1x_voice *pvoice = chip->voices;
775 	int i;
776 	int mask;
777 
778 	status = inl(chip->port + IPR);
779 
780 	if (! status)
781 		return IRQ_NONE;
782 
783 	// capture interrupt
784 	if (status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) {
785 		struct emu10k1x_voice *cap_voice = &chip->capture_voice;
786 		if (cap_voice->use)
787 			snd_emu10k1x_pcm_interrupt(chip, cap_voice);
788 		else
789 			snd_emu10k1x_intr_disable(chip,
790 						  INTE_CAP_0_LOOP |
791 						  INTE_CAP_0_HALF_LOOP);
792 	}
793 
794 	mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP;
795 	for (i = 0; i < 3; i++) {
796 		if (status & mask) {
797 			if (pvoice->use)
798 				snd_emu10k1x_pcm_interrupt(chip, pvoice);
799 			else
800 				snd_emu10k1x_intr_disable(chip, mask);
801 		}
802 		pvoice++;
803 		mask <<= 1;
804 	}
805 
806 	if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
807 		if (chip->midi.interrupt)
808 			chip->midi.interrupt(chip, status);
809 		else
810 			snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
811 	}
812 
813 	// acknowledge the interrupt if necessary
814 	outl(status, chip->port + IPR);
815 
816 	/* dev_dbg(chip->card->dev, "interrupt %08x\n", status); */
817 	return IRQ_HANDLED;
818 }
819 
820 static const struct snd_pcm_chmap_elem surround_map[] = {
821 	{ .channels = 2,
822 	  .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } },
823 	{ }
824 };
825 
826 static const struct snd_pcm_chmap_elem clfe_map[] = {
827 	{ .channels = 2,
828 	  .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } },
829 	{ }
830 };
831 
snd_emu10k1x_pcm(struct emu10k1x * emu,int device)832 static int snd_emu10k1x_pcm(struct emu10k1x *emu, int device)
833 {
834 	struct snd_pcm *pcm;
835 	const struct snd_pcm_chmap_elem *map = NULL;
836 	int err;
837 	int capture = 0;
838 
839 	if (device == 0)
840 		capture = 1;
841 
842 	if ((err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm)) < 0)
843 		return err;
844 
845 	pcm->private_data = emu;
846 
847 	switch(device) {
848 	case 0:
849 		snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
850 		snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops);
851 		break;
852 	case 1:
853 	case 2:
854 		snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
855 		break;
856 	}
857 
858 	pcm->info_flags = 0;
859 	switch(device) {
860 	case 0:
861 		strcpy(pcm->name, "EMU10K1X Front");
862 		map = snd_pcm_std_chmaps;
863 		break;
864 	case 1:
865 		strcpy(pcm->name, "EMU10K1X Rear");
866 		map = surround_map;
867 		break;
868 	case 2:
869 		strcpy(pcm->name, "EMU10K1X Center/LFE");
870 		map = clfe_map;
871 		break;
872 	}
873 	emu->pcm = pcm;
874 
875 	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
876 				       &emu->pci->dev, 32*1024, 32*1024);
877 
878 	return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2,
879 				     1 << 2, NULL);
880 }
881 
snd_emu10k1x_create(struct snd_card * card,struct pci_dev * pci,struct emu10k1x ** rchip)882 static int snd_emu10k1x_create(struct snd_card *card,
883 			       struct pci_dev *pci,
884 			       struct emu10k1x **rchip)
885 {
886 	struct emu10k1x *chip;
887 	int err;
888 	int ch;
889 	static const struct snd_device_ops ops = {
890 		.dev_free = snd_emu10k1x_dev_free,
891 	};
892 
893 	*rchip = NULL;
894 
895 	if ((err = pci_enable_device(pci)) < 0)
896 		return err;
897 	if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
898 	    pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
899 		dev_err(card->dev, "error to set 28bit mask DMA\n");
900 		pci_disable_device(pci);
901 		return -ENXIO;
902 	}
903 
904 	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
905 	if (chip == NULL) {
906 		pci_disable_device(pci);
907 		return -ENOMEM;
908 	}
909 
910 	chip->card = card;
911 	chip->pci = pci;
912 	chip->irq = -1;
913 
914 	spin_lock_init(&chip->emu_lock);
915 	spin_lock_init(&chip->voice_lock);
916 
917 	chip->port = pci_resource_start(pci, 0);
918 	if ((chip->res_port = request_region(chip->port, 8,
919 					     "EMU10K1X")) == NULL) {
920 		dev_err(card->dev, "cannot allocate the port 0x%lx\n",
921 			chip->port);
922 		snd_emu10k1x_free(chip);
923 		return -EBUSY;
924 	}
925 
926 	if (request_irq(pci->irq, snd_emu10k1x_interrupt,
927 			IRQF_SHARED, KBUILD_MODNAME, chip)) {
928 		dev_err(card->dev, "cannot grab irq %d\n", pci->irq);
929 		snd_emu10k1x_free(chip);
930 		return -EBUSY;
931 	}
932 	chip->irq = pci->irq;
933 	card->sync_irq = chip->irq;
934 
935 	if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev,
936 				4 * 1024, &chip->dma_buffer) < 0) {
937 		snd_emu10k1x_free(chip);
938 		return -ENOMEM;
939 	}
940 
941 	pci_set_master(pci);
942 	/* read revision & serial */
943 	chip->revision = pci->revision;
944 	pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
945 	pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
946 	dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n", chip->model,
947 		   chip->revision, chip->serial);
948 
949 	outl(0, chip->port + INTE);
950 
951 	for(ch = 0; ch < 3; ch++) {
952 		chip->voices[ch].emu = chip;
953 		chip->voices[ch].number = ch;
954 	}
955 
956 	/*
957 	 *  Init to 0x02109204 :
958 	 *  Clock accuracy    = 0     (1000ppm)
959 	 *  Sample Rate       = 2     (48kHz)
960 	 *  Audio Channel     = 1     (Left of 2)
961 	 *  Source Number     = 0     (Unspecified)
962 	 *  Generation Status = 1     (Original for Cat Code 12)
963 	 *  Cat Code          = 12    (Digital Signal Mixer)
964 	 *  Mode              = 0     (Mode 0)
965 	 *  Emphasis          = 0     (None)
966 	 *  CP                = 1     (Copyright unasserted)
967 	 *  AN                = 0     (Audio data)
968 	 *  P                 = 0     (Consumer)
969 	 */
970 	snd_emu10k1x_ptr_write(chip, SPCS0, 0,
971 			       chip->spdif_bits[0] =
972 			       SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
973 			       SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
974 			       SPCS_GENERATIONSTATUS | 0x00001200 |
975 			       0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
976 	snd_emu10k1x_ptr_write(chip, SPCS1, 0,
977 			       chip->spdif_bits[1] =
978 			       SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
979 			       SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
980 			       SPCS_GENERATIONSTATUS | 0x00001200 |
981 			       0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
982 	snd_emu10k1x_ptr_write(chip, SPCS2, 0,
983 			       chip->spdif_bits[2] =
984 			       SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
985 			       SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
986 			       SPCS_GENERATIONSTATUS | 0x00001200 |
987 			       0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
988 
989 	snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF
990 	snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing
991 	snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode
992 
993 	outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG);
994 
995 	if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
996 				  chip, &ops)) < 0) {
997 		snd_emu10k1x_free(chip);
998 		return err;
999 	}
1000 	*rchip = chip;
1001 	return 0;
1002 }
1003 
snd_emu10k1x_proc_reg_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)1004 static void snd_emu10k1x_proc_reg_read(struct snd_info_entry *entry,
1005 				       struct snd_info_buffer *buffer)
1006 {
1007 	struct emu10k1x *emu = entry->private_data;
1008 	unsigned long value,value1,value2;
1009 	unsigned long flags;
1010 	int i;
1011 
1012 	snd_iprintf(buffer, "Registers:\n\n");
1013 	for(i = 0; i < 0x20; i+=4) {
1014 		spin_lock_irqsave(&emu->emu_lock, flags);
1015 		value = inl(emu->port + i);
1016 		spin_unlock_irqrestore(&emu->emu_lock, flags);
1017 		snd_iprintf(buffer, "Register %02X: %08lX\n", i, value);
1018 	}
1019 	snd_iprintf(buffer, "\nRegisters\n\n");
1020 	for(i = 0; i <= 0x48; i++) {
1021 		value = snd_emu10k1x_ptr_read(emu, i, 0);
1022 		if(i < 0x10 || (i >= 0x20 && i < 0x40)) {
1023 			value1 = snd_emu10k1x_ptr_read(emu, i, 1);
1024 			value2 = snd_emu10k1x_ptr_read(emu, i, 2);
1025 			snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2);
1026 		} else {
1027 			snd_iprintf(buffer, "%02X: %08lX\n", i, value);
1028 		}
1029 	}
1030 }
1031 
snd_emu10k1x_proc_reg_write(struct snd_info_entry * entry,struct snd_info_buffer * buffer)1032 static void snd_emu10k1x_proc_reg_write(struct snd_info_entry *entry,
1033 					struct snd_info_buffer *buffer)
1034 {
1035 	struct emu10k1x *emu = entry->private_data;
1036 	char line[64];
1037 	unsigned int reg, channel_id , val;
1038 
1039 	while (!snd_info_get_line(buffer, line, sizeof(line))) {
1040 		if (sscanf(line, "%x %x %x", &reg, &channel_id, &val) != 3)
1041 			continue;
1042 
1043 		if (reg < 0x49 && channel_id <= 2)
1044 			snd_emu10k1x_ptr_write(emu, reg, channel_id, val);
1045 	}
1046 }
1047 
snd_emu10k1x_proc_init(struct emu10k1x * emu)1048 static int snd_emu10k1x_proc_init(struct emu10k1x *emu)
1049 {
1050 	snd_card_rw_proc_new(emu->card, "emu10k1x_regs", emu,
1051 			     snd_emu10k1x_proc_reg_read,
1052 			     snd_emu10k1x_proc_reg_write);
1053 	return 0;
1054 }
1055 
1056 #define snd_emu10k1x_shared_spdif_info	snd_ctl_boolean_mono_info
1057 
snd_emu10k1x_shared_spdif_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1058 static int snd_emu10k1x_shared_spdif_get(struct snd_kcontrol *kcontrol,
1059 					 struct snd_ctl_elem_value *ucontrol)
1060 {
1061 	struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1062 
1063 	ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1;
1064 
1065 	return 0;
1066 }
1067 
snd_emu10k1x_shared_spdif_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1068 static int snd_emu10k1x_shared_spdif_put(struct snd_kcontrol *kcontrol,
1069 					 struct snd_ctl_elem_value *ucontrol)
1070 {
1071 	struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1072 	unsigned int val;
1073 
1074 	val = ucontrol->value.integer.value[0] ;
1075 
1076 	if (val) {
1077 		// enable spdif output
1078 		snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000);
1079 		snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700);
1080 		snd_emu10k1x_gpio_write(emu, 0x1000);
1081 	} else {
1082 		// disable spdif output
1083 		snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700);
1084 		snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F);
1085 		snd_emu10k1x_gpio_write(emu, 0x1080);
1086 	}
1087 	return 0;
1088 }
1089 
1090 static const struct snd_kcontrol_new snd_emu10k1x_shared_spdif =
1091 {
1092 	.iface =	SNDRV_CTL_ELEM_IFACE_MIXER,
1093 	.name =		"Analog/Digital Output Jack",
1094 	.info =		snd_emu10k1x_shared_spdif_info,
1095 	.get =		snd_emu10k1x_shared_spdif_get,
1096 	.put =		snd_emu10k1x_shared_spdif_put
1097 };
1098 
snd_emu10k1x_spdif_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1099 static int snd_emu10k1x_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1100 {
1101 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1102 	uinfo->count = 1;
1103 	return 0;
1104 }
1105 
snd_emu10k1x_spdif_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1106 static int snd_emu10k1x_spdif_get(struct snd_kcontrol *kcontrol,
1107 				  struct snd_ctl_elem_value *ucontrol)
1108 {
1109 	struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1110 	unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1111 
1112 	ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff;
1113 	ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff;
1114 	ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff;
1115 	ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff;
1116 	return 0;
1117 }
1118 
snd_emu10k1x_spdif_get_mask(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1119 static int snd_emu10k1x_spdif_get_mask(struct snd_kcontrol *kcontrol,
1120 				       struct snd_ctl_elem_value *ucontrol)
1121 {
1122 	ucontrol->value.iec958.status[0] = 0xff;
1123 	ucontrol->value.iec958.status[1] = 0xff;
1124 	ucontrol->value.iec958.status[2] = 0xff;
1125 	ucontrol->value.iec958.status[3] = 0xff;
1126 	return 0;
1127 }
1128 
snd_emu10k1x_spdif_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1129 static int snd_emu10k1x_spdif_put(struct snd_kcontrol *kcontrol,
1130 				  struct snd_ctl_elem_value *ucontrol)
1131 {
1132 	struct emu10k1x *emu = snd_kcontrol_chip(kcontrol);
1133 	unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1134 	int change;
1135 	unsigned int val;
1136 
1137 	val = (ucontrol->value.iec958.status[0] << 0) |
1138 		(ucontrol->value.iec958.status[1] << 8) |
1139 		(ucontrol->value.iec958.status[2] << 16) |
1140 		(ucontrol->value.iec958.status[3] << 24);
1141 	change = val != emu->spdif_bits[idx];
1142 	if (change) {
1143 		snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val);
1144 		emu->spdif_bits[idx] = val;
1145 	}
1146 	return change;
1147 }
1148 
1149 static const struct snd_kcontrol_new snd_emu10k1x_spdif_mask_control =
1150 {
1151 	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
1152 	.iface =        SNDRV_CTL_ELEM_IFACE_PCM,
1153 	.name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
1154 	.count =	3,
1155 	.info =         snd_emu10k1x_spdif_info,
1156 	.get =          snd_emu10k1x_spdif_get_mask
1157 };
1158 
1159 static const struct snd_kcontrol_new snd_emu10k1x_spdif_control =
1160 {
1161 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1162 	.name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1163 	.count =	3,
1164 	.info =         snd_emu10k1x_spdif_info,
1165 	.get =          snd_emu10k1x_spdif_get,
1166 	.put =          snd_emu10k1x_spdif_put
1167 };
1168 
snd_emu10k1x_mixer(struct emu10k1x * emu)1169 static int snd_emu10k1x_mixer(struct emu10k1x *emu)
1170 {
1171 	int err;
1172 	struct snd_kcontrol *kctl;
1173 	struct snd_card *card = emu->card;
1174 
1175 	if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu)) == NULL)
1176 		return -ENOMEM;
1177 	if ((err = snd_ctl_add(card, kctl)))
1178 		return err;
1179 	if ((kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu)) == NULL)
1180 		return -ENOMEM;
1181 	if ((err = snd_ctl_add(card, kctl)))
1182 		return err;
1183 	if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu)) == NULL)
1184 		return -ENOMEM;
1185 	if ((err = snd_ctl_add(card, kctl)))
1186 		return err;
1187 
1188 	return 0;
1189 }
1190 
1191 #define EMU10K1X_MIDI_MODE_INPUT	(1<<0)
1192 #define EMU10K1X_MIDI_MODE_OUTPUT	(1<<1)
1193 
mpu401_read(struct emu10k1x * emu,struct emu10k1x_midi * mpu,int idx)1194 static inline unsigned char mpu401_read(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int idx)
1195 {
1196 	return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0);
1197 }
1198 
mpu401_write(struct emu10k1x * emu,struct emu10k1x_midi * mpu,int data,int idx)1199 static inline void mpu401_write(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int data, int idx)
1200 {
1201 	snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data);
1202 }
1203 
1204 #define mpu401_write_data(emu, mpu, data)	mpu401_write(emu, mpu, data, 0)
1205 #define mpu401_write_cmd(emu, mpu, data)	mpu401_write(emu, mpu, data, 1)
1206 #define mpu401_read_data(emu, mpu)		mpu401_read(emu, mpu, 0)
1207 #define mpu401_read_stat(emu, mpu)		mpu401_read(emu, mpu, 1)
1208 
1209 #define mpu401_input_avail(emu,mpu)	(!(mpu401_read_stat(emu,mpu) & 0x80))
1210 #define mpu401_output_ready(emu,mpu)	(!(mpu401_read_stat(emu,mpu) & 0x40))
1211 
1212 #define MPU401_RESET		0xff
1213 #define MPU401_ENTER_UART	0x3f
1214 #define MPU401_ACK		0xfe
1215 
mpu401_clear_rx(struct emu10k1x * emu,struct emu10k1x_midi * mpu)1216 static void mpu401_clear_rx(struct emu10k1x *emu, struct emu10k1x_midi *mpu)
1217 {
1218 	int timeout = 100000;
1219 	for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--)
1220 		mpu401_read_data(emu, mpu);
1221 #ifdef CONFIG_SND_DEBUG
1222 	if (timeout <= 0)
1223 		dev_err(emu->card->dev,
1224 			"cmd: clear rx timeout (status = 0x%x)\n",
1225 			mpu401_read_stat(emu, mpu));
1226 #endif
1227 }
1228 
1229 /*
1230 
1231  */
1232 
do_emu10k1x_midi_interrupt(struct emu10k1x * emu,struct emu10k1x_midi * midi,unsigned int status)1233 static void do_emu10k1x_midi_interrupt(struct emu10k1x *emu,
1234 				       struct emu10k1x_midi *midi, unsigned int status)
1235 {
1236 	unsigned char byte;
1237 
1238 	if (midi->rmidi == NULL) {
1239 		snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable);
1240 		return;
1241 	}
1242 
1243 	spin_lock(&midi->input_lock);
1244 	if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) {
1245 		if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1246 			mpu401_clear_rx(emu, midi);
1247 		} else {
1248 			byte = mpu401_read_data(emu, midi);
1249 			if (midi->substream_input)
1250 				snd_rawmidi_receive(midi->substream_input, &byte, 1);
1251 		}
1252 	}
1253 	spin_unlock(&midi->input_lock);
1254 
1255 	spin_lock(&midi->output_lock);
1256 	if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) {
1257 		if (midi->substream_output &&
1258 		    snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) {
1259 			mpu401_write_data(emu, midi, byte);
1260 		} else {
1261 			snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1262 		}
1263 	}
1264 	spin_unlock(&midi->output_lock);
1265 }
1266 
snd_emu10k1x_midi_interrupt(struct emu10k1x * emu,unsigned int status)1267 static void snd_emu10k1x_midi_interrupt(struct emu10k1x *emu, unsigned int status)
1268 {
1269 	do_emu10k1x_midi_interrupt(emu, &emu->midi, status);
1270 }
1271 
snd_emu10k1x_midi_cmd(struct emu10k1x * emu,struct emu10k1x_midi * midi,unsigned char cmd,int ack)1272 static int snd_emu10k1x_midi_cmd(struct emu10k1x * emu,
1273 				  struct emu10k1x_midi *midi, unsigned char cmd, int ack)
1274 {
1275 	unsigned long flags;
1276 	int timeout, ok;
1277 
1278 	spin_lock_irqsave(&midi->input_lock, flags);
1279 	mpu401_write_data(emu, midi, 0x00);
1280 	/* mpu401_clear_rx(emu, midi); */
1281 
1282 	mpu401_write_cmd(emu, midi, cmd);
1283 	if (ack) {
1284 		ok = 0;
1285 		timeout = 10000;
1286 		while (!ok && timeout-- > 0) {
1287 			if (mpu401_input_avail(emu, midi)) {
1288 				if (mpu401_read_data(emu, midi) == MPU401_ACK)
1289 					ok = 1;
1290 			}
1291 		}
1292 		if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK)
1293 			ok = 1;
1294 	} else {
1295 		ok = 1;
1296 	}
1297 	spin_unlock_irqrestore(&midi->input_lock, flags);
1298 	if (!ok) {
1299 		dev_err(emu->card->dev,
1300 			"midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n",
1301 			   cmd, emu->port,
1302 			   mpu401_read_stat(emu, midi),
1303 			   mpu401_read_data(emu, midi));
1304 		return 1;
1305 	}
1306 	return 0;
1307 }
1308 
snd_emu10k1x_midi_input_open(struct snd_rawmidi_substream * substream)1309 static int snd_emu10k1x_midi_input_open(struct snd_rawmidi_substream *substream)
1310 {
1311 	struct emu10k1x *emu;
1312 	struct emu10k1x_midi *midi = substream->rmidi->private_data;
1313 	unsigned long flags;
1314 
1315 	emu = midi->emu;
1316 	if (snd_BUG_ON(!emu))
1317 		return -ENXIO;
1318 	spin_lock_irqsave(&midi->open_lock, flags);
1319 	midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT;
1320 	midi->substream_input = substream;
1321 	if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
1322 		spin_unlock_irqrestore(&midi->open_lock, flags);
1323 		if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
1324 			goto error_out;
1325 		if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
1326 			goto error_out;
1327 	} else {
1328 		spin_unlock_irqrestore(&midi->open_lock, flags);
1329 	}
1330 	return 0;
1331 
1332 error_out:
1333 	return -EIO;
1334 }
1335 
snd_emu10k1x_midi_output_open(struct snd_rawmidi_substream * substream)1336 static int snd_emu10k1x_midi_output_open(struct snd_rawmidi_substream *substream)
1337 {
1338 	struct emu10k1x *emu;
1339 	struct emu10k1x_midi *midi = substream->rmidi->private_data;
1340 	unsigned long flags;
1341 
1342 	emu = midi->emu;
1343 	if (snd_BUG_ON(!emu))
1344 		return -ENXIO;
1345 	spin_lock_irqsave(&midi->open_lock, flags);
1346 	midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT;
1347 	midi->substream_output = substream;
1348 	if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1349 		spin_unlock_irqrestore(&midi->open_lock, flags);
1350 		if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1))
1351 			goto error_out;
1352 		if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1))
1353 			goto error_out;
1354 	} else {
1355 		spin_unlock_irqrestore(&midi->open_lock, flags);
1356 	}
1357 	return 0;
1358 
1359 error_out:
1360 	return -EIO;
1361 }
1362 
snd_emu10k1x_midi_input_close(struct snd_rawmidi_substream * substream)1363 static int snd_emu10k1x_midi_input_close(struct snd_rawmidi_substream *substream)
1364 {
1365 	struct emu10k1x *emu;
1366 	struct emu10k1x_midi *midi = substream->rmidi->private_data;
1367 	unsigned long flags;
1368 	int err = 0;
1369 
1370 	emu = midi->emu;
1371 	if (snd_BUG_ON(!emu))
1372 		return -ENXIO;
1373 	spin_lock_irqsave(&midi->open_lock, flags);
1374 	snd_emu10k1x_intr_disable(emu, midi->rx_enable);
1375 	midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT;
1376 	midi->substream_input = NULL;
1377 	if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
1378 		spin_unlock_irqrestore(&midi->open_lock, flags);
1379 		err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
1380 	} else {
1381 		spin_unlock_irqrestore(&midi->open_lock, flags);
1382 	}
1383 	return err;
1384 }
1385 
snd_emu10k1x_midi_output_close(struct snd_rawmidi_substream * substream)1386 static int snd_emu10k1x_midi_output_close(struct snd_rawmidi_substream *substream)
1387 {
1388 	struct emu10k1x *emu;
1389 	struct emu10k1x_midi *midi = substream->rmidi->private_data;
1390 	unsigned long flags;
1391 	int err = 0;
1392 
1393 	emu = midi->emu;
1394 	if (snd_BUG_ON(!emu))
1395 		return -ENXIO;
1396 	spin_lock_irqsave(&midi->open_lock, flags);
1397 	snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1398 	midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT;
1399 	midi->substream_output = NULL;
1400 	if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
1401 		spin_unlock_irqrestore(&midi->open_lock, flags);
1402 		err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
1403 	} else {
1404 		spin_unlock_irqrestore(&midi->open_lock, flags);
1405 	}
1406 	return err;
1407 }
1408 
snd_emu10k1x_midi_input_trigger(struct snd_rawmidi_substream * substream,int up)1409 static void snd_emu10k1x_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1410 {
1411 	struct emu10k1x *emu;
1412 	struct emu10k1x_midi *midi = substream->rmidi->private_data;
1413 	emu = midi->emu;
1414 	if (snd_BUG_ON(!emu))
1415 		return;
1416 
1417 	if (up)
1418 		snd_emu10k1x_intr_enable(emu, midi->rx_enable);
1419 	else
1420 		snd_emu10k1x_intr_disable(emu, midi->rx_enable);
1421 }
1422 
snd_emu10k1x_midi_output_trigger(struct snd_rawmidi_substream * substream,int up)1423 static void snd_emu10k1x_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1424 {
1425 	struct emu10k1x *emu;
1426 	struct emu10k1x_midi *midi = substream->rmidi->private_data;
1427 	unsigned long flags;
1428 
1429 	emu = midi->emu;
1430 	if (snd_BUG_ON(!emu))
1431 		return;
1432 
1433 	if (up) {
1434 		int max = 4;
1435 		unsigned char byte;
1436 
1437 		/* try to send some amount of bytes here before interrupts */
1438 		spin_lock_irqsave(&midi->output_lock, flags);
1439 		while (max > 0) {
1440 			if (mpu401_output_ready(emu, midi)) {
1441 				if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) ||
1442 				    snd_rawmidi_transmit(substream, &byte, 1) != 1) {
1443 					/* no more data */
1444 					spin_unlock_irqrestore(&midi->output_lock, flags);
1445 					return;
1446 				}
1447 				mpu401_write_data(emu, midi, byte);
1448 				max--;
1449 			} else {
1450 				break;
1451 			}
1452 		}
1453 		spin_unlock_irqrestore(&midi->output_lock, flags);
1454 		snd_emu10k1x_intr_enable(emu, midi->tx_enable);
1455 	} else {
1456 		snd_emu10k1x_intr_disable(emu, midi->tx_enable);
1457 	}
1458 }
1459 
1460 /*
1461 
1462  */
1463 
1464 static const struct snd_rawmidi_ops snd_emu10k1x_midi_output =
1465 {
1466 	.open =		snd_emu10k1x_midi_output_open,
1467 	.close =	snd_emu10k1x_midi_output_close,
1468 	.trigger =	snd_emu10k1x_midi_output_trigger,
1469 };
1470 
1471 static const struct snd_rawmidi_ops snd_emu10k1x_midi_input =
1472 {
1473 	.open =		snd_emu10k1x_midi_input_open,
1474 	.close =	snd_emu10k1x_midi_input_close,
1475 	.trigger =	snd_emu10k1x_midi_input_trigger,
1476 };
1477 
snd_emu10k1x_midi_free(struct snd_rawmidi * rmidi)1478 static void snd_emu10k1x_midi_free(struct snd_rawmidi *rmidi)
1479 {
1480 	struct emu10k1x_midi *midi = rmidi->private_data;
1481 	midi->interrupt = NULL;
1482 	midi->rmidi = NULL;
1483 }
1484 
emu10k1x_midi_init(struct emu10k1x * emu,struct emu10k1x_midi * midi,int device,char * name)1485 static int emu10k1x_midi_init(struct emu10k1x *emu,
1486 			      struct emu10k1x_midi *midi, int device,
1487 			      char *name)
1488 {
1489 	struct snd_rawmidi *rmidi;
1490 	int err;
1491 
1492 	if ((err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi)) < 0)
1493 		return err;
1494 	midi->emu = emu;
1495 	spin_lock_init(&midi->open_lock);
1496 	spin_lock_init(&midi->input_lock);
1497 	spin_lock_init(&midi->output_lock);
1498 	strcpy(rmidi->name, name);
1499 	snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output);
1500 	snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input);
1501 	rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1502 	                     SNDRV_RAWMIDI_INFO_INPUT |
1503 	                     SNDRV_RAWMIDI_INFO_DUPLEX;
1504 	rmidi->private_data = midi;
1505 	rmidi->private_free = snd_emu10k1x_midi_free;
1506 	midi->rmidi = rmidi;
1507 	return 0;
1508 }
1509 
snd_emu10k1x_midi(struct emu10k1x * emu)1510 static int snd_emu10k1x_midi(struct emu10k1x *emu)
1511 {
1512 	struct emu10k1x_midi *midi = &emu->midi;
1513 	int err;
1514 
1515 	if ((err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)")) < 0)
1516 		return err;
1517 
1518 	midi->tx_enable = INTE_MIDITXENABLE;
1519 	midi->rx_enable = INTE_MIDIRXENABLE;
1520 	midi->port = MUDATA;
1521 	midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
1522 	midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
1523 	midi->interrupt = snd_emu10k1x_midi_interrupt;
1524 	return 0;
1525 }
1526 
snd_emu10k1x_probe(struct pci_dev * pci,const struct pci_device_id * pci_id)1527 static int snd_emu10k1x_probe(struct pci_dev *pci,
1528 			      const struct pci_device_id *pci_id)
1529 {
1530 	static int dev;
1531 	struct snd_card *card;
1532 	struct emu10k1x *chip;
1533 	int err;
1534 
1535 	if (dev >= SNDRV_CARDS)
1536 		return -ENODEV;
1537 	if (!enable[dev]) {
1538 		dev++;
1539 		return -ENOENT;
1540 	}
1541 
1542 	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1543 			   0, &card);
1544 	if (err < 0)
1545 		return err;
1546 
1547 	if ((err = snd_emu10k1x_create(card, pci, &chip)) < 0) {
1548 		snd_card_free(card);
1549 		return err;
1550 	}
1551 
1552 	if ((err = snd_emu10k1x_pcm(chip, 0)) < 0) {
1553 		snd_card_free(card);
1554 		return err;
1555 	}
1556 	if ((err = snd_emu10k1x_pcm(chip, 1)) < 0) {
1557 		snd_card_free(card);
1558 		return err;
1559 	}
1560 	if ((err = snd_emu10k1x_pcm(chip, 2)) < 0) {
1561 		snd_card_free(card);
1562 		return err;
1563 	}
1564 
1565 	if ((err = snd_emu10k1x_ac97(chip)) < 0) {
1566 		snd_card_free(card);
1567 		return err;
1568 	}
1569 
1570 	if ((err = snd_emu10k1x_mixer(chip)) < 0) {
1571 		snd_card_free(card);
1572 		return err;
1573 	}
1574 
1575 	if ((err = snd_emu10k1x_midi(chip)) < 0) {
1576 		snd_card_free(card);
1577 		return err;
1578 	}
1579 
1580 	snd_emu10k1x_proc_init(chip);
1581 
1582 	strcpy(card->driver, "EMU10K1X");
1583 	strcpy(card->shortname, "Dell Sound Blaster Live!");
1584 	sprintf(card->longname, "%s at 0x%lx irq %i",
1585 		card->shortname, chip->port, chip->irq);
1586 
1587 	if ((err = snd_card_register(card)) < 0) {
1588 		snd_card_free(card);
1589 		return err;
1590 	}
1591 
1592 	pci_set_drvdata(pci, card);
1593 	dev++;
1594 	return 0;
1595 }
1596 
snd_emu10k1x_remove(struct pci_dev * pci)1597 static void snd_emu10k1x_remove(struct pci_dev *pci)
1598 {
1599 	snd_card_free(pci_get_drvdata(pci));
1600 }
1601 
1602 // PCI IDs
1603 static const struct pci_device_id snd_emu10k1x_ids[] = {
1604 	{ PCI_VDEVICE(CREATIVE, 0x0006), 0 },	/* Dell OEM version (EMU10K1) */
1605 	{ 0, }
1606 };
1607 MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids);
1608 
1609 // pci_driver definition
1610 static struct pci_driver emu10k1x_driver = {
1611 	.name = KBUILD_MODNAME,
1612 	.id_table = snd_emu10k1x_ids,
1613 	.probe = snd_emu10k1x_probe,
1614 	.remove = snd_emu10k1x_remove,
1615 };
1616 
1617 module_pci_driver(emu10k1x_driver);
1618