1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 2 /* 3 * Copyright 2020 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: Christian König 24 */ 25 26 #ifndef _TTM_PAGE_POOL_H_ 27 #define _TTM_PAGE_POOL_H_ 28 29 #include <linux/mmzone.h> 30 #include <linux/llist.h> 31 #include <linux/spinlock.h> 32 #include <drm/ttm/ttm_caching.h> 33 34 struct device; 35 struct ttm_tt; 36 struct ttm_pool; 37 struct ttm_operation_ctx; 38 39 /** 40 * struct ttm_pool_type - Pool for a certain memory type 41 * 42 * @pool: the pool we belong to, might be NULL for the global ones 43 * @order: the allocation order our pages have 44 * @caching: the caching type our pages have 45 * @shrinker_list: our place on the global shrinker list 46 * @lock: protection of the page list 47 * @pages: the list of pages in the pool 48 */ 49 struct ttm_pool_type { 50 struct ttm_pool *pool; 51 unsigned int order; 52 enum ttm_caching caching; 53 54 struct list_head shrinker_list; 55 56 spinlock_t lock; 57 struct list_head pages; 58 }; 59 60 /** 61 * struct ttm_pool - Pool for all caching and orders 62 * 63 * @dev: the device we allocate pages for 64 * @nid: which numa node to use 65 * @use_dma_alloc: if coherent DMA allocations should be used 66 * @use_dma32: if GFP_DMA32 should be used 67 * @caching: pools for each caching/order 68 */ 69 struct ttm_pool { 70 struct device *dev; 71 int nid; 72 73 bool use_dma_alloc; 74 bool use_dma32; 75 76 struct { 77 struct ttm_pool_type orders[MAX_ORDER + 1]; 78 } caching[TTM_NUM_CACHING_TYPES]; 79 }; 80 81 int ttm_pool_alloc(struct ttm_pool *pool, struct ttm_tt *tt, 82 struct ttm_operation_ctx *ctx); 83 void ttm_pool_free(struct ttm_pool *pool, struct ttm_tt *tt); 84 85 void ttm_pool_init(struct ttm_pool *pool, struct device *dev, 86 int nid, bool use_dma_alloc, bool use_dma32); 87 void ttm_pool_fini(struct ttm_pool *pool); 88 89 int ttm_pool_debugfs(struct ttm_pool *pool, struct seq_file *m); 90 91 int ttm_pool_mgr_init(unsigned long num_pages); 92 void ttm_pool_mgr_fini(void); 93 94 #endif 95
