1 /*
2 * Driver for Atmel SAMA5D4 Watchdog Timer
3 *
4 * Copyright (C) 2015 Atmel Corporation
5 *
6 * Licensed under GPLv2.
7 */
8
9 #include <linux/delay.h>
10 #include <linux/interrupt.h>
11 #include <linux/io.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/of.h>
15 #include <linux/of_irq.h>
16 #include <linux/platform_device.h>
17 #include <linux/reboot.h>
18 #include <linux/watchdog.h>
19
20 #include "at91sam9_wdt.h"
21
22 /* minimum and maximum watchdog timeout, in seconds */
23 #define MIN_WDT_TIMEOUT 1
24 #define MAX_WDT_TIMEOUT 16
25 #define WDT_DEFAULT_TIMEOUT MAX_WDT_TIMEOUT
26
27 #define WDT_SEC2TICKS(s) ((s) ? (((s) << 8) - 1) : 0)
28
29 struct sama5d4_wdt {
30 struct watchdog_device wdd;
31 void __iomem *reg_base;
32 u32 mr;
33 unsigned long last_ping;
34 };
35
36 static int wdt_timeout;
37 static bool nowayout = WATCHDOG_NOWAYOUT;
38
39 module_param(wdt_timeout, int, 0);
40 MODULE_PARM_DESC(wdt_timeout,
41 "Watchdog timeout in seconds. (default = "
42 __MODULE_STRING(WDT_DEFAULT_TIMEOUT) ")");
43
44 module_param(nowayout, bool, 0);
45 MODULE_PARM_DESC(nowayout,
46 "Watchdog cannot be stopped once started (default="
47 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
48
49 #define wdt_enabled (!(wdt->mr & AT91_WDT_WDDIS))
50
51 #define wdt_read(wdt, field) \
52 readl_relaxed((wdt)->reg_base + (field))
53
54 /* 4 slow clock periods is 4/32768 = 122.07µs*/
55 #define WDT_DELAY usecs_to_jiffies(123)
56
wdt_write(struct sama5d4_wdt * wdt,u32 field,u32 val)57 static void wdt_write(struct sama5d4_wdt *wdt, u32 field, u32 val)
58 {
59 /*
60 * WDT_CR and WDT_MR must not be modified within three slow clock
61 * periods following a restart of the watchdog performed by a write
62 * access in WDT_CR.
63 */
64 while (time_before(jiffies, wdt->last_ping + WDT_DELAY))
65 usleep_range(30, 125);
66 writel_relaxed(val, wdt->reg_base + field);
67 wdt->last_ping = jiffies;
68 }
69
wdt_write_nosleep(struct sama5d4_wdt * wdt,u32 field,u32 val)70 static void wdt_write_nosleep(struct sama5d4_wdt *wdt, u32 field, u32 val)
71 {
72 if (time_before(jiffies, wdt->last_ping + WDT_DELAY))
73 udelay(123);
74 writel_relaxed(val, wdt->reg_base + field);
75 wdt->last_ping = jiffies;
76 }
77
sama5d4_wdt_start(struct watchdog_device * wdd)78 static int sama5d4_wdt_start(struct watchdog_device *wdd)
79 {
80 struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
81
82 wdt->mr &= ~AT91_WDT_WDDIS;
83 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
84
85 return 0;
86 }
87
sama5d4_wdt_stop(struct watchdog_device * wdd)88 static int sama5d4_wdt_stop(struct watchdog_device *wdd)
89 {
90 struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
91
92 wdt->mr |= AT91_WDT_WDDIS;
93 wdt_write(wdt, AT91_WDT_MR, wdt->mr);
94
95 return 0;
96 }
97
sama5d4_wdt_ping(struct watchdog_device * wdd)98 static int sama5d4_wdt_ping(struct watchdog_device *wdd)
99 {
100 struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
101
102 wdt_write(wdt, AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
103
104 return 0;
105 }
106
sama5d4_wdt_set_timeout(struct watchdog_device * wdd,unsigned int timeout)107 static int sama5d4_wdt_set_timeout(struct watchdog_device *wdd,
108 unsigned int timeout)
109 {
110 struct sama5d4_wdt *wdt = watchdog_get_drvdata(wdd);
111 u32 value = WDT_SEC2TICKS(timeout);
112
113 wdt->mr &= ~AT91_WDT_WDV;
114 wdt->mr &= ~AT91_WDT_WDD;
115 wdt->mr |= AT91_WDT_SET_WDV(value);
116 wdt->mr |= AT91_WDT_SET_WDD(value);
117
118 /*
119 * WDDIS has to be 0 when updating WDD/WDV. The datasheet states: When
120 * setting the WDDIS bit, and while it is set, the fields WDV and WDD
121 * must not be modified.
122 * If the watchdog is enabled, then the timeout can be updated. Else,
123 * wait that the user enables it.
124 */
125 if (wdt_enabled)
126 wdt_write(wdt, AT91_WDT_MR, wdt->mr & ~AT91_WDT_WDDIS);
127
128 wdd->timeout = timeout;
129
130 return 0;
131 }
132
133 static const struct watchdog_info sama5d4_wdt_info = {
134 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
135 .identity = "Atmel SAMA5D4 Watchdog",
136 };
137
138 static const struct watchdog_ops sama5d4_wdt_ops = {
139 .owner = THIS_MODULE,
140 .start = sama5d4_wdt_start,
141 .stop = sama5d4_wdt_stop,
142 .ping = sama5d4_wdt_ping,
143 .set_timeout = sama5d4_wdt_set_timeout,
144 };
145
sama5d4_wdt_irq_handler(int irq,void * dev_id)146 static irqreturn_t sama5d4_wdt_irq_handler(int irq, void *dev_id)
147 {
148 struct sama5d4_wdt *wdt = platform_get_drvdata(dev_id);
149
150 if (wdt_read(wdt, AT91_WDT_SR)) {
151 pr_crit("Atmel Watchdog Software Reset\n");
152 emergency_restart();
153 pr_crit("Reboot didn't succeed\n");
154 }
155
156 return IRQ_HANDLED;
157 }
158
of_sama5d4_wdt_init(struct device_node * np,struct sama5d4_wdt * wdt)159 static int of_sama5d4_wdt_init(struct device_node *np, struct sama5d4_wdt *wdt)
160 {
161 const char *tmp;
162
163 wdt->mr = AT91_WDT_WDDIS;
164
165 if (!of_property_read_string(np, "atmel,watchdog-type", &tmp) &&
166 !strcmp(tmp, "software"))
167 wdt->mr |= AT91_WDT_WDFIEN;
168 else
169 wdt->mr |= AT91_WDT_WDRSTEN;
170
171 if (of_property_read_bool(np, "atmel,idle-halt"))
172 wdt->mr |= AT91_WDT_WDIDLEHLT;
173
174 if (of_property_read_bool(np, "atmel,dbg-halt"))
175 wdt->mr |= AT91_WDT_WDDBGHLT;
176
177 return 0;
178 }
179
sama5d4_wdt_init(struct sama5d4_wdt * wdt)180 static int sama5d4_wdt_init(struct sama5d4_wdt *wdt)
181 {
182 u32 reg;
183 /*
184 * When booting and resuming, the bootloader may have changed the
185 * watchdog configuration.
186 * If the watchdog is already running, we can safely update it.
187 * Else, we have to disable it properly.
188 */
189 if (wdt_enabled) {
190 wdt_write_nosleep(wdt, AT91_WDT_MR, wdt->mr);
191 } else {
192 reg = wdt_read(wdt, AT91_WDT_MR);
193 if (!(reg & AT91_WDT_WDDIS))
194 wdt_write_nosleep(wdt, AT91_WDT_MR,
195 reg | AT91_WDT_WDDIS);
196 }
197 return 0;
198 }
199
sama5d4_wdt_probe(struct platform_device * pdev)200 static int sama5d4_wdt_probe(struct platform_device *pdev)
201 {
202 struct watchdog_device *wdd;
203 struct sama5d4_wdt *wdt;
204 struct resource *res;
205 void __iomem *regs;
206 u32 irq = 0;
207 u32 timeout;
208 int ret;
209
210 wdt = devm_kzalloc(&pdev->dev, sizeof(*wdt), GFP_KERNEL);
211 if (!wdt)
212 return -ENOMEM;
213
214 wdd = &wdt->wdd;
215 wdd->timeout = WDT_DEFAULT_TIMEOUT;
216 wdd->info = &sama5d4_wdt_info;
217 wdd->ops = &sama5d4_wdt_ops;
218 wdd->min_timeout = MIN_WDT_TIMEOUT;
219 wdd->max_timeout = MAX_WDT_TIMEOUT;
220 wdt->last_ping = jiffies;
221
222 watchdog_set_drvdata(wdd, wdt);
223
224 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
225 regs = devm_ioremap_resource(&pdev->dev, res);
226 if (IS_ERR(regs))
227 return PTR_ERR(regs);
228
229 wdt->reg_base = regs;
230
231 irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
232 if (!irq)
233 dev_warn(&pdev->dev, "failed to get IRQ from DT\n");
234
235 ret = of_sama5d4_wdt_init(pdev->dev.of_node, wdt);
236 if (ret)
237 return ret;
238
239 if ((wdt->mr & AT91_WDT_WDFIEN) && irq) {
240 ret = devm_request_irq(&pdev->dev, irq, sama5d4_wdt_irq_handler,
241 IRQF_SHARED | IRQF_IRQPOLL |
242 IRQF_NO_SUSPEND, pdev->name, pdev);
243 if (ret) {
244 dev_err(&pdev->dev,
245 "cannot register interrupt handler\n");
246 return ret;
247 }
248 }
249
250 ret = watchdog_init_timeout(wdd, wdt_timeout, &pdev->dev);
251 if (ret) {
252 dev_err(&pdev->dev, "unable to set timeout value\n");
253 return ret;
254 }
255
256 timeout = WDT_SEC2TICKS(wdd->timeout);
257
258 wdt->mr |= AT91_WDT_SET_WDD(timeout);
259 wdt->mr |= AT91_WDT_SET_WDV(timeout);
260
261 ret = sama5d4_wdt_init(wdt);
262 if (ret)
263 return ret;
264
265 watchdog_set_nowayout(wdd, nowayout);
266
267 ret = watchdog_register_device(wdd);
268 if (ret) {
269 dev_err(&pdev->dev, "failed to register watchdog device\n");
270 return ret;
271 }
272
273 platform_set_drvdata(pdev, wdt);
274
275 dev_info(&pdev->dev, "initialized (timeout = %d sec, nowayout = %d)\n",
276 wdd->timeout, nowayout);
277
278 return 0;
279 }
280
sama5d4_wdt_remove(struct platform_device * pdev)281 static int sama5d4_wdt_remove(struct platform_device *pdev)
282 {
283 struct sama5d4_wdt *wdt = platform_get_drvdata(pdev);
284
285 sama5d4_wdt_stop(&wdt->wdd);
286
287 watchdog_unregister_device(&wdt->wdd);
288
289 return 0;
290 }
291
292 static const struct of_device_id sama5d4_wdt_of_match[] = {
293 { .compatible = "atmel,sama5d4-wdt", },
294 { }
295 };
296 MODULE_DEVICE_TABLE(of, sama5d4_wdt_of_match);
297
298 #ifdef CONFIG_PM_SLEEP
sama5d4_wdt_resume(struct device * dev)299 static int sama5d4_wdt_resume(struct device *dev)
300 {
301 struct sama5d4_wdt *wdt = dev_get_drvdata(dev);
302
303 /*
304 * FIXME: writing MR also pings the watchdog which may not be desired.
305 * This should only be done when the registers are lost on suspend but
306 * there is no way to get this information right now.
307 */
308 sama5d4_wdt_init(wdt);
309
310 return 0;
311 }
312 #endif
313
314 static SIMPLE_DEV_PM_OPS(sama5d4_wdt_pm_ops, NULL,
315 sama5d4_wdt_resume);
316
317 static struct platform_driver sama5d4_wdt_driver = {
318 .probe = sama5d4_wdt_probe,
319 .remove = sama5d4_wdt_remove,
320 .driver = {
321 .name = "sama5d4_wdt",
322 .pm = &sama5d4_wdt_pm_ops,
323 .of_match_table = sama5d4_wdt_of_match,
324 }
325 };
326 module_platform_driver(sama5d4_wdt_driver);
327
328 MODULE_AUTHOR("Atmel Corporation");
329 MODULE_DESCRIPTION("Atmel SAMA5D4 Watchdog Timer driver");
330 MODULE_LICENSE("GPL v2");
331
