1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * drivers/video/pvr2fb.c
4 *
5 * Frame buffer and fbcon support for the NEC PowerVR2 found within the Sega
6 * Dreamcast.
7 *
8 * Copyright (c) 2001 M. R. Brown <mrbrown@0xd6.org>
9 * Copyright (c) 2001 - 2008 Paul Mundt <lethal@linux-sh.org>
10 *
11 * This driver is mostly based on the excellent amifb and vfb sources. It uses
12 * an odd scheme for converting hardware values to/from framebuffer values,
13 * here are some hacked-up formulas:
14 *
15 * The Dreamcast has screen offsets from each side of its four borders and
16 * the start offsets of the display window. I used these values to calculate
17 * 'pseudo' values (think of them as placeholders) for the fb video mode, so
18 * that when it came time to convert these values back into their hardware
19 * values, I could just add mode- specific offsets to get the correct mode
20 * settings:
21 *
22 * left_margin = diwstart_h - borderstart_h;
23 * right_margin = borderstop_h - (diwstart_h + xres);
24 * upper_margin = diwstart_v - borderstart_v;
25 * lower_margin = borderstop_v - (diwstart_h + yres);
26 *
27 * hsync_len = borderstart_h + (hsync_total - borderstop_h);
28 * vsync_len = borderstart_v + (vsync_total - borderstop_v);
29 *
30 * Then, when it's time to convert back to hardware settings, the only
31 * constants are the borderstart_* offsets, all other values are derived from
32 * the fb video mode:
33 *
34 * // PAL
35 * borderstart_h = 116;
36 * borderstart_v = 44;
37 * ...
38 * borderstop_h = borderstart_h + hsync_total - hsync_len;
39 * ...
40 * diwstart_v = borderstart_v - upper_margin;
41 *
42 * However, in the current implementation, the borderstart values haven't had
43 * the benefit of being fully researched, so some modes may be broken.
44 */
45
46 #undef DEBUG
47
48 #include <linux/module.h>
49 #include <linux/kernel.h>
50 #include <linux/errno.h>
51 #include <linux/string.h>
52 #include <linux/mm.h>
53 #include <linux/slab.h>
54 #include <linux/delay.h>
55 #include <linux/interrupt.h>
56 #include <linux/fb.h>
57 #include <linux/init.h>
58 #include <linux/pci.h>
59
60 #ifdef CONFIG_SH_DREAMCAST
61 #include <asm/machvec.h>
62 #include <mach-dreamcast/mach/sysasic.h>
63 #endif
64
65 #ifdef CONFIG_PVR2_DMA
66 #include <linux/pagemap.h>
67 #include <mach/dma.h>
68 #include <asm/dma.h>
69 #endif
70
71 #ifdef CONFIG_SH_STORE_QUEUES
72 #include <linux/uaccess.h>
73 #include <cpu/sq.h>
74 #endif
75
76 #ifndef PCI_DEVICE_ID_NEC_NEON250
77 # define PCI_DEVICE_ID_NEC_NEON250 0x0067
78 #endif
79
80 /* 2D video registers */
81 #define DISP_BASE par->mmio_base
82 #define DISP_BRDRCOLR (DISP_BASE + 0x40)
83 #define DISP_DIWMODE (DISP_BASE + 0x44)
84 #define DISP_DIWADDRL (DISP_BASE + 0x50)
85 #define DISP_DIWADDRS (DISP_BASE + 0x54)
86 #define DISP_DIWSIZE (DISP_BASE + 0x5c)
87 #define DISP_SYNCCONF (DISP_BASE + 0xd0)
88 #define DISP_BRDRHORZ (DISP_BASE + 0xd4)
89 #define DISP_SYNCSIZE (DISP_BASE + 0xd8)
90 #define DISP_BRDRVERT (DISP_BASE + 0xdc)
91 #define DISP_DIWCONF (DISP_BASE + 0xe8)
92 #define DISP_DIWHSTRT (DISP_BASE + 0xec)
93 #define DISP_DIWVSTRT (DISP_BASE + 0xf0)
94 #define DISP_PIXDEPTH (DISP_BASE + 0x108)
95
96 /* Pixel clocks, one for TV output, doubled for VGA output */
97 #define TV_CLK 74239
98 #define VGA_CLK 37119
99
100 /* This is for 60Hz - the VTOTAL is doubled for interlaced modes */
101 #define PAL_HTOTAL 863
102 #define PAL_VTOTAL 312
103 #define NTSC_HTOTAL 857
104 #define NTSC_VTOTAL 262
105
106 /* Supported cable types */
107 enum { CT_VGA, CT_NONE, CT_RGB, CT_COMPOSITE };
108
109 /* Supported video output types */
110 enum { VO_PAL, VO_NTSC, VO_VGA };
111
112 /* Supported palette types */
113 enum { PAL_ARGB1555, PAL_RGB565, PAL_ARGB4444, PAL_ARGB8888 };
114
115 struct pvr2_params { unsigned int val; char *name; };
116 static struct pvr2_params cables[] = {
117 { CT_VGA, "VGA" }, { CT_RGB, "RGB" }, { CT_COMPOSITE, "COMPOSITE" },
118 };
119
120 static struct pvr2_params outputs[] = {
121 { VO_PAL, "PAL" }, { VO_NTSC, "NTSC" }, { VO_VGA, "VGA" },
122 };
123
124 /*
125 * This describes the current video mode
126 */
127
128 static struct pvr2fb_par {
129 unsigned int hsync_total; /* Clocks/line */
130 unsigned int vsync_total; /* Lines/field */
131 unsigned int borderstart_h;
132 unsigned int borderstop_h;
133 unsigned int borderstart_v;
134 unsigned int borderstop_v;
135 unsigned int diwstart_h; /* Horizontal offset of the display field */
136 unsigned int diwstart_v; /* Vertical offset of the display field, for
137 interlaced modes, this is the long field */
138 unsigned long disp_start; /* Address of image within VRAM */
139 unsigned char is_interlaced; /* Is the display interlaced? */
140 unsigned char is_doublescan; /* Are scanlines output twice? (doublescan) */
141 unsigned char is_lowres; /* Is horizontal pixel-doubling enabled? */
142
143 void __iomem *mmio_base; /* MMIO base */
144 u32 palette[16];
145 } *currentpar;
146
147 static struct fb_info *fb_info;
148
149 static struct fb_fix_screeninfo pvr2_fix = {
150 .id = "NEC PowerVR2",
151 .type = FB_TYPE_PACKED_PIXELS,
152 .visual = FB_VISUAL_TRUECOLOR,
153 .ypanstep = 1,
154 .ywrapstep = 1,
155 .accel = FB_ACCEL_NONE,
156 };
157
158 static const struct fb_var_screeninfo pvr2_var = {
159 .xres = 640,
160 .yres = 480,
161 .xres_virtual = 640,
162 .yres_virtual = 480,
163 .bits_per_pixel =16,
164 .red = { 11, 5, 0 },
165 .green = { 5, 6, 0 },
166 .blue = { 0, 5, 0 },
167 .activate = FB_ACTIVATE_NOW,
168 .height = -1,
169 .width = -1,
170 .vmode = FB_VMODE_NONINTERLACED,
171 };
172
173 static int cable_type = CT_VGA;
174 static int video_output = VO_VGA;
175
176 static int nopan = 0;
177 static int nowrap = 1;
178
179 /*
180 * We do all updating, blanking, etc. during the vertical retrace period
181 */
182 static unsigned int do_vmode_full = 0; /* Change the video mode */
183 static unsigned int do_vmode_pan = 0; /* Update the video mode */
184 static short do_blank = 0; /* (Un)Blank the screen */
185
186 static unsigned int is_blanked = 0; /* Is the screen blanked? */
187
188 #ifdef CONFIG_SH_STORE_QUEUES
189 static unsigned long pvr2fb_map;
190 #endif
191
192 #ifdef CONFIG_PVR2_DMA
193 static unsigned int shdma = PVR2_CASCADE_CHAN;
194 static unsigned int pvr2dma = ONCHIP_NR_DMA_CHANNELS;
195 #endif
196
197 static struct fb_videomode pvr2_modedb[] = {
198 /*
199 * Broadcast video modes (PAL and NTSC). I'm unfamiliar with
200 * PAL-M and PAL-N, but from what I've read both modes parallel PAL and
201 * NTSC, so it shouldn't be a problem (I hope).
202 */
203
204 {
205 /* 640x480 @ 60Hz interlaced (NTSC) */
206 "ntsc_640x480i", 60, 640, 480, TV_CLK, 38, 33, 0, 18, 146, 26,
207 FB_SYNC_BROADCAST, FB_VMODE_INTERLACED | FB_VMODE_YWRAP
208 }, {
209 /* 640x240 @ 60Hz (NTSC) */
210 /* XXX: Broken! Don't use... */
211 "ntsc_640x240", 60, 640, 240, TV_CLK, 38, 33, 0, 0, 146, 22,
212 FB_SYNC_BROADCAST, FB_VMODE_YWRAP
213 }, {
214 /* 640x480 @ 60hz (VGA) */
215 "vga_640x480", 60, 640, 480, VGA_CLK, 38, 33, 0, 18, 146, 26,
216 0, FB_VMODE_YWRAP
217 },
218 };
219
220 #define NUM_TOTAL_MODES ARRAY_SIZE(pvr2_modedb)
221
222 #define DEFMODE_NTSC 0
223 #define DEFMODE_PAL 0
224 #define DEFMODE_VGA 2
225
226 static int defmode = DEFMODE_NTSC;
227 static char *mode_option = NULL;
228
pvr2fb_set_pal_type(unsigned int type)229 static inline void pvr2fb_set_pal_type(unsigned int type)
230 {
231 struct pvr2fb_par *par = (struct pvr2fb_par *)fb_info->par;
232
233 fb_writel(type, par->mmio_base + 0x108);
234 }
235
pvr2fb_set_pal_entry(struct pvr2fb_par * par,unsigned int regno,unsigned int val)236 static inline void pvr2fb_set_pal_entry(struct pvr2fb_par *par,
237 unsigned int regno,
238 unsigned int val)
239 {
240 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno));
241 }
242
pvr2fb_blank(int blank,struct fb_info * info)243 static int pvr2fb_blank(int blank, struct fb_info *info)
244 {
245 do_blank = blank ? blank : -1;
246 return 0;
247 }
248
get_line_length(int xres_virtual,int bpp)249 static inline unsigned long get_line_length(int xres_virtual, int bpp)
250 {
251 return (unsigned long)((((xres_virtual*bpp)+31)&~31) >> 3);
252 }
253
set_color_bitfields(struct fb_var_screeninfo * var)254 static void set_color_bitfields(struct fb_var_screeninfo *var)
255 {
256 switch (var->bits_per_pixel) {
257 case 16: /* RGB 565 */
258 pvr2fb_set_pal_type(PAL_RGB565);
259 var->red.offset = 11; var->red.length = 5;
260 var->green.offset = 5; var->green.length = 6;
261 var->blue.offset = 0; var->blue.length = 5;
262 var->transp.offset = 0; var->transp.length = 0;
263 break;
264 case 24: /* RGB 888 */
265 var->red.offset = 16; var->red.length = 8;
266 var->green.offset = 8; var->green.length = 8;
267 var->blue.offset = 0; var->blue.length = 8;
268 var->transp.offset = 0; var->transp.length = 0;
269 break;
270 case 32: /* ARGB 8888 */
271 pvr2fb_set_pal_type(PAL_ARGB8888);
272 var->red.offset = 16; var->red.length = 8;
273 var->green.offset = 8; var->green.length = 8;
274 var->blue.offset = 0; var->blue.length = 8;
275 var->transp.offset = 24; var->transp.length = 8;
276 break;
277 }
278 }
279
pvr2fb_setcolreg(unsigned int regno,unsigned int red,unsigned int green,unsigned int blue,unsigned int transp,struct fb_info * info)280 static int pvr2fb_setcolreg(unsigned int regno, unsigned int red,
281 unsigned int green, unsigned int blue,
282 unsigned int transp, struct fb_info *info)
283 {
284 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
285 unsigned int tmp;
286
287 if (regno > info->cmap.len)
288 return 1;
289
290 /*
291 * We only support the hardware palette for 16 and 32bpp. It's also
292 * expected that the palette format has been set by the time we get
293 * here, so we don't waste time setting it again.
294 */
295 switch (info->var.bits_per_pixel) {
296 case 16: /* RGB 565 */
297 tmp = (red & 0xf800) |
298 ((green & 0xfc00) >> 5) |
299 ((blue & 0xf800) >> 11);
300
301 pvr2fb_set_pal_entry(par, regno, tmp);
302 break;
303 case 24: /* RGB 888 */
304 red >>= 8; green >>= 8; blue >>= 8;
305 tmp = (red << 16) | (green << 8) | blue;
306 break;
307 case 32: /* ARGB 8888 */
308 red >>= 8; green >>= 8; blue >>= 8;
309 tmp = (transp << 24) | (red << 16) | (green << 8) | blue;
310
311 pvr2fb_set_pal_entry(par, regno, tmp);
312 break;
313 default:
314 pr_debug("Invalid bit depth %d?!?\n", info->var.bits_per_pixel);
315 return 1;
316 }
317
318 if (regno < 16)
319 ((u32*)(info->pseudo_palette))[regno] = tmp;
320
321 return 0;
322 }
323
324 /*
325 * Determine the cable type and initialize the cable output format. Don't do
326 * anything if the cable type has been overidden (via "cable:XX").
327 */
328
329 #define PCTRA ((void __iomem *)0xff80002c)
330 #define PDTRA ((void __iomem *)0xff800030)
331 #define VOUTC ((void __iomem *)0xa0702c00)
332
pvr2_init_cable(void)333 static int pvr2_init_cable(void)
334 {
335 if (cable_type < 0) {
336 fb_writel((fb_readl(PCTRA) & 0xfff0ffff) | 0x000a0000,
337 PCTRA);
338 cable_type = (fb_readw(PDTRA) >> 8) & 3;
339 }
340
341 /* Now select the output format (either composite or other) */
342 /* XXX: Save the previous val first, as this reg is also AICA
343 related */
344 if (cable_type == CT_COMPOSITE)
345 fb_writel(3 << 8, VOUTC);
346 else if (cable_type == CT_RGB)
347 fb_writel(1 << 9, VOUTC);
348 else
349 fb_writel(0, VOUTC);
350
351 return cable_type;
352 }
353
pvr2fb_set_par(struct fb_info * info)354 static int pvr2fb_set_par(struct fb_info *info)
355 {
356 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
357 struct fb_var_screeninfo *var = &info->var;
358 unsigned long line_length;
359 unsigned int vtotal;
360
361 /*
362 * XXX: It's possible that a user could use a VGA box, change the cable
363 * type in hardware (i.e. switch from VGA<->composite), then change
364 * modes (i.e. switching to another VT). If that happens we should
365 * automagically change the output format to cope, but currently I
366 * don't have a VGA box to make sure this works properly.
367 */
368 cable_type = pvr2_init_cable();
369 if (cable_type == CT_VGA && video_output != VO_VGA)
370 video_output = VO_VGA;
371
372 var->vmode &= FB_VMODE_MASK;
373 if (var->vmode & FB_VMODE_INTERLACED && video_output != VO_VGA)
374 par->is_interlaced = 1;
375 /*
376 * XXX: Need to be more creative with this (i.e. allow doublecan for
377 * PAL/NTSC output).
378 */
379 if (var->vmode & FB_VMODE_DOUBLE && video_output == VO_VGA)
380 par->is_doublescan = 1;
381
382 par->hsync_total = var->left_margin + var->xres + var->right_margin +
383 var->hsync_len;
384 par->vsync_total = var->upper_margin + var->yres + var->lower_margin +
385 var->vsync_len;
386
387 if (var->sync & FB_SYNC_BROADCAST) {
388 vtotal = par->vsync_total;
389 if (par->is_interlaced)
390 vtotal /= 2;
391 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
392 /* XXX: Check for start values here... */
393 /* XXX: Check hardware for PAL-compatibility */
394 par->borderstart_h = 116;
395 par->borderstart_v = 44;
396 } else {
397 /* NTSC video output */
398 par->borderstart_h = 126;
399 par->borderstart_v = 18;
400 }
401 } else {
402 /* VGA mode */
403 /* XXX: What else needs to be checked? */
404 /*
405 * XXX: We have a little freedom in VGA modes, what ranges
406 * should be here (i.e. hsync/vsync totals, etc.)?
407 */
408 par->borderstart_h = 126;
409 par->borderstart_v = 40;
410 }
411
412 /* Calculate the remainding offsets */
413 par->diwstart_h = par->borderstart_h + var->left_margin;
414 par->diwstart_v = par->borderstart_v + var->upper_margin;
415 par->borderstop_h = par->diwstart_h + var->xres +
416 var->right_margin;
417 par->borderstop_v = par->diwstart_v + var->yres +
418 var->lower_margin;
419
420 if (!par->is_interlaced)
421 par->borderstop_v /= 2;
422 if (info->var.xres < 640)
423 par->is_lowres = 1;
424
425 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
426 par->disp_start = info->fix.smem_start + (line_length * var->yoffset) * line_length;
427 info->fix.line_length = line_length;
428 return 0;
429 }
430
pvr2fb_check_var(struct fb_var_screeninfo * var,struct fb_info * info)431 static int pvr2fb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
432 {
433 struct pvr2fb_par *par = (struct pvr2fb_par *)info->par;
434 unsigned int vtotal, hsync_total;
435 unsigned long line_length;
436
437 if (var->pixclock != TV_CLK && var->pixclock != VGA_CLK) {
438 pr_debug("Invalid pixclock value %d\n", var->pixclock);
439 return -EINVAL;
440 }
441
442 if (var->xres < 320)
443 var->xres = 320;
444 if (var->yres < 240)
445 var->yres = 240;
446 if (var->xres_virtual < var->xres)
447 var->xres_virtual = var->xres;
448 if (var->yres_virtual < var->yres)
449 var->yres_virtual = var->yres;
450
451 if (var->bits_per_pixel <= 16)
452 var->bits_per_pixel = 16;
453 else if (var->bits_per_pixel <= 24)
454 var->bits_per_pixel = 24;
455 else if (var->bits_per_pixel <= 32)
456 var->bits_per_pixel = 32;
457
458 set_color_bitfields(var);
459
460 if (var->vmode & FB_VMODE_YWRAP) {
461 if (var->xoffset || var->yoffset >= var->yres_virtual) {
462 var->xoffset = var->yoffset = 0;
463 } else {
464 if (var->xoffset > var->xres_virtual - var->xres ||
465 var->yoffset > var->yres_virtual - var->yres)
466 var->xoffset = var->yoffset = 0;
467 }
468 } else {
469 var->xoffset = var->yoffset = 0;
470 }
471
472 /*
473 * XXX: Need to be more creative with this (i.e. allow doublecan for
474 * PAL/NTSC output).
475 */
476 if (var->yres < 480 && video_output == VO_VGA)
477 var->vmode |= FB_VMODE_DOUBLE;
478
479 if (video_output != VO_VGA) {
480 var->sync |= FB_SYNC_BROADCAST;
481 var->vmode |= FB_VMODE_INTERLACED;
482 } else {
483 var->sync &= ~FB_SYNC_BROADCAST;
484 var->vmode &= ~FB_VMODE_INTERLACED;
485 var->vmode |= FB_VMODE_NONINTERLACED;
486 }
487
488 if ((var->activate & FB_ACTIVATE_MASK) != FB_ACTIVATE_TEST) {
489 var->right_margin = par->borderstop_h -
490 (par->diwstart_h + var->xres);
491 var->left_margin = par->diwstart_h - par->borderstart_h;
492 var->hsync_len = par->borderstart_h +
493 (par->hsync_total - par->borderstop_h);
494
495 var->upper_margin = par->diwstart_v - par->borderstart_v;
496 var->lower_margin = par->borderstop_v -
497 (par->diwstart_v + var->yres);
498 var->vsync_len = par->borderstop_v +
499 (par->vsync_total - par->borderstop_v);
500 }
501
502 hsync_total = var->left_margin + var->xres + var->right_margin +
503 var->hsync_len;
504 vtotal = var->upper_margin + var->yres + var->lower_margin +
505 var->vsync_len;
506
507 if (var->sync & FB_SYNC_BROADCAST) {
508 if (var->vmode & FB_VMODE_INTERLACED)
509 vtotal /= 2;
510 if (vtotal > (PAL_VTOTAL + NTSC_VTOTAL)/2) {
511 /* PAL video output */
512 /* XXX: Should be using a range here ... ? */
513 if (hsync_total != PAL_HTOTAL) {
514 pr_debug("invalid hsync total for PAL\n");
515 return -EINVAL;
516 }
517 } else {
518 /* NTSC video output */
519 if (hsync_total != NTSC_HTOTAL) {
520 pr_debug("invalid hsync total for NTSC\n");
521 return -EINVAL;
522 }
523 }
524 }
525
526 /* Check memory sizes */
527 line_length = get_line_length(var->xres_virtual, var->bits_per_pixel);
528 if (line_length * var->yres_virtual > info->fix.smem_len)
529 return -ENOMEM;
530
531 return 0;
532 }
533
pvr2_update_display(struct fb_info * info)534 static void pvr2_update_display(struct fb_info *info)
535 {
536 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
537 struct fb_var_screeninfo *var = &info->var;
538
539 /* Update the start address of the display image */
540 fb_writel(par->disp_start, DISP_DIWADDRL);
541 fb_writel(par->disp_start +
542 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
543 DISP_DIWADDRS);
544 }
545
546 /*
547 * Initialize the video mode. Currently, the 16bpp and 24bpp modes aren't
548 * very stable. It's probably due to the fact that a lot of the 2D video
549 * registers are still undocumented.
550 */
551
pvr2_init_display(struct fb_info * info)552 static void pvr2_init_display(struct fb_info *info)
553 {
554 struct pvr2fb_par *par = (struct pvr2fb_par *) info->par;
555 struct fb_var_screeninfo *var = &info->var;
556 unsigned int diw_height, diw_width, diw_modulo = 1;
557 unsigned int bytesperpixel = var->bits_per_pixel >> 3;
558
559 /* hsync and vsync totals */
560 fb_writel((par->vsync_total << 16) | par->hsync_total, DISP_SYNCSIZE);
561
562 /* column height, modulo, row width */
563 /* since we're "panning" within vram, we need to offset things based
564 * on the offset from the virtual x start to our real gfx. */
565 if (video_output != VO_VGA && par->is_interlaced)
566 diw_modulo += info->fix.line_length / 4;
567 diw_height = (par->is_interlaced ? var->yres / 2 : var->yres);
568 diw_width = get_line_length(var->xres, var->bits_per_pixel) / 4;
569 fb_writel((diw_modulo << 20) | (--diw_height << 10) | --diw_width,
570 DISP_DIWSIZE);
571
572 /* display address, long and short fields */
573 fb_writel(par->disp_start, DISP_DIWADDRL);
574 fb_writel(par->disp_start +
575 get_line_length(var->xoffset+var->xres, var->bits_per_pixel),
576 DISP_DIWADDRS);
577
578 /* border horizontal, border vertical, border color */
579 fb_writel((par->borderstart_h << 16) | par->borderstop_h, DISP_BRDRHORZ);
580 fb_writel((par->borderstart_v << 16) | par->borderstop_v, DISP_BRDRVERT);
581 fb_writel(0, DISP_BRDRCOLR);
582
583 /* display window start position */
584 fb_writel(par->diwstart_h, DISP_DIWHSTRT);
585 fb_writel((par->diwstart_v << 16) | par->diwstart_v, DISP_DIWVSTRT);
586
587 /* misc. settings */
588 fb_writel((0x16 << 16) | par->is_lowres, DISP_DIWCONF);
589
590 /* clock doubler (for VGA), scan doubler, display enable */
591 fb_writel(((video_output == VO_VGA) << 23) |
592 (par->is_doublescan << 1) | 1, DISP_DIWMODE);
593
594 /* bits per pixel */
595 fb_writel(fb_readl(DISP_DIWMODE) | (--bytesperpixel << 2), DISP_DIWMODE);
596 fb_writel(bytesperpixel << 2, DISP_PIXDEPTH);
597
598 /* video enable, color sync, interlace,
599 * hsync and vsync polarity (currently unused) */
600 fb_writel(0x100 | ((par->is_interlaced /*|4*/) << 4), DISP_SYNCCONF);
601 }
602
603 /* Simulate blanking by making the border cover the entire screen */
604
605 #define BLANK_BIT (1<<3)
606
pvr2_do_blank(void)607 static void pvr2_do_blank(void)
608 {
609 struct pvr2fb_par *par = currentpar;
610 unsigned long diwconf;
611
612 diwconf = fb_readl(DISP_DIWCONF);
613 if (do_blank > 0)
614 fb_writel(diwconf | BLANK_BIT, DISP_DIWCONF);
615 else
616 fb_writel(diwconf & ~BLANK_BIT, DISP_DIWCONF);
617
618 is_blanked = do_blank > 0 ? do_blank : 0;
619 }
620
pvr2fb_interrupt(int irq,void * dev_id)621 static irqreturn_t __maybe_unused pvr2fb_interrupt(int irq, void *dev_id)
622 {
623 struct fb_info *info = dev_id;
624
625 if (do_vmode_pan || do_vmode_full)
626 pvr2_update_display(info);
627 if (do_vmode_full)
628 pvr2_init_display(info);
629 if (do_vmode_pan)
630 do_vmode_pan = 0;
631 if (do_vmode_full)
632 do_vmode_full = 0;
633 if (do_blank) {
634 pvr2_do_blank();
635 do_blank = 0;
636 }
637 return IRQ_HANDLED;
638 }
639
640 #ifdef CONFIG_PVR2_DMA
pvr2fb_write(struct fb_info * info,const char * buf,size_t count,loff_t * ppos)641 static ssize_t pvr2fb_write(struct fb_info *info, const char *buf,
642 size_t count, loff_t *ppos)
643 {
644 unsigned long dst, start, end, len;
645 unsigned int nr_pages;
646 struct page **pages;
647 int ret, i;
648
649 nr_pages = (count + PAGE_SIZE - 1) >> PAGE_SHIFT;
650
651 pages = kmalloc_array(nr_pages, sizeof(struct page *), GFP_KERNEL);
652 if (!pages)
653 return -ENOMEM;
654
655 ret = get_user_pages_fast((unsigned long)buf, nr_pages, FOLL_WRITE, pages);
656 if (ret < nr_pages) {
657 nr_pages = ret;
658 ret = -EINVAL;
659 goto out_unmap;
660 }
661
662 dma_configure_channel(shdma, 0x12c1);
663
664 dst = (unsigned long)fb_info->screen_base + *ppos;
665 start = (unsigned long)page_address(pages[0]);
666 end = (unsigned long)page_address(pages[nr_pages]);
667 len = nr_pages << PAGE_SHIFT;
668
669 /* Half-assed contig check */
670 if (start + len == end) {
671 /* As we do this in one shot, it's either all or nothing.. */
672 if ((*ppos + len) > fb_info->fix.smem_len) {
673 ret = -ENOSPC;
674 goto out_unmap;
675 }
676
677 dma_write(shdma, start, 0, len);
678 dma_write(pvr2dma, 0, dst, len);
679 dma_wait_for_completion(pvr2dma);
680
681 goto out;
682 }
683
684 /* Not contiguous, writeout per-page instead.. */
685 for (i = 0; i < nr_pages; i++, dst += PAGE_SIZE) {
686 if ((*ppos + (i << PAGE_SHIFT)) > fb_info->fix.smem_len) {
687 ret = -ENOSPC;
688 goto out_unmap;
689 }
690
691 dma_write_page(shdma, (unsigned long)page_address(pages[i]), 0);
692 dma_write_page(pvr2dma, 0, dst);
693 dma_wait_for_completion(pvr2dma);
694 }
695
696 out:
697 *ppos += count;
698 ret = count;
699
700 out_unmap:
701 for (i = 0; i < nr_pages; i++)
702 put_page(pages[i]);
703
704 kfree(pages);
705
706 return ret;
707 }
708 #endif /* CONFIG_PVR2_DMA */
709
710 static struct fb_ops pvr2fb_ops = {
711 .owner = THIS_MODULE,
712 .fb_setcolreg = pvr2fb_setcolreg,
713 .fb_blank = pvr2fb_blank,
714 .fb_check_var = pvr2fb_check_var,
715 .fb_set_par = pvr2fb_set_par,
716 #ifdef CONFIG_PVR2_DMA
717 .fb_write = pvr2fb_write,
718 #endif
719 .fb_fillrect = cfb_fillrect,
720 .fb_copyarea = cfb_copyarea,
721 .fb_imageblit = cfb_imageblit,
722 };
723
724 #ifndef MODULE
pvr2_get_param_val(const struct pvr2_params * p,const char * s,int size)725 static int pvr2_get_param_val(const struct pvr2_params *p, const char *s,
726 int size)
727 {
728 int i;
729
730 for (i = 0; i < size; i++) {
731 if (!strncasecmp(p[i].name, s, strlen(s)))
732 return p[i].val;
733 }
734 return -1;
735 }
736 #endif
737
pvr2_get_param_name(const struct pvr2_params * p,int val,int size)738 static char *pvr2_get_param_name(const struct pvr2_params *p, int val,
739 int size)
740 {
741 int i;
742
743 for (i = 0; i < size; i++) {
744 if (p[i].val == val)
745 return p[i].name;
746 }
747 return NULL;
748 }
749
750 /**
751 * pvr2fb_common_init
752 *
753 * Common init code for the PVR2 chips.
754 *
755 * This mostly takes care of the common aspects of the fb setup and
756 * registration. It's expected that the board-specific init code has
757 * already setup pvr2_fix with something meaningful at this point.
758 *
759 * Device info reporting is also done here, as well as picking a sane
760 * default from the modedb. For board-specific modelines, simply define
761 * a per-board modedb.
762 *
763 * Also worth noting is that the cable and video output types are likely
764 * always going to be VGA for the PCI-based PVR2 boards, but we leave this
765 * in for flexibility anyways. Who knows, maybe someone has tv-out on a
766 * PCI-based version of these things ;-)
767 */
pvr2fb_common_init(void)768 static int __maybe_unused pvr2fb_common_init(void)
769 {
770 struct pvr2fb_par *par = currentpar;
771 unsigned long modememused, rev;
772
773 fb_info->screen_base = ioremap_nocache(pvr2_fix.smem_start,
774 pvr2_fix.smem_len);
775
776 if (!fb_info->screen_base) {
777 printk(KERN_ERR "pvr2fb: Failed to remap smem space\n");
778 goto out_err;
779 }
780
781 par->mmio_base = ioremap_nocache(pvr2_fix.mmio_start,
782 pvr2_fix.mmio_len);
783 if (!par->mmio_base) {
784 printk(KERN_ERR "pvr2fb: Failed to remap mmio space\n");
785 goto out_err;
786 }
787
788 fb_memset(fb_info->screen_base, 0, pvr2_fix.smem_len);
789
790 pvr2_fix.ypanstep = nopan ? 0 : 1;
791 pvr2_fix.ywrapstep = nowrap ? 0 : 1;
792
793 fb_info->fbops = &pvr2fb_ops;
794 fb_info->fix = pvr2_fix;
795 fb_info->par = currentpar;
796 fb_info->pseudo_palette = currentpar->palette;
797 fb_info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
798
799 if (video_output == VO_VGA)
800 defmode = DEFMODE_VGA;
801
802 if (!mode_option)
803 mode_option = "640x480@60";
804
805 if (!fb_find_mode(&fb_info->var, fb_info, mode_option, pvr2_modedb,
806 NUM_TOTAL_MODES, &pvr2_modedb[defmode], 16))
807 fb_info->var = pvr2_var;
808
809 fb_alloc_cmap(&fb_info->cmap, 256, 0);
810
811 if (register_framebuffer(fb_info) < 0)
812 goto out_err;
813 /*Must write PIXDEPTH to register before anything is displayed - so force init */
814 pvr2_init_display(fb_info);
815
816 modememused = get_line_length(fb_info->var.xres_virtual,
817 fb_info->var.bits_per_pixel);
818 modememused *= fb_info->var.yres_virtual;
819
820 rev = fb_readl(par->mmio_base + 0x04);
821
822 fb_info(fb_info, "%s (rev %ld.%ld) frame buffer device, using %ldk/%ldk of video memory\n",
823 fb_info->fix.id, (rev >> 4) & 0x0f, rev & 0x0f,
824 modememused >> 10,
825 (unsigned long)(fb_info->fix.smem_len >> 10));
826 fb_info(fb_info, "Mode %dx%d-%d pitch = %ld cable: %s video output: %s\n",
827 fb_info->var.xres, fb_info->var.yres,
828 fb_info->var.bits_per_pixel,
829 get_line_length(fb_info->var.xres, fb_info->var.bits_per_pixel),
830 pvr2_get_param_name(cables, cable_type, 3),
831 pvr2_get_param_name(outputs, video_output, 3));
832
833 #ifdef CONFIG_SH_STORE_QUEUES
834 fb_notice(fb_info, "registering with SQ API\n");
835
836 pvr2fb_map = sq_remap(fb_info->fix.smem_start, fb_info->fix.smem_len,
837 fb_info->fix.id, PAGE_SHARED);
838
839 fb_notice(fb_info, "Mapped video memory to SQ addr 0x%lx\n",
840 pvr2fb_map);
841 #endif
842
843 return 0;
844
845 out_err:
846 if (fb_info->screen_base)
847 iounmap(fb_info->screen_base);
848 if (par->mmio_base)
849 iounmap(par->mmio_base);
850
851 return -ENXIO;
852 }
853
854 #ifdef CONFIG_SH_DREAMCAST
pvr2fb_dc_init(void)855 static int __init pvr2fb_dc_init(void)
856 {
857 if (!mach_is_dreamcast())
858 return -ENXIO;
859
860 /* Make a guess at the monitor based on the attached cable */
861 if (pvr2_init_cable() == CT_VGA) {
862 fb_info->monspecs.hfmin = 30000;
863 fb_info->monspecs.hfmax = 70000;
864 fb_info->monspecs.vfmin = 60;
865 fb_info->monspecs.vfmax = 60;
866 } else {
867 /* Not VGA, using a TV (taken from acornfb) */
868 fb_info->monspecs.hfmin = 15469;
869 fb_info->monspecs.hfmax = 15781;
870 fb_info->monspecs.vfmin = 49;
871 fb_info->monspecs.vfmax = 51;
872 }
873
874 /*
875 * XXX: This needs to pull default video output via BIOS or other means
876 */
877 if (video_output < 0) {
878 if (cable_type == CT_VGA) {
879 video_output = VO_VGA;
880 } else {
881 video_output = VO_NTSC;
882 }
883 }
884
885 /*
886 * Nothing exciting about the DC PVR2 .. only a measly 8MiB.
887 */
888 pvr2_fix.smem_start = 0xa5000000; /* RAM starts here */
889 pvr2_fix.smem_len = 8 << 20;
890
891 pvr2_fix.mmio_start = 0xa05f8000; /* registers start here */
892 pvr2_fix.mmio_len = 0x2000;
893
894 if (request_irq(HW_EVENT_VSYNC, pvr2fb_interrupt, IRQF_SHARED,
895 "pvr2 VBL handler", fb_info)) {
896 return -EBUSY;
897 }
898
899 #ifdef CONFIG_PVR2_DMA
900 if (request_dma(pvr2dma, "pvr2") != 0) {
901 free_irq(HW_EVENT_VSYNC, fb_info);
902 return -EBUSY;
903 }
904 #endif
905
906 return pvr2fb_common_init();
907 }
908
pvr2fb_dc_exit(void)909 static void pvr2fb_dc_exit(void)
910 {
911 if (fb_info->screen_base) {
912 iounmap(fb_info->screen_base);
913 fb_info->screen_base = NULL;
914 }
915 if (currentpar->mmio_base) {
916 iounmap(currentpar->mmio_base);
917 currentpar->mmio_base = NULL;
918 }
919
920 free_irq(HW_EVENT_VSYNC, fb_info);
921 #ifdef CONFIG_PVR2_DMA
922 free_dma(pvr2dma);
923 #endif
924 }
925 #endif /* CONFIG_SH_DREAMCAST */
926
927 #ifdef CONFIG_PCI
pvr2fb_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)928 static int pvr2fb_pci_probe(struct pci_dev *pdev,
929 const struct pci_device_id *ent)
930 {
931 int ret;
932
933 ret = pci_enable_device(pdev);
934 if (ret) {
935 printk(KERN_ERR "pvr2fb: PCI enable failed\n");
936 return ret;
937 }
938
939 ret = pci_request_regions(pdev, "pvr2fb");
940 if (ret) {
941 printk(KERN_ERR "pvr2fb: PCI request regions failed\n");
942 return ret;
943 }
944
945 /*
946 * Slightly more exciting than the DC PVR2 .. 16MiB!
947 */
948 pvr2_fix.smem_start = pci_resource_start(pdev, 0);
949 pvr2_fix.smem_len = pci_resource_len(pdev, 0);
950
951 pvr2_fix.mmio_start = pci_resource_start(pdev, 1);
952 pvr2_fix.mmio_len = pci_resource_len(pdev, 1);
953
954 fb_info->device = &pdev->dev;
955
956 return pvr2fb_common_init();
957 }
958
pvr2fb_pci_remove(struct pci_dev * pdev)959 static void pvr2fb_pci_remove(struct pci_dev *pdev)
960 {
961 if (fb_info->screen_base) {
962 iounmap(fb_info->screen_base);
963 fb_info->screen_base = NULL;
964 }
965 if (currentpar->mmio_base) {
966 iounmap(currentpar->mmio_base);
967 currentpar->mmio_base = NULL;
968 }
969
970 pci_release_regions(pdev);
971 }
972
973 static const struct pci_device_id pvr2fb_pci_tbl[] = {
974 { PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_NEON250,
975 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
976 { 0, },
977 };
978
979 MODULE_DEVICE_TABLE(pci, pvr2fb_pci_tbl);
980
981 static struct pci_driver pvr2fb_pci_driver = {
982 .name = "pvr2fb",
983 .id_table = pvr2fb_pci_tbl,
984 .probe = pvr2fb_pci_probe,
985 .remove = pvr2fb_pci_remove,
986 };
987
pvr2fb_pci_init(void)988 static int __init pvr2fb_pci_init(void)
989 {
990 return pci_register_driver(&pvr2fb_pci_driver);
991 }
992
pvr2fb_pci_exit(void)993 static void pvr2fb_pci_exit(void)
994 {
995 pci_unregister_driver(&pvr2fb_pci_driver);
996 }
997 #endif /* CONFIG_PCI */
998
999 /*
1000 * Parse command arguments. Supported arguments are:
1001 * inverse Use inverse color maps
1002 * cable:composite|rgb|vga Override the video cable type
1003 * output:NTSC|PAL|VGA Override the video output format
1004 *
1005 * <xres>x<yres>[-<bpp>][@<refresh>] or,
1006 * <name>[-<bpp>][@<refresh>] Startup using this video mode
1007 */
1008
1009 #ifndef MODULE
pvr2fb_setup(char * options)1010 static int __init pvr2fb_setup(char *options)
1011 {
1012 char *this_opt;
1013 char cable_arg[80];
1014 char output_arg[80];
1015
1016 if (!options || !*options)
1017 return 0;
1018
1019 while ((this_opt = strsep(&options, ","))) {
1020 if (!*this_opt)
1021 continue;
1022 if (!strcmp(this_opt, "inverse")) {
1023 fb_invert_cmaps();
1024 } else if (!strncmp(this_opt, "cable:", 6)) {
1025 strcpy(cable_arg, this_opt + 6);
1026 } else if (!strncmp(this_opt, "output:", 7)) {
1027 strcpy(output_arg, this_opt + 7);
1028 } else if (!strncmp(this_opt, "nopan", 5)) {
1029 nopan = 1;
1030 } else if (!strncmp(this_opt, "nowrap", 6)) {
1031 nowrap = 1;
1032 } else {
1033 mode_option = this_opt;
1034 }
1035 }
1036
1037 if (*cable_arg)
1038 cable_type = pvr2_get_param_val(cables, cable_arg, 3);
1039 if (*output_arg)
1040 video_output = pvr2_get_param_val(outputs, output_arg, 3);
1041
1042 return 0;
1043 }
1044 #endif
1045
1046 static struct pvr2_board {
1047 int (*init)(void);
1048 void (*exit)(void);
1049 char name[16];
1050 } board_driver[] __refdata = {
1051 #ifdef CONFIG_SH_DREAMCAST
1052 { pvr2fb_dc_init, pvr2fb_dc_exit, "Sega DC PVR2" },
1053 #endif
1054 #ifdef CONFIG_PCI
1055 { pvr2fb_pci_init, pvr2fb_pci_exit, "PCI PVR2" },
1056 #endif
1057 { 0, },
1058 };
1059
pvr2fb_init(void)1060 static int __init pvr2fb_init(void)
1061 {
1062 int i, ret = -ENODEV;
1063
1064 #ifndef MODULE
1065 char *option = NULL;
1066
1067 if (fb_get_options("pvr2fb", &option))
1068 return -ENODEV;
1069 pvr2fb_setup(option);
1070 #endif
1071
1072 fb_info = framebuffer_alloc(sizeof(struct pvr2fb_par), NULL);
1073 if (!fb_info)
1074 return -ENOMEM;
1075
1076 currentpar = fb_info->par;
1077
1078 for (i = 0; i < ARRAY_SIZE(board_driver); i++) {
1079 struct pvr2_board *pvr_board = board_driver + i;
1080
1081 if (!pvr_board->init)
1082 continue;
1083
1084 ret = pvr_board->init();
1085
1086 if (ret != 0) {
1087 printk(KERN_ERR "pvr2fb: Failed init of %s device\n",
1088 pvr_board->name);
1089 framebuffer_release(fb_info);
1090 break;
1091 }
1092 }
1093
1094 return ret;
1095 }
1096
pvr2fb_exit(void)1097 static void __exit pvr2fb_exit(void)
1098 {
1099 int i;
1100
1101 for (i = 0; i < ARRAY_SIZE(board_driver); i++) {
1102 struct pvr2_board *pvr_board = board_driver + i;
1103
1104 if (pvr_board->exit)
1105 pvr_board->exit();
1106 }
1107
1108 #ifdef CONFIG_SH_STORE_QUEUES
1109 sq_unmap(pvr2fb_map);
1110 #endif
1111
1112 unregister_framebuffer(fb_info);
1113 framebuffer_release(fb_info);
1114 }
1115
1116 module_init(pvr2fb_init);
1117 module_exit(pvr2fb_exit);
1118
1119 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, M. R. Brown <mrbrown@0xd6.org>");
1120 MODULE_DESCRIPTION("Framebuffer driver for NEC PowerVR 2 based graphics boards");
1121 MODULE_LICENSE("GPL");
1122
