1 /*
2 * Freescale i.MX Frame Buffer device driver
3 *
4 * Copyright (C) 2004 Sascha Hauer, Pengutronix
5 * Based on acornfb.c Copyright (C) Russell King.
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file COPYING in the main directory of this archive for
9 * more details.
10 *
11 * Please direct your questions and comments on this driver to the following
12 * email address:
13 *
14 * linux-arm-kernel@lists.arm.linux.org.uk
15 */
16
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/errno.h>
20 #include <linux/string.h>
21 #include <linux/interrupt.h>
22 #include <linux/slab.h>
23 #include <linux/mm.h>
24 #include <linux/fb.h>
25 #include <linux/delay.h>
26 #include <linux/init.h>
27 #include <linux/ioport.h>
28 #include <linux/cpufreq.h>
29 #include <linux/clk.h>
30 #include <linux/platform_device.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/io.h>
33 #include <linux/lcd.h>
34 #include <linux/math64.h>
35 #include <linux/of.h>
36 #include <linux/of_device.h>
37
38 #include <linux/regulator/consumer.h>
39
40 #include <video/of_display_timing.h>
41 #include <video/of_videomode.h>
42 #include <video/videomode.h>
43
44 #include <linux/platform_data/video-imxfb.h>
45
46 /*
47 * Complain if VAR is out of range.
48 */
49 #define DEBUG_VAR 1
50
51 #define DRIVER_NAME "imx-fb"
52
53 #define LCDC_SSA 0x00
54
55 #define LCDC_SIZE 0x04
56 #define SIZE_XMAX(x) ((((x) >> 4) & 0x3f) << 20)
57
58 #define YMAX_MASK_IMX1 0x1ff
59 #define YMAX_MASK_IMX21 0x3ff
60
61 #define LCDC_VPW 0x08
62 #define VPW_VPW(x) ((x) & 0x3ff)
63
64 #define LCDC_CPOS 0x0C
65 #define CPOS_CC1 (1<<31)
66 #define CPOS_CC0 (1<<30)
67 #define CPOS_OP (1<<28)
68 #define CPOS_CXP(x) (((x) & 3ff) << 16)
69
70 #define LCDC_LCWHB 0x10
71 #define LCWHB_BK_EN (1<<31)
72 #define LCWHB_CW(w) (((w) & 0x1f) << 24)
73 #define LCWHB_CH(h) (((h) & 0x1f) << 16)
74 #define LCWHB_BD(x) ((x) & 0xff)
75
76 #define LCDC_LCHCC 0x14
77
78 #define LCDC_PCR 0x18
79
80 #define LCDC_HCR 0x1C
81 #define HCR_H_WIDTH(x) (((x) & 0x3f) << 26)
82 #define HCR_H_WAIT_1(x) (((x) & 0xff) << 8)
83 #define HCR_H_WAIT_2(x) ((x) & 0xff)
84
85 #define LCDC_VCR 0x20
86 #define VCR_V_WIDTH(x) (((x) & 0x3f) << 26)
87 #define VCR_V_WAIT_1(x) (((x) & 0xff) << 8)
88 #define VCR_V_WAIT_2(x) ((x) & 0xff)
89
90 #define LCDC_POS 0x24
91 #define POS_POS(x) ((x) & 1f)
92
93 #define LCDC_LSCR1 0x28
94 /* bit fields in imxfb.h */
95
96 #define LCDC_PWMR 0x2C
97 /* bit fields in imxfb.h */
98
99 #define LCDC_DMACR 0x30
100 /* bit fields in imxfb.h */
101
102 #define LCDC_RMCR 0x34
103
104 #define RMCR_LCDC_EN_MX1 (1<<1)
105
106 #define RMCR_SELF_REF (1<<0)
107
108 #define LCDC_LCDICR 0x38
109 #define LCDICR_INT_SYN (1<<2)
110 #define LCDICR_INT_CON (1)
111
112 #define LCDC_LCDISR 0x40
113 #define LCDISR_UDR_ERR (1<<3)
114 #define LCDISR_ERR_RES (1<<2)
115 #define LCDISR_EOF (1<<1)
116 #define LCDISR_BOF (1<<0)
117
118 #define IMXFB_LSCR1_DEFAULT 0x00120300
119
120 #define LCDC_LAUSCR 0x80
121 #define LAUSCR_AUS_MODE (1<<31)
122
123 /* Used fb-mode. Can be set on kernel command line, therefore file-static. */
124 static const char *fb_mode;
125
126 /*
127 * These are the bitfields for each
128 * display depth that we support.
129 */
130 struct imxfb_rgb {
131 struct fb_bitfield red;
132 struct fb_bitfield green;
133 struct fb_bitfield blue;
134 struct fb_bitfield transp;
135 };
136
137 enum imxfb_type {
138 IMX1_FB,
139 IMX21_FB,
140 };
141
142 struct imxfb_info {
143 struct platform_device *pdev;
144 void __iomem *regs;
145 struct clk *clk_ipg;
146 struct clk *clk_ahb;
147 struct clk *clk_per;
148 enum imxfb_type devtype;
149 bool enabled;
150
151 /*
152 * These are the addresses we mapped
153 * the framebuffer memory region to.
154 */
155 dma_addr_t map_dma;
156 u_int map_size;
157
158 u_int palette_size;
159
160 dma_addr_t dbar1;
161 dma_addr_t dbar2;
162
163 u_int pcr;
164 u_int lauscr;
165 u_int pwmr;
166 u_int lscr1;
167 u_int dmacr;
168 bool cmap_inverse;
169 bool cmap_static;
170
171 struct imx_fb_videomode *mode;
172 int num_modes;
173
174 struct regulator *lcd_pwr;
175 };
176
177 static const struct platform_device_id imxfb_devtype[] = {
178 {
179 .name = "imx1-fb",
180 .driver_data = IMX1_FB,
181 }, {
182 .name = "imx21-fb",
183 .driver_data = IMX21_FB,
184 }, {
185 /* sentinel */
186 }
187 };
188 MODULE_DEVICE_TABLE(platform, imxfb_devtype);
189
190 static const struct of_device_id imxfb_of_dev_id[] = {
191 {
192 .compatible = "fsl,imx1-fb",
193 .data = &imxfb_devtype[IMX1_FB],
194 }, {
195 .compatible = "fsl,imx21-fb",
196 .data = &imxfb_devtype[IMX21_FB],
197 }, {
198 /* sentinel */
199 }
200 };
201 MODULE_DEVICE_TABLE(of, imxfb_of_dev_id);
202
is_imx1_fb(struct imxfb_info * fbi)203 static inline int is_imx1_fb(struct imxfb_info *fbi)
204 {
205 return fbi->devtype == IMX1_FB;
206 }
207
208 #define IMX_NAME "IMX"
209
210 /*
211 * Minimum X and Y resolutions
212 */
213 #define MIN_XRES 64
214 #define MIN_YRES 64
215
216 /* Actually this really is 18bit support, the lowest 2 bits of each colour
217 * are unused in hardware. We claim to have 24bit support to make software
218 * like X work, which does not support 18bit.
219 */
220 static struct imxfb_rgb def_rgb_18 = {
221 .red = {.offset = 16, .length = 8,},
222 .green = {.offset = 8, .length = 8,},
223 .blue = {.offset = 0, .length = 8,},
224 .transp = {.offset = 0, .length = 0,},
225 };
226
227 static struct imxfb_rgb def_rgb_16_tft = {
228 .red = {.offset = 11, .length = 5,},
229 .green = {.offset = 5, .length = 6,},
230 .blue = {.offset = 0, .length = 5,},
231 .transp = {.offset = 0, .length = 0,},
232 };
233
234 static struct imxfb_rgb def_rgb_16_stn = {
235 .red = {.offset = 8, .length = 4,},
236 .green = {.offset = 4, .length = 4,},
237 .blue = {.offset = 0, .length = 4,},
238 .transp = {.offset = 0, .length = 0,},
239 };
240
241 static struct imxfb_rgb def_rgb_8 = {
242 .red = {.offset = 0, .length = 8,},
243 .green = {.offset = 0, .length = 8,},
244 .blue = {.offset = 0, .length = 8,},
245 .transp = {.offset = 0, .length = 0,},
246 };
247
248 static int imxfb_activate_var(struct fb_var_screeninfo *var,
249 struct fb_info *info);
250
chan_to_field(u_int chan,struct fb_bitfield * bf)251 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
252 {
253 chan &= 0xffff;
254 chan >>= 16 - bf->length;
255 return chan << bf->offset;
256 }
257
imxfb_setpalettereg(u_int regno,u_int red,u_int green,u_int blue,u_int trans,struct fb_info * info)258 static int imxfb_setpalettereg(u_int regno, u_int red, u_int green, u_int blue,
259 u_int trans, struct fb_info *info)
260 {
261 struct imxfb_info *fbi = info->par;
262 u_int val, ret = 1;
263
264 #define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
265 if (regno < fbi->palette_size) {
266 val = (CNVT_TOHW(red, 4) << 8) |
267 (CNVT_TOHW(green,4) << 4) |
268 CNVT_TOHW(blue, 4);
269
270 writel(val, fbi->regs + 0x800 + (regno << 2));
271 ret = 0;
272 }
273 return ret;
274 }
275
imxfb_setcolreg(u_int regno,u_int red,u_int green,u_int blue,u_int trans,struct fb_info * info)276 static int imxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
277 u_int trans, struct fb_info *info)
278 {
279 struct imxfb_info *fbi = info->par;
280 unsigned int val;
281 int ret = 1;
282
283 /*
284 * If inverse mode was selected, invert all the colours
285 * rather than the register number. The register number
286 * is what you poke into the framebuffer to produce the
287 * colour you requested.
288 */
289 if (fbi->cmap_inverse) {
290 red = 0xffff - red;
291 green = 0xffff - green;
292 blue = 0xffff - blue;
293 }
294
295 /*
296 * If greyscale is true, then we convert the RGB value
297 * to greyscale no mater what visual we are using.
298 */
299 if (info->var.grayscale)
300 red = green = blue = (19595 * red + 38470 * green +
301 7471 * blue) >> 16;
302
303 switch (info->fix.visual) {
304 case FB_VISUAL_TRUECOLOR:
305 /*
306 * 12 or 16-bit True Colour. We encode the RGB value
307 * according to the RGB bitfield information.
308 */
309 if (regno < 16) {
310 u32 *pal = info->pseudo_palette;
311
312 val = chan_to_field(red, &info->var.red);
313 val |= chan_to_field(green, &info->var.green);
314 val |= chan_to_field(blue, &info->var.blue);
315
316 pal[regno] = val;
317 ret = 0;
318 }
319 break;
320
321 case FB_VISUAL_STATIC_PSEUDOCOLOR:
322 case FB_VISUAL_PSEUDOCOLOR:
323 ret = imxfb_setpalettereg(regno, red, green, blue, trans, info);
324 break;
325 }
326
327 return ret;
328 }
329
imxfb_find_mode(struct imxfb_info * fbi)330 static const struct imx_fb_videomode *imxfb_find_mode(struct imxfb_info *fbi)
331 {
332 struct imx_fb_videomode *m;
333 int i;
334
335 if (!fb_mode)
336 return &fbi->mode[0];
337
338 for (i = 0, m = &fbi->mode[0]; i < fbi->num_modes; i++, m++) {
339 if (!strcmp(m->mode.name, fb_mode))
340 return m;
341 }
342 return NULL;
343 }
344
345 /*
346 * imxfb_check_var():
347 * Round up in the following order: bits_per_pixel, xres,
348 * yres, xres_virtual, yres_virtual, xoffset, yoffset, grayscale,
349 * bitfields, horizontal timing, vertical timing.
350 */
imxfb_check_var(struct fb_var_screeninfo * var,struct fb_info * info)351 static int imxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
352 {
353 struct imxfb_info *fbi = info->par;
354 struct imxfb_rgb *rgb;
355 const struct imx_fb_videomode *imxfb_mode;
356 unsigned long lcd_clk;
357 unsigned long long tmp;
358 u32 pcr = 0;
359
360 if (var->xres < MIN_XRES)
361 var->xres = MIN_XRES;
362 if (var->yres < MIN_YRES)
363 var->yres = MIN_YRES;
364
365 imxfb_mode = imxfb_find_mode(fbi);
366 if (!imxfb_mode)
367 return -EINVAL;
368
369 var->xres = imxfb_mode->mode.xres;
370 var->yres = imxfb_mode->mode.yres;
371 var->bits_per_pixel = imxfb_mode->bpp;
372 var->pixclock = imxfb_mode->mode.pixclock;
373 var->hsync_len = imxfb_mode->mode.hsync_len;
374 var->left_margin = imxfb_mode->mode.left_margin;
375 var->right_margin = imxfb_mode->mode.right_margin;
376 var->vsync_len = imxfb_mode->mode.vsync_len;
377 var->upper_margin = imxfb_mode->mode.upper_margin;
378 var->lower_margin = imxfb_mode->mode.lower_margin;
379 var->sync = imxfb_mode->mode.sync;
380 var->xres_virtual = max(var->xres_virtual, var->xres);
381 var->yres_virtual = max(var->yres_virtual, var->yres);
382
383 pr_debug("var->bits_per_pixel=%d\n", var->bits_per_pixel);
384
385 lcd_clk = clk_get_rate(fbi->clk_per);
386
387 tmp = var->pixclock * (unsigned long long)lcd_clk;
388
389 do_div(tmp, 1000000);
390
391 if (do_div(tmp, 1000000) > 500000)
392 tmp++;
393
394 pcr = (unsigned int)tmp;
395
396 if (--pcr > 0x3F) {
397 pcr = 0x3F;
398 printk(KERN_WARNING "Must limit pixel clock to %luHz\n",
399 lcd_clk / pcr);
400 }
401
402 switch (var->bits_per_pixel) {
403 case 32:
404 pcr |= PCR_BPIX_18;
405 rgb = &def_rgb_18;
406 break;
407 case 16:
408 default:
409 if (is_imx1_fb(fbi))
410 pcr |= PCR_BPIX_12;
411 else
412 pcr |= PCR_BPIX_16;
413
414 if (imxfb_mode->pcr & PCR_TFT)
415 rgb = &def_rgb_16_tft;
416 else
417 rgb = &def_rgb_16_stn;
418 break;
419 case 8:
420 pcr |= PCR_BPIX_8;
421 rgb = &def_rgb_8;
422 break;
423 }
424
425 /* add sync polarities */
426 pcr |= imxfb_mode->pcr & ~(0x3f | (7 << 25));
427
428 fbi->pcr = pcr;
429 /*
430 * The LCDC AUS Mode Control Register does not exist on imx1.
431 */
432 if (!is_imx1_fb(fbi) && imxfb_mode->aus_mode)
433 fbi->lauscr = LAUSCR_AUS_MODE;
434
435 /*
436 * Copy the RGB parameters for this display
437 * from the machine specific parameters.
438 */
439 var->red = rgb->red;
440 var->green = rgb->green;
441 var->blue = rgb->blue;
442 var->transp = rgb->transp;
443
444 pr_debug("RGBT length = %d:%d:%d:%d\n",
445 var->red.length, var->green.length, var->blue.length,
446 var->transp.length);
447
448 pr_debug("RGBT offset = %d:%d:%d:%d\n",
449 var->red.offset, var->green.offset, var->blue.offset,
450 var->transp.offset);
451
452 return 0;
453 }
454
455 /*
456 * imxfb_set_par():
457 * Set the user defined part of the display for the specified console
458 */
imxfb_set_par(struct fb_info * info)459 static int imxfb_set_par(struct fb_info *info)
460 {
461 struct imxfb_info *fbi = info->par;
462 struct fb_var_screeninfo *var = &info->var;
463
464 if (var->bits_per_pixel == 16 || var->bits_per_pixel == 32)
465 info->fix.visual = FB_VISUAL_TRUECOLOR;
466 else if (!fbi->cmap_static)
467 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
468 else {
469 /*
470 * Some people have weird ideas about wanting static
471 * pseudocolor maps. I suspect their user space
472 * applications are broken.
473 */
474 info->fix.visual = FB_VISUAL_STATIC_PSEUDOCOLOR;
475 }
476
477 info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8;
478 fbi->palette_size = var->bits_per_pixel == 8 ? 256 : 16;
479
480 imxfb_activate_var(var, info);
481
482 return 0;
483 }
484
imxfb_enable_controller(struct imxfb_info * fbi)485 static int imxfb_enable_controller(struct imxfb_info *fbi)
486 {
487 int ret;
488
489 if (fbi->enabled)
490 return 0;
491
492 pr_debug("Enabling LCD controller\n");
493
494 writel(fbi->map_dma, fbi->regs + LCDC_SSA);
495
496 /* panning offset 0 (0 pixel offset) */
497 writel(0x00000000, fbi->regs + LCDC_POS);
498
499 /* disable hardware cursor */
500 writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
501 fbi->regs + LCDC_CPOS);
502
503 /*
504 * RMCR_LCDC_EN_MX1 is present on i.MX1 only, but doesn't hurt
505 * on other SoCs
506 */
507 writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR);
508
509 ret = clk_prepare_enable(fbi->clk_ipg);
510 if (ret)
511 goto err_enable_ipg;
512
513 ret = clk_prepare_enable(fbi->clk_ahb);
514 if (ret)
515 goto err_enable_ahb;
516
517 ret = clk_prepare_enable(fbi->clk_per);
518 if (ret)
519 goto err_enable_per;
520
521 fbi->enabled = true;
522 return 0;
523
524 err_enable_per:
525 clk_disable_unprepare(fbi->clk_ahb);
526 err_enable_ahb:
527 clk_disable_unprepare(fbi->clk_ipg);
528 err_enable_ipg:
529 writel(0, fbi->regs + LCDC_RMCR);
530
531 return ret;
532 }
533
imxfb_disable_controller(struct imxfb_info * fbi)534 static void imxfb_disable_controller(struct imxfb_info *fbi)
535 {
536 if (!fbi->enabled)
537 return;
538
539 pr_debug("Disabling LCD controller\n");
540
541 clk_disable_unprepare(fbi->clk_per);
542 clk_disable_unprepare(fbi->clk_ahb);
543 clk_disable_unprepare(fbi->clk_ipg);
544 fbi->enabled = false;
545
546 writel(0, fbi->regs + LCDC_RMCR);
547 }
548
imxfb_blank(int blank,struct fb_info * info)549 static int imxfb_blank(int blank, struct fb_info *info)
550 {
551 struct imxfb_info *fbi = info->par;
552
553 pr_debug("imxfb_blank: blank=%d\n", blank);
554
555 switch (blank) {
556 case FB_BLANK_POWERDOWN:
557 case FB_BLANK_VSYNC_SUSPEND:
558 case FB_BLANK_HSYNC_SUSPEND:
559 case FB_BLANK_NORMAL:
560 imxfb_disable_controller(fbi);
561 break;
562
563 case FB_BLANK_UNBLANK:
564 return imxfb_enable_controller(fbi);
565 }
566 return 0;
567 }
568
569 static struct fb_ops imxfb_ops = {
570 .owner = THIS_MODULE,
571 .fb_check_var = imxfb_check_var,
572 .fb_set_par = imxfb_set_par,
573 .fb_setcolreg = imxfb_setcolreg,
574 .fb_fillrect = cfb_fillrect,
575 .fb_copyarea = cfb_copyarea,
576 .fb_imageblit = cfb_imageblit,
577 .fb_blank = imxfb_blank,
578 };
579
580 /*
581 * imxfb_activate_var():
582 * Configures LCD Controller based on entries in var parameter. Settings are
583 * only written to the controller if changes were made.
584 */
imxfb_activate_var(struct fb_var_screeninfo * var,struct fb_info * info)585 static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *info)
586 {
587 struct imxfb_info *fbi = info->par;
588 u32 ymax_mask = is_imx1_fb(fbi) ? YMAX_MASK_IMX1 : YMAX_MASK_IMX21;
589
590 pr_debug("var: xres=%d hslen=%d lm=%d rm=%d\n",
591 var->xres, var->hsync_len,
592 var->left_margin, var->right_margin);
593 pr_debug("var: yres=%d vslen=%d um=%d bm=%d\n",
594 var->yres, var->vsync_len,
595 var->upper_margin, var->lower_margin);
596
597 #if DEBUG_VAR
598 if (var->xres < 16 || var->xres > 1024)
599 printk(KERN_ERR "%s: invalid xres %d\n",
600 info->fix.id, var->xres);
601 if (var->hsync_len < 1 || var->hsync_len > 64)
602 printk(KERN_ERR "%s: invalid hsync_len %d\n",
603 info->fix.id, var->hsync_len);
604 if (var->left_margin > 255)
605 printk(KERN_ERR "%s: invalid left_margin %d\n",
606 info->fix.id, var->left_margin);
607 if (var->right_margin > 255)
608 printk(KERN_ERR "%s: invalid right_margin %d\n",
609 info->fix.id, var->right_margin);
610 if (var->yres < 1 || var->yres > ymax_mask)
611 printk(KERN_ERR "%s: invalid yres %d\n",
612 info->fix.id, var->yres);
613 if (var->vsync_len > 100)
614 printk(KERN_ERR "%s: invalid vsync_len %d\n",
615 info->fix.id, var->vsync_len);
616 if (var->upper_margin > 63)
617 printk(KERN_ERR "%s: invalid upper_margin %d\n",
618 info->fix.id, var->upper_margin);
619 if (var->lower_margin > 255)
620 printk(KERN_ERR "%s: invalid lower_margin %d\n",
621 info->fix.id, var->lower_margin);
622 #endif
623
624 /* physical screen start address */
625 writel(VPW_VPW(var->xres * var->bits_per_pixel / 8 / 4),
626 fbi->regs + LCDC_VPW);
627
628 writel(HCR_H_WIDTH(var->hsync_len - 1) |
629 HCR_H_WAIT_1(var->right_margin - 1) |
630 HCR_H_WAIT_2(var->left_margin - 3),
631 fbi->regs + LCDC_HCR);
632
633 writel(VCR_V_WIDTH(var->vsync_len) |
634 VCR_V_WAIT_1(var->lower_margin) |
635 VCR_V_WAIT_2(var->upper_margin),
636 fbi->regs + LCDC_VCR);
637
638 writel(SIZE_XMAX(var->xres) | (var->yres & ymax_mask),
639 fbi->regs + LCDC_SIZE);
640
641 writel(fbi->pcr, fbi->regs + LCDC_PCR);
642 if (fbi->pwmr)
643 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
644 writel(fbi->lscr1, fbi->regs + LCDC_LSCR1);
645
646 /* dmacr = 0 is no valid value, as we need DMA control marks. */
647 if (fbi->dmacr)
648 writel(fbi->dmacr, fbi->regs + LCDC_DMACR);
649
650 if (fbi->lauscr)
651 writel(fbi->lauscr, fbi->regs + LCDC_LAUSCR);
652
653 return 0;
654 }
655
imxfb_init_fbinfo(struct platform_device * pdev)656 static int imxfb_init_fbinfo(struct platform_device *pdev)
657 {
658 struct imx_fb_platform_data *pdata = dev_get_platdata(&pdev->dev);
659 struct fb_info *info = dev_get_drvdata(&pdev->dev);
660 struct imxfb_info *fbi = info->par;
661 struct device_node *np;
662
663 pr_debug("%s\n",__func__);
664
665 info->pseudo_palette = kmalloc_array(16, sizeof(u32), GFP_KERNEL);
666 if (!info->pseudo_palette)
667 return -ENOMEM;
668
669 memset(fbi, 0, sizeof(struct imxfb_info));
670
671 fbi->devtype = pdev->id_entry->driver_data;
672
673 strlcpy(info->fix.id, IMX_NAME, sizeof(info->fix.id));
674
675 info->fix.type = FB_TYPE_PACKED_PIXELS;
676 info->fix.type_aux = 0;
677 info->fix.xpanstep = 0;
678 info->fix.ypanstep = 0;
679 info->fix.ywrapstep = 0;
680 info->fix.accel = FB_ACCEL_NONE;
681
682 info->var.nonstd = 0;
683 info->var.activate = FB_ACTIVATE_NOW;
684 info->var.height = -1;
685 info->var.width = -1;
686 info->var.accel_flags = 0;
687 info->var.vmode = FB_VMODE_NONINTERLACED;
688
689 info->fbops = &imxfb_ops;
690 info->flags = FBINFO_FLAG_DEFAULT |
691 FBINFO_READS_FAST;
692 if (pdata) {
693 fbi->lscr1 = pdata->lscr1;
694 fbi->dmacr = pdata->dmacr;
695 fbi->pwmr = pdata->pwmr;
696 } else {
697 np = pdev->dev.of_node;
698 info->var.grayscale = of_property_read_bool(np,
699 "cmap-greyscale");
700 fbi->cmap_inverse = of_property_read_bool(np, "cmap-inverse");
701 fbi->cmap_static = of_property_read_bool(np, "cmap-static");
702
703 fbi->lscr1 = IMXFB_LSCR1_DEFAULT;
704
705 of_property_read_u32(np, "fsl,lpccr", &fbi->pwmr);
706
707 of_property_read_u32(np, "fsl,lscr1", &fbi->lscr1);
708
709 of_property_read_u32(np, "fsl,dmacr", &fbi->dmacr);
710 }
711
712 return 0;
713 }
714
imxfb_of_read_mode(struct device * dev,struct device_node * np,struct imx_fb_videomode * imxfb_mode)715 static int imxfb_of_read_mode(struct device *dev, struct device_node *np,
716 struct imx_fb_videomode *imxfb_mode)
717 {
718 int ret;
719 struct fb_videomode *of_mode = &imxfb_mode->mode;
720 u32 bpp;
721 u32 pcr;
722
723 ret = of_property_read_string(np, "model", &of_mode->name);
724 if (ret)
725 of_mode->name = NULL;
726
727 ret = of_get_fb_videomode(np, of_mode, OF_USE_NATIVE_MODE);
728 if (ret) {
729 dev_err(dev, "Failed to get videomode from DT\n");
730 return ret;
731 }
732
733 ret = of_property_read_u32(np, "bits-per-pixel", &bpp);
734 ret |= of_property_read_u32(np, "fsl,pcr", &pcr);
735
736 if (ret) {
737 dev_err(dev, "Failed to read bpp and pcr from DT\n");
738 return -EINVAL;
739 }
740
741 if (bpp < 1 || bpp > 255) {
742 dev_err(dev, "Bits per pixel have to be between 1 and 255\n");
743 return -EINVAL;
744 }
745
746 imxfb_mode->bpp = bpp;
747 imxfb_mode->pcr = pcr;
748
749 /*
750 * fsl,aus-mode is optional
751 */
752 imxfb_mode->aus_mode = of_property_read_bool(np, "fsl,aus-mode");
753
754 return 0;
755 }
756
imxfb_lcd_check_fb(struct lcd_device * lcddev,struct fb_info * fi)757 static int imxfb_lcd_check_fb(struct lcd_device *lcddev, struct fb_info *fi)
758 {
759 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
760
761 if (!fi || fi->par == fbi)
762 return 1;
763
764 return 0;
765 }
766
imxfb_lcd_get_contrast(struct lcd_device * lcddev)767 static int imxfb_lcd_get_contrast(struct lcd_device *lcddev)
768 {
769 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
770
771 return fbi->pwmr & 0xff;
772 }
773
imxfb_lcd_set_contrast(struct lcd_device * lcddev,int contrast)774 static int imxfb_lcd_set_contrast(struct lcd_device *lcddev, int contrast)
775 {
776 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
777
778 if (fbi->pwmr && fbi->enabled) {
779 if (contrast > 255)
780 contrast = 255;
781 else if (contrast < 0)
782 contrast = 0;
783
784 fbi->pwmr &= ~0xff;
785 fbi->pwmr |= contrast;
786
787 writel(fbi->pwmr, fbi->regs + LCDC_PWMR);
788 }
789
790 return 0;
791 }
792
imxfb_lcd_get_power(struct lcd_device * lcddev)793 static int imxfb_lcd_get_power(struct lcd_device *lcddev)
794 {
795 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
796
797 if (!IS_ERR(fbi->lcd_pwr) &&
798 !regulator_is_enabled(fbi->lcd_pwr))
799 return FB_BLANK_POWERDOWN;
800
801 return FB_BLANK_UNBLANK;
802 }
803
imxfb_lcd_set_power(struct lcd_device * lcddev,int power)804 static int imxfb_lcd_set_power(struct lcd_device *lcddev, int power)
805 {
806 struct imxfb_info *fbi = dev_get_drvdata(&lcddev->dev);
807
808 if (!IS_ERR(fbi->lcd_pwr)) {
809 if (power == FB_BLANK_UNBLANK)
810 return regulator_enable(fbi->lcd_pwr);
811 else
812 return regulator_disable(fbi->lcd_pwr);
813 }
814
815 return 0;
816 }
817
818 static struct lcd_ops imxfb_lcd_ops = {
819 .check_fb = imxfb_lcd_check_fb,
820 .get_contrast = imxfb_lcd_get_contrast,
821 .set_contrast = imxfb_lcd_set_contrast,
822 .get_power = imxfb_lcd_get_power,
823 .set_power = imxfb_lcd_set_power,
824 };
825
imxfb_setup(void)826 static int imxfb_setup(void)
827 {
828 char *opt, *options = NULL;
829
830 if (fb_get_options("imxfb", &options))
831 return -ENODEV;
832
833 if (!options || !*options)
834 return 0;
835
836 while ((opt = strsep(&options, ",")) != NULL) {
837 if (!*opt)
838 continue;
839 else
840 fb_mode = opt;
841 }
842
843 return 0;
844 }
845
imxfb_probe(struct platform_device * pdev)846 static int imxfb_probe(struct platform_device *pdev)
847 {
848 struct imxfb_info *fbi;
849 struct lcd_device *lcd;
850 struct fb_info *info;
851 struct imx_fb_platform_data *pdata;
852 struct resource *res;
853 struct imx_fb_videomode *m;
854 const struct of_device_id *of_id;
855 int ret, i;
856 int bytes_per_pixel;
857
858 dev_info(&pdev->dev, "i.MX Framebuffer driver\n");
859
860 ret = imxfb_setup();
861 if (ret < 0)
862 return ret;
863
864 of_id = of_match_device(imxfb_of_dev_id, &pdev->dev);
865 if (of_id)
866 pdev->id_entry = of_id->data;
867
868 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
869 if (!res)
870 return -ENODEV;
871
872 pdata = dev_get_platdata(&pdev->dev);
873
874 info = framebuffer_alloc(sizeof(struct imxfb_info), &pdev->dev);
875 if (!info)
876 return -ENOMEM;
877
878 fbi = info->par;
879
880 platform_set_drvdata(pdev, info);
881
882 ret = imxfb_init_fbinfo(pdev);
883 if (ret < 0)
884 goto failed_init;
885
886 if (pdata) {
887 if (!fb_mode)
888 fb_mode = pdata->mode[0].mode.name;
889
890 fbi->mode = pdata->mode;
891 fbi->num_modes = pdata->num_modes;
892 } else {
893 struct device_node *display_np;
894 fb_mode = NULL;
895
896 display_np = of_parse_phandle(pdev->dev.of_node, "display", 0);
897 if (!display_np) {
898 dev_err(&pdev->dev, "No display defined in devicetree\n");
899 ret = -EINVAL;
900 goto failed_of_parse;
901 }
902
903 /*
904 * imxfb does not support more modes, we choose only the native
905 * mode.
906 */
907 fbi->num_modes = 1;
908
909 fbi->mode = devm_kzalloc(&pdev->dev,
910 sizeof(struct imx_fb_videomode), GFP_KERNEL);
911 if (!fbi->mode) {
912 ret = -ENOMEM;
913 goto failed_of_parse;
914 }
915
916 ret = imxfb_of_read_mode(&pdev->dev, display_np, fbi->mode);
917 if (ret)
918 goto failed_of_parse;
919 }
920
921 /* Calculate maximum bytes used per pixel. In most cases this should
922 * be the same as m->bpp/8 */
923 m = &fbi->mode[0];
924 bytes_per_pixel = (m->bpp + 7) / 8;
925 for (i = 0; i < fbi->num_modes; i++, m++)
926 info->fix.smem_len = max_t(size_t, info->fix.smem_len,
927 m->mode.xres * m->mode.yres * bytes_per_pixel);
928
929 res = request_mem_region(res->start, resource_size(res),
930 DRIVER_NAME);
931 if (!res) {
932 ret = -EBUSY;
933 goto failed_req;
934 }
935
936 fbi->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
937 if (IS_ERR(fbi->clk_ipg)) {
938 ret = PTR_ERR(fbi->clk_ipg);
939 goto failed_getclock;
940 }
941
942 /*
943 * The LCDC controller does not have an enable bit. The
944 * controller starts directly when the clocks are enabled.
945 * If the clocks are enabled when the controller is not yet
946 * programmed with proper register values (enabled at the
947 * bootloader, for example) then it just goes into some undefined
948 * state.
949 * To avoid this issue, let's enable and disable LCDC IPG clock
950 * so that we force some kind of 'reset' to the LCDC block.
951 */
952 ret = clk_prepare_enable(fbi->clk_ipg);
953 if (ret)
954 goto failed_getclock;
955 clk_disable_unprepare(fbi->clk_ipg);
956
957 fbi->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
958 if (IS_ERR(fbi->clk_ahb)) {
959 ret = PTR_ERR(fbi->clk_ahb);
960 goto failed_getclock;
961 }
962
963 fbi->clk_per = devm_clk_get(&pdev->dev, "per");
964 if (IS_ERR(fbi->clk_per)) {
965 ret = PTR_ERR(fbi->clk_per);
966 goto failed_getclock;
967 }
968
969 fbi->regs = ioremap(res->start, resource_size(res));
970 if (fbi->regs == NULL) {
971 dev_err(&pdev->dev, "Cannot map frame buffer registers\n");
972 ret = -ENOMEM;
973 goto failed_ioremap;
974 }
975
976 fbi->map_size = PAGE_ALIGN(info->fix.smem_len);
977 info->screen_base = dma_alloc_wc(&pdev->dev, fbi->map_size,
978 &fbi->map_dma, GFP_KERNEL);
979
980 if (!info->screen_base) {
981 dev_err(&pdev->dev, "Failed to allocate video RAM: %d\n", ret);
982 ret = -ENOMEM;
983 goto failed_map;
984 }
985
986 info->fix.smem_start = fbi->map_dma;
987
988 if (pdata && pdata->init) {
989 ret = pdata->init(fbi->pdev);
990 if (ret)
991 goto failed_platform_init;
992 }
993
994
995 INIT_LIST_HEAD(&info->modelist);
996 for (i = 0; i < fbi->num_modes; i++)
997 fb_add_videomode(&fbi->mode[i].mode, &info->modelist);
998
999 /*
1000 * This makes sure that our colour bitfield
1001 * descriptors are correctly initialised.
1002 */
1003 imxfb_check_var(&info->var, info);
1004
1005 /*
1006 * For modes > 8bpp, the color map is bypassed.
1007 * Therefore, 256 entries are enough.
1008 */
1009 ret = fb_alloc_cmap(&info->cmap, 256, 0);
1010 if (ret < 0)
1011 goto failed_cmap;
1012
1013 imxfb_set_par(info);
1014 ret = register_framebuffer(info);
1015 if (ret < 0) {
1016 dev_err(&pdev->dev, "failed to register framebuffer\n");
1017 goto failed_register;
1018 }
1019
1020 fbi->lcd_pwr = devm_regulator_get(&pdev->dev, "lcd");
1021 if (IS_ERR(fbi->lcd_pwr) && (PTR_ERR(fbi->lcd_pwr) == -EPROBE_DEFER)) {
1022 ret = -EPROBE_DEFER;
1023 goto failed_lcd;
1024 }
1025
1026 lcd = devm_lcd_device_register(&pdev->dev, "imxfb-lcd", &pdev->dev, fbi,
1027 &imxfb_lcd_ops);
1028 if (IS_ERR(lcd)) {
1029 ret = PTR_ERR(lcd);
1030 goto failed_lcd;
1031 }
1032
1033 lcd->props.max_contrast = 0xff;
1034
1035 imxfb_enable_controller(fbi);
1036 fbi->pdev = pdev;
1037
1038 return 0;
1039
1040 failed_lcd:
1041 unregister_framebuffer(info);
1042
1043 failed_register:
1044 fb_dealloc_cmap(&info->cmap);
1045 failed_cmap:
1046 if (pdata && pdata->exit)
1047 pdata->exit(fbi->pdev);
1048 failed_platform_init:
1049 dma_free_wc(&pdev->dev, fbi->map_size, info->screen_base,
1050 fbi->map_dma);
1051 failed_map:
1052 iounmap(fbi->regs);
1053 failed_ioremap:
1054 failed_getclock:
1055 release_mem_region(res->start, resource_size(res));
1056 failed_req:
1057 failed_of_parse:
1058 kfree(info->pseudo_palette);
1059 failed_init:
1060 framebuffer_release(info);
1061 return ret;
1062 }
1063
imxfb_remove(struct platform_device * pdev)1064 static int imxfb_remove(struct platform_device *pdev)
1065 {
1066 struct imx_fb_platform_data *pdata;
1067 struct fb_info *info = platform_get_drvdata(pdev);
1068 struct imxfb_info *fbi = info->par;
1069 struct resource *res;
1070
1071 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1072
1073 imxfb_disable_controller(fbi);
1074
1075 unregister_framebuffer(info);
1076 fb_dealloc_cmap(&info->cmap);
1077 pdata = dev_get_platdata(&pdev->dev);
1078 if (pdata && pdata->exit)
1079 pdata->exit(fbi->pdev);
1080 dma_free_wc(&pdev->dev, fbi->map_size, info->screen_base,
1081 fbi->map_dma);
1082 iounmap(fbi->regs);
1083 release_mem_region(res->start, resource_size(res));
1084 kfree(info->pseudo_palette);
1085 framebuffer_release(info);
1086
1087 return 0;
1088 }
1089
imxfb_suspend(struct device * dev)1090 static int __maybe_unused imxfb_suspend(struct device *dev)
1091 {
1092 struct fb_info *info = dev_get_drvdata(dev);
1093 struct imxfb_info *fbi = info->par;
1094
1095 imxfb_disable_controller(fbi);
1096
1097 return 0;
1098 }
1099
imxfb_resume(struct device * dev)1100 static int __maybe_unused imxfb_resume(struct device *dev)
1101 {
1102 struct fb_info *info = dev_get_drvdata(dev);
1103 struct imxfb_info *fbi = info->par;
1104
1105 imxfb_enable_controller(fbi);
1106
1107 return 0;
1108 }
1109
1110 static SIMPLE_DEV_PM_OPS(imxfb_pm_ops, imxfb_suspend, imxfb_resume);
1111
1112 static struct platform_driver imxfb_driver = {
1113 .driver = {
1114 .name = DRIVER_NAME,
1115 .of_match_table = imxfb_of_dev_id,
1116 .pm = &imxfb_pm_ops,
1117 },
1118 .probe = imxfb_probe,
1119 .remove = imxfb_remove,
1120 .id_table = imxfb_devtype,
1121 };
1122 module_platform_driver(imxfb_driver);
1123
1124 MODULE_DESCRIPTION("Freescale i.MX framebuffer driver");
1125 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
1126 MODULE_LICENSE("GPL");
1127
