1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * altera_uart.c -- Altera UART driver
4 *
5 * Based on mcf.c -- Freescale ColdFire UART driver
6 *
7 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
8 * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
9 * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
10 */
11
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/timer.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/console.h>
18 #include <linux/tty.h>
19 #include <linux/tty_flip.h>
20 #include <linux/serial.h>
21 #include <linux/serial_core.h>
22 #include <linux/platform_device.h>
23 #include <linux/of.h>
24 #include <linux/io.h>
25 #include <linux/altera_uart.h>
26
27 #define DRV_NAME "altera_uart"
28 #define SERIAL_ALTERA_MAJOR 204
29 #define SERIAL_ALTERA_MINOR 213
30
31 /*
32 * Altera UART register definitions according to the Nios UART datasheet:
33 * http://www.altera.com/literature/ds/ds_nios_uart.pdf
34 */
35
36 #define ALTERA_UART_SIZE 32
37
38 #define ALTERA_UART_RXDATA_REG 0
39 #define ALTERA_UART_TXDATA_REG 4
40 #define ALTERA_UART_STATUS_REG 8
41 #define ALTERA_UART_CONTROL_REG 12
42 #define ALTERA_UART_DIVISOR_REG 16
43 #define ALTERA_UART_EOP_REG 20
44
45 #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
46 #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
47 #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
48 #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
49 #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
50 #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
51 #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
52 #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
53 #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
54 #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
55 #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
56 #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
57
58 /* Enable interrupt on... */
59 #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
60 #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
61 #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
62 #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
63 #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
64 #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
65 #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
66 #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
67 #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
68
69 #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
70 #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
71 #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
72 #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
73
74 /*
75 * Local per-uart structure.
76 */
77 struct altera_uart {
78 struct uart_port port;
79 struct timer_list tmr;
80 unsigned int sigs; /* Local copy of line sigs */
81 unsigned short imr; /* Local IMR mirror */
82 };
83
altera_uart_readl(struct uart_port * port,int reg)84 static u32 altera_uart_readl(struct uart_port *port, int reg)
85 {
86 return readl(port->membase + (reg << port->regshift));
87 }
88
altera_uart_writel(struct uart_port * port,u32 dat,int reg)89 static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
90 {
91 writel(dat, port->membase + (reg << port->regshift));
92 }
93
altera_uart_tx_empty(struct uart_port * port)94 static unsigned int altera_uart_tx_empty(struct uart_port *port)
95 {
96 return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
97 ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
98 }
99
altera_uart_get_mctrl(struct uart_port * port)100 static unsigned int altera_uart_get_mctrl(struct uart_port *port)
101 {
102 struct altera_uart *pp = container_of(port, struct altera_uart, port);
103 unsigned int sigs;
104
105 sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
106 ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
107 sigs |= (pp->sigs & TIOCM_RTS);
108
109 return sigs;
110 }
111
altera_uart_update_ctrl_reg(struct altera_uart * pp)112 static void altera_uart_update_ctrl_reg(struct altera_uart *pp)
113 {
114 unsigned short imr = pp->imr;
115
116 /*
117 * If the device doesn't have an irq, ensure that the irq bits are
118 * masked out to keep the irq line inactive.
119 */
120 if (!pp->port.irq)
121 imr &= ALTERA_UART_CONTROL_TRBK_MSK | ALTERA_UART_CONTROL_RTS_MSK;
122
123 altera_uart_writel(&pp->port, imr, ALTERA_UART_CONTROL_REG);
124 }
125
altera_uart_set_mctrl(struct uart_port * port,unsigned int sigs)126 static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
127 {
128 struct altera_uart *pp = container_of(port, struct altera_uart, port);
129
130 pp->sigs = sigs;
131 if (sigs & TIOCM_RTS)
132 pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
133 else
134 pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
135 altera_uart_update_ctrl_reg(pp);
136 }
137
altera_uart_start_tx(struct uart_port * port)138 static void altera_uart_start_tx(struct uart_port *port)
139 {
140 struct altera_uart *pp = container_of(port, struct altera_uart, port);
141
142 pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
143 altera_uart_update_ctrl_reg(pp);
144 }
145
altera_uart_stop_tx(struct uart_port * port)146 static void altera_uart_stop_tx(struct uart_port *port)
147 {
148 struct altera_uart *pp = container_of(port, struct altera_uart, port);
149
150 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
151 altera_uart_update_ctrl_reg(pp);
152 }
153
altera_uart_stop_rx(struct uart_port * port)154 static void altera_uart_stop_rx(struct uart_port *port)
155 {
156 struct altera_uart *pp = container_of(port, struct altera_uart, port);
157
158 pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
159 altera_uart_update_ctrl_reg(pp);
160 }
161
altera_uart_break_ctl(struct uart_port * port,int break_state)162 static void altera_uart_break_ctl(struct uart_port *port, int break_state)
163 {
164 struct altera_uart *pp = container_of(port, struct altera_uart, port);
165 unsigned long flags;
166
167 spin_lock_irqsave(&port->lock, flags);
168 if (break_state == -1)
169 pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
170 else
171 pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
172 altera_uart_update_ctrl_reg(pp);
173 spin_unlock_irqrestore(&port->lock, flags);
174 }
175
altera_uart_set_termios(struct uart_port * port,struct ktermios * termios,struct ktermios * old)176 static void altera_uart_set_termios(struct uart_port *port,
177 struct ktermios *termios,
178 struct ktermios *old)
179 {
180 unsigned long flags;
181 unsigned int baud, baudclk;
182
183 baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
184 baudclk = port->uartclk / baud;
185
186 if (old)
187 tty_termios_copy_hw(termios, old);
188 tty_termios_encode_baud_rate(termios, baud, baud);
189
190 spin_lock_irqsave(&port->lock, flags);
191 uart_update_timeout(port, termios->c_cflag, baud);
192 altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
193 spin_unlock_irqrestore(&port->lock, flags);
194
195 /*
196 * FIXME: port->read_status_mask and port->ignore_status_mask
197 * need to be initialized based on termios settings for
198 * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT
199 */
200 }
201
altera_uart_rx_chars(struct altera_uart * pp)202 static void altera_uart_rx_chars(struct altera_uart *pp)
203 {
204 struct uart_port *port = &pp->port;
205 unsigned char ch, flag;
206 unsigned short status;
207
208 while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
209 ALTERA_UART_STATUS_RRDY_MSK) {
210 ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
211 flag = TTY_NORMAL;
212 port->icount.rx++;
213
214 if (status & ALTERA_UART_STATUS_E_MSK) {
215 altera_uart_writel(port, status,
216 ALTERA_UART_STATUS_REG);
217
218 if (status & ALTERA_UART_STATUS_BRK_MSK) {
219 port->icount.brk++;
220 if (uart_handle_break(port))
221 continue;
222 } else if (status & ALTERA_UART_STATUS_PE_MSK) {
223 port->icount.parity++;
224 } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
225 port->icount.overrun++;
226 } else if (status & ALTERA_UART_STATUS_FE_MSK) {
227 port->icount.frame++;
228 }
229
230 status &= port->read_status_mask;
231
232 if (status & ALTERA_UART_STATUS_BRK_MSK)
233 flag = TTY_BREAK;
234 else if (status & ALTERA_UART_STATUS_PE_MSK)
235 flag = TTY_PARITY;
236 else if (status & ALTERA_UART_STATUS_FE_MSK)
237 flag = TTY_FRAME;
238 }
239
240 if (uart_handle_sysrq_char(port, ch))
241 continue;
242 uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
243 flag);
244 }
245
246 tty_flip_buffer_push(&port->state->port);
247 }
248
altera_uart_tx_chars(struct altera_uart * pp)249 static void altera_uart_tx_chars(struct altera_uart *pp)
250 {
251 struct uart_port *port = &pp->port;
252 struct circ_buf *xmit = &port->state->xmit;
253
254 if (port->x_char) {
255 /* Send special char - probably flow control */
256 altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
257 port->x_char = 0;
258 port->icount.tx++;
259 return;
260 }
261
262 while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
263 ALTERA_UART_STATUS_TRDY_MSK) {
264 if (xmit->head == xmit->tail)
265 break;
266 altera_uart_writel(port, xmit->buf[xmit->tail],
267 ALTERA_UART_TXDATA_REG);
268 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
269 port->icount.tx++;
270 }
271
272 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
273 uart_write_wakeup(port);
274
275 if (xmit->head == xmit->tail) {
276 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
277 altera_uart_update_ctrl_reg(pp);
278 }
279 }
280
altera_uart_interrupt(int irq,void * data)281 static irqreturn_t altera_uart_interrupt(int irq, void *data)
282 {
283 struct uart_port *port = data;
284 struct altera_uart *pp = container_of(port, struct altera_uart, port);
285 unsigned int isr;
286
287 isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
288
289 spin_lock(&port->lock);
290 if (isr & ALTERA_UART_STATUS_RRDY_MSK)
291 altera_uart_rx_chars(pp);
292 if (isr & ALTERA_UART_STATUS_TRDY_MSK)
293 altera_uart_tx_chars(pp);
294 spin_unlock(&port->lock);
295
296 return IRQ_RETVAL(isr);
297 }
298
altera_uart_timer(struct timer_list * t)299 static void altera_uart_timer(struct timer_list *t)
300 {
301 struct altera_uart *pp = from_timer(pp, t, tmr);
302 struct uart_port *port = &pp->port;
303
304 altera_uart_interrupt(0, port);
305 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
306 }
307
altera_uart_config_port(struct uart_port * port,int flags)308 static void altera_uart_config_port(struct uart_port *port, int flags)
309 {
310 port->type = PORT_ALTERA_UART;
311
312 /* Clear mask, so no surprise interrupts. */
313 altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
314 /* Clear status register */
315 altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
316 }
317
altera_uart_startup(struct uart_port * port)318 static int altera_uart_startup(struct uart_port *port)
319 {
320 struct altera_uart *pp = container_of(port, struct altera_uart, port);
321 unsigned long flags;
322
323 if (!port->irq) {
324 timer_setup(&pp->tmr, altera_uart_timer, 0);
325 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
326 } else {
327 int ret;
328
329 ret = request_irq(port->irq, altera_uart_interrupt, 0,
330 DRV_NAME, port);
331 if (ret) {
332 pr_err(DRV_NAME ": unable to attach Altera UART %d "
333 "interrupt vector=%d\n", port->line, port->irq);
334 return ret;
335 }
336 }
337
338 spin_lock_irqsave(&port->lock, flags);
339
340 /* Enable RX interrupts now */
341 pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
342 altera_uart_update_ctrl_reg(pp);
343
344 spin_unlock_irqrestore(&port->lock, flags);
345
346 return 0;
347 }
348
altera_uart_shutdown(struct uart_port * port)349 static void altera_uart_shutdown(struct uart_port *port)
350 {
351 struct altera_uart *pp = container_of(port, struct altera_uart, port);
352 unsigned long flags;
353
354 spin_lock_irqsave(&port->lock, flags);
355
356 /* Disable all interrupts now */
357 pp->imr = 0;
358 altera_uart_update_ctrl_reg(pp);
359
360 spin_unlock_irqrestore(&port->lock, flags);
361
362 if (port->irq)
363 free_irq(port->irq, port);
364 else
365 del_timer_sync(&pp->tmr);
366 }
367
altera_uart_type(struct uart_port * port)368 static const char *altera_uart_type(struct uart_port *port)
369 {
370 return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
371 }
372
altera_uart_request_port(struct uart_port * port)373 static int altera_uart_request_port(struct uart_port *port)
374 {
375 /* UARTs always present */
376 return 0;
377 }
378
altera_uart_release_port(struct uart_port * port)379 static void altera_uart_release_port(struct uart_port *port)
380 {
381 /* Nothing to release... */
382 }
383
altera_uart_verify_port(struct uart_port * port,struct serial_struct * ser)384 static int altera_uart_verify_port(struct uart_port *port,
385 struct serial_struct *ser)
386 {
387 if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
388 return -EINVAL;
389 return 0;
390 }
391
392 #ifdef CONFIG_CONSOLE_POLL
altera_uart_poll_get_char(struct uart_port * port)393 static int altera_uart_poll_get_char(struct uart_port *port)
394 {
395 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
396 ALTERA_UART_STATUS_RRDY_MSK))
397 cpu_relax();
398
399 return altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
400 }
401
altera_uart_poll_put_char(struct uart_port * port,unsigned char c)402 static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c)
403 {
404 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
405 ALTERA_UART_STATUS_TRDY_MSK))
406 cpu_relax();
407
408 altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
409 }
410 #endif
411
412 /*
413 * Define the basic serial functions we support.
414 */
415 static const struct uart_ops altera_uart_ops = {
416 .tx_empty = altera_uart_tx_empty,
417 .get_mctrl = altera_uart_get_mctrl,
418 .set_mctrl = altera_uart_set_mctrl,
419 .start_tx = altera_uart_start_tx,
420 .stop_tx = altera_uart_stop_tx,
421 .stop_rx = altera_uart_stop_rx,
422 .break_ctl = altera_uart_break_ctl,
423 .startup = altera_uart_startup,
424 .shutdown = altera_uart_shutdown,
425 .set_termios = altera_uart_set_termios,
426 .type = altera_uart_type,
427 .request_port = altera_uart_request_port,
428 .release_port = altera_uart_release_port,
429 .config_port = altera_uart_config_port,
430 .verify_port = altera_uart_verify_port,
431 #ifdef CONFIG_CONSOLE_POLL
432 .poll_get_char = altera_uart_poll_get_char,
433 .poll_put_char = altera_uart_poll_put_char,
434 #endif
435 };
436
437 static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
438
439 #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
440
altera_uart_console_putc(struct uart_port * port,int c)441 static void altera_uart_console_putc(struct uart_port *port, int c)
442 {
443 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
444 ALTERA_UART_STATUS_TRDY_MSK))
445 cpu_relax();
446
447 altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
448 }
449
altera_uart_console_write(struct console * co,const char * s,unsigned int count)450 static void altera_uart_console_write(struct console *co, const char *s,
451 unsigned int count)
452 {
453 struct uart_port *port = &(altera_uart_ports + co->index)->port;
454
455 uart_console_write(port, s, count, altera_uart_console_putc);
456 }
457
altera_uart_console_setup(struct console * co,char * options)458 static int __init altera_uart_console_setup(struct console *co, char *options)
459 {
460 struct uart_port *port;
461 int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
462 int bits = 8;
463 int parity = 'n';
464 int flow = 'n';
465
466 if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
467 return -EINVAL;
468 port = &altera_uart_ports[co->index].port;
469 if (!port->membase)
470 return -ENODEV;
471
472 if (options)
473 uart_parse_options(options, &baud, &parity, &bits, &flow);
474
475 return uart_set_options(port, co, baud, parity, bits, flow);
476 }
477
478 static struct uart_driver altera_uart_driver;
479
480 static struct console altera_uart_console = {
481 .name = "ttyAL",
482 .write = altera_uart_console_write,
483 .device = uart_console_device,
484 .setup = altera_uart_console_setup,
485 .flags = CON_PRINTBUFFER,
486 .index = -1,
487 .data = &altera_uart_driver,
488 };
489
altera_uart_console_init(void)490 static int __init altera_uart_console_init(void)
491 {
492 register_console(&altera_uart_console);
493 return 0;
494 }
495
496 console_initcall(altera_uart_console_init);
497
498 #define ALTERA_UART_CONSOLE (&altera_uart_console)
499
altera_uart_earlycon_write(struct console * co,const char * s,unsigned int count)500 static void altera_uart_earlycon_write(struct console *co, const char *s,
501 unsigned int count)
502 {
503 struct earlycon_device *dev = co->data;
504
505 uart_console_write(&dev->port, s, count, altera_uart_console_putc);
506 }
507
altera_uart_earlycon_setup(struct earlycon_device * dev,const char * options)508 static int __init altera_uart_earlycon_setup(struct earlycon_device *dev,
509 const char *options)
510 {
511 struct uart_port *port = &dev->port;
512
513 if (!port->membase)
514 return -ENODEV;
515
516 /* Enable RX interrupts now */
517 altera_uart_writel(port, ALTERA_UART_CONTROL_RRDY_MSK,
518 ALTERA_UART_CONTROL_REG);
519
520 if (dev->baud) {
521 unsigned int baudclk = port->uartclk / dev->baud;
522
523 altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
524 }
525
526 dev->con->write = altera_uart_earlycon_write;
527 return 0;
528 }
529
530 OF_EARLYCON_DECLARE(uart, "altr,uart-1.0", altera_uart_earlycon_setup);
531
532 #else
533
534 #define ALTERA_UART_CONSOLE NULL
535
536 #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */
537
538 /*
539 * Define the altera_uart UART driver structure.
540 */
541 static struct uart_driver altera_uart_driver = {
542 .owner = THIS_MODULE,
543 .driver_name = DRV_NAME,
544 .dev_name = "ttyAL",
545 .major = SERIAL_ALTERA_MAJOR,
546 .minor = SERIAL_ALTERA_MINOR,
547 .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
548 .cons = ALTERA_UART_CONSOLE,
549 };
550
altera_uart_probe(struct platform_device * pdev)551 static int altera_uart_probe(struct platform_device *pdev)
552 {
553 struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev);
554 struct uart_port *port;
555 struct resource *res_mem;
556 struct resource *res_irq;
557 int i = pdev->id;
558 int ret;
559
560 /* if id is -1 scan for a free id and use that one */
561 if (i == -1) {
562 for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++)
563 if (altera_uart_ports[i].port.mapbase == 0)
564 break;
565 }
566
567 if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
568 return -EINVAL;
569
570 port = &altera_uart_ports[i].port;
571
572 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
573 if (res_mem)
574 port->mapbase = res_mem->start;
575 else if (platp)
576 port->mapbase = platp->mapbase;
577 else
578 return -EINVAL;
579
580 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
581 if (res_irq)
582 port->irq = res_irq->start;
583 else if (platp)
584 port->irq = platp->irq;
585
586 /* Check platform data first so we can override device node data */
587 if (platp)
588 port->uartclk = platp->uartclk;
589 else {
590 ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
591 &port->uartclk);
592 if (ret)
593 return ret;
594 }
595
596 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
597 if (!port->membase)
598 return -ENOMEM;
599
600 if (platp)
601 port->regshift = platp->bus_shift;
602 else
603 port->regshift = 0;
604
605 port->line = i;
606 port->type = PORT_ALTERA_UART;
607 port->iotype = SERIAL_IO_MEM;
608 port->ops = &altera_uart_ops;
609 port->flags = UPF_BOOT_AUTOCONF;
610 port->dev = &pdev->dev;
611
612 platform_set_drvdata(pdev, port);
613
614 uart_add_one_port(&altera_uart_driver, port);
615
616 return 0;
617 }
618
altera_uart_remove(struct platform_device * pdev)619 static int altera_uart_remove(struct platform_device *pdev)
620 {
621 struct uart_port *port = platform_get_drvdata(pdev);
622
623 if (port) {
624 uart_remove_one_port(&altera_uart_driver, port);
625 port->mapbase = 0;
626 iounmap(port->membase);
627 }
628
629 return 0;
630 }
631
632 #ifdef CONFIG_OF
633 static const struct of_device_id altera_uart_match[] = {
634 { .compatible = "ALTR,uart-1.0", },
635 { .compatible = "altr,uart-1.0", },
636 {},
637 };
638 MODULE_DEVICE_TABLE(of, altera_uart_match);
639 #endif /* CONFIG_OF */
640
641 static struct platform_driver altera_uart_platform_driver = {
642 .probe = altera_uart_probe,
643 .remove = altera_uart_remove,
644 .driver = {
645 .name = DRV_NAME,
646 .of_match_table = of_match_ptr(altera_uart_match),
647 },
648 };
649
altera_uart_init(void)650 static int __init altera_uart_init(void)
651 {
652 int rc;
653
654 rc = uart_register_driver(&altera_uart_driver);
655 if (rc)
656 return rc;
657 rc = platform_driver_register(&altera_uart_platform_driver);
658 if (rc)
659 uart_unregister_driver(&altera_uart_driver);
660 return rc;
661 }
662
altera_uart_exit(void)663 static void __exit altera_uart_exit(void)
664 {
665 platform_driver_unregister(&altera_uart_platform_driver);
666 uart_unregister_driver(&altera_uart_driver);
667 }
668
669 module_init(altera_uart_init);
670 module_exit(altera_uart_exit);
671
672 MODULE_DESCRIPTION("Altera UART driver");
673 MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
674 MODULE_LICENSE("GPL");
675 MODULE_ALIAS("platform:" DRV_NAME);
676 MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);
677
