1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * BQ27xxx battery driver
4 *
5 * Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it>
6 * Copyright (C) 2008 Eurotech S.p.A. <info@eurotech.it>
7 * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de>
8 * Copyright (C) 2011 Pali Rohár <pali@kernel.org>
9 * Copyright (C) 2017 Liam Breck <kernel@networkimprov.net>
10 *
11 * Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc.
12 *
13 * Datasheets:
14 * https://www.ti.com/product/bq27000
15 * https://www.ti.com/product/bq27200
16 * https://www.ti.com/product/bq27010
17 * https://www.ti.com/product/bq27210
18 * https://www.ti.com/product/bq27500
19 * https://www.ti.com/product/bq27510-g1
20 * https://www.ti.com/product/bq27510-g2
21 * https://www.ti.com/product/bq27510-g3
22 * https://www.ti.com/product/bq27520-g1
23 * https://www.ti.com/product/bq27520-g2
24 * https://www.ti.com/product/bq27520-g3
25 * https://www.ti.com/product/bq27520-g4
26 * https://www.ti.com/product/bq27530-g1
27 * https://www.ti.com/product/bq27531-g1
28 * https://www.ti.com/product/bq27541-g1
29 * https://www.ti.com/product/bq27542-g1
30 * https://www.ti.com/product/bq27546-g1
31 * https://www.ti.com/product/bq27742-g1
32 * https://www.ti.com/product/bq27545-g1
33 * https://www.ti.com/product/bq27421-g1
34 * https://www.ti.com/product/bq27425-g1
35 * https://www.ti.com/product/bq27426
36 * https://www.ti.com/product/bq27411-g1
37 * https://www.ti.com/product/bq27441-g1
38 * https://www.ti.com/product/bq27621-g1
39 * https://www.ti.com/product/bq27z561
40 * https://www.ti.com/product/bq28z610
41 * https://www.ti.com/product/bq34z100-g1
42 */
43
44 #include <linux/device.h>
45 #include <linux/module.h>
46 #include <linux/mutex.h>
47 #include <linux/param.h>
48 #include <linux/jiffies.h>
49 #include <linux/workqueue.h>
50 #include <linux/delay.h>
51 #include <linux/platform_device.h>
52 #include <linux/power_supply.h>
53 #include <linux/slab.h>
54 #include <linux/of.h>
55
56 #include <linux/power/bq27xxx_battery.h>
57
58 #define BQ27XXX_MANUFACTURER "Texas Instruments"
59
60 /* BQ27XXX Flags */
61 #define BQ27XXX_FLAG_DSC BIT(0)
62 #define BQ27XXX_FLAG_SOCF BIT(1) /* State-of-Charge threshold final */
63 #define BQ27XXX_FLAG_SOC1 BIT(2) /* State-of-Charge threshold 1 */
64 #define BQ27XXX_FLAG_CFGUP BIT(4)
65 #define BQ27XXX_FLAG_FC BIT(9)
66 #define BQ27XXX_FLAG_OTD BIT(14)
67 #define BQ27XXX_FLAG_OTC BIT(15)
68 #define BQ27XXX_FLAG_UT BIT(14)
69 #define BQ27XXX_FLAG_OT BIT(15)
70
71 /* BQ27000 has different layout for Flags register */
72 #define BQ27000_FLAG_EDVF BIT(0) /* Final End-of-Discharge-Voltage flag */
73 #define BQ27000_FLAG_EDV1 BIT(1) /* First End-of-Discharge-Voltage flag */
74 #define BQ27000_FLAG_CI BIT(4) /* Capacity Inaccurate flag */
75 #define BQ27000_FLAG_FC BIT(5)
76 #define BQ27000_FLAG_CHGS BIT(7) /* Charge state flag */
77
78 /* BQ27Z561 has different layout for Flags register */
79 #define BQ27Z561_FLAG_FDC BIT(4) /* Battery fully discharged */
80 #define BQ27Z561_FLAG_FC BIT(5) /* Battery fully charged */
81 #define BQ27Z561_FLAG_DIS_CH BIT(6) /* Battery is discharging */
82
83 /* control register params */
84 #define BQ27XXX_SEALED 0x20
85 #define BQ27XXX_SET_CFGUPDATE 0x13
86 #define BQ27XXX_SOFT_RESET 0x42
87 #define BQ27XXX_RESET 0x41
88
89 #define BQ27XXX_RS (20) /* Resistor sense mOhm */
90 #define BQ27XXX_POWER_CONSTANT (29200) /* 29.2 µV^2 * 1000 */
91 #define BQ27XXX_CURRENT_CONSTANT (3570) /* 3.57 µV * 1000 */
92
93 #define INVALID_REG_ADDR 0xff
94
95 /*
96 * bq27xxx_reg_index - Register names
97 *
98 * These are indexes into a device's register mapping array.
99 */
100
101 enum bq27xxx_reg_index {
102 BQ27XXX_REG_CTRL = 0, /* Control */
103 BQ27XXX_REG_TEMP, /* Temperature */
104 BQ27XXX_REG_INT_TEMP, /* Internal Temperature */
105 BQ27XXX_REG_VOLT, /* Voltage */
106 BQ27XXX_REG_AI, /* Average Current */
107 BQ27XXX_REG_FLAGS, /* Flags */
108 BQ27XXX_REG_TTE, /* Time-to-Empty */
109 BQ27XXX_REG_TTF, /* Time-to-Full */
110 BQ27XXX_REG_TTES, /* Time-to-Empty Standby */
111 BQ27XXX_REG_TTECP, /* Time-to-Empty at Constant Power */
112 BQ27XXX_REG_NAC, /* Nominal Available Capacity */
113 BQ27XXX_REG_FCC, /* Full Charge Capacity */
114 BQ27XXX_REG_CYCT, /* Cycle Count */
115 BQ27XXX_REG_AE, /* Available Energy */
116 BQ27XXX_REG_SOC, /* State-of-Charge */
117 BQ27XXX_REG_DCAP, /* Design Capacity */
118 BQ27XXX_REG_AP, /* Average Power */
119 BQ27XXX_DM_CTRL, /* Block Data Control */
120 BQ27XXX_DM_CLASS, /* Data Class */
121 BQ27XXX_DM_BLOCK, /* Data Block */
122 BQ27XXX_DM_DATA, /* Block Data */
123 BQ27XXX_DM_CKSUM, /* Block Data Checksum */
124 BQ27XXX_REG_MAX, /* sentinel */
125 };
126
127 #define BQ27XXX_DM_REG_ROWS \
128 [BQ27XXX_DM_CTRL] = 0x61, \
129 [BQ27XXX_DM_CLASS] = 0x3e, \
130 [BQ27XXX_DM_BLOCK] = 0x3f, \
131 [BQ27XXX_DM_DATA] = 0x40, \
132 [BQ27XXX_DM_CKSUM] = 0x60
133
134 /* Register mappings */
135 static u8
136 bq27000_regs[BQ27XXX_REG_MAX] = {
137 [BQ27XXX_REG_CTRL] = 0x00,
138 [BQ27XXX_REG_TEMP] = 0x06,
139 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
140 [BQ27XXX_REG_VOLT] = 0x08,
141 [BQ27XXX_REG_AI] = 0x14,
142 [BQ27XXX_REG_FLAGS] = 0x0a,
143 [BQ27XXX_REG_TTE] = 0x16,
144 [BQ27XXX_REG_TTF] = 0x18,
145 [BQ27XXX_REG_TTES] = 0x1c,
146 [BQ27XXX_REG_TTECP] = 0x26,
147 [BQ27XXX_REG_NAC] = 0x0c,
148 [BQ27XXX_REG_FCC] = 0x12,
149 [BQ27XXX_REG_CYCT] = 0x2a,
150 [BQ27XXX_REG_AE] = 0x22,
151 [BQ27XXX_REG_SOC] = 0x0b,
152 [BQ27XXX_REG_DCAP] = 0x76,
153 [BQ27XXX_REG_AP] = 0x24,
154 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
155 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
156 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
157 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
158 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
159 },
160 bq27010_regs[BQ27XXX_REG_MAX] = {
161 [BQ27XXX_REG_CTRL] = 0x00,
162 [BQ27XXX_REG_TEMP] = 0x06,
163 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
164 [BQ27XXX_REG_VOLT] = 0x08,
165 [BQ27XXX_REG_AI] = 0x14,
166 [BQ27XXX_REG_FLAGS] = 0x0a,
167 [BQ27XXX_REG_TTE] = 0x16,
168 [BQ27XXX_REG_TTF] = 0x18,
169 [BQ27XXX_REG_TTES] = 0x1c,
170 [BQ27XXX_REG_TTECP] = 0x26,
171 [BQ27XXX_REG_NAC] = 0x0c,
172 [BQ27XXX_REG_FCC] = 0x12,
173 [BQ27XXX_REG_CYCT] = 0x2a,
174 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
175 [BQ27XXX_REG_SOC] = 0x0b,
176 [BQ27XXX_REG_DCAP] = 0x76,
177 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
178 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
179 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
180 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
181 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
182 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
183 },
184 bq2750x_regs[BQ27XXX_REG_MAX] = {
185 [BQ27XXX_REG_CTRL] = 0x00,
186 [BQ27XXX_REG_TEMP] = 0x06,
187 [BQ27XXX_REG_INT_TEMP] = 0x28,
188 [BQ27XXX_REG_VOLT] = 0x08,
189 [BQ27XXX_REG_AI] = 0x14,
190 [BQ27XXX_REG_FLAGS] = 0x0a,
191 [BQ27XXX_REG_TTE] = 0x16,
192 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
193 [BQ27XXX_REG_TTES] = 0x1a,
194 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
195 [BQ27XXX_REG_NAC] = 0x0c,
196 [BQ27XXX_REG_FCC] = 0x12,
197 [BQ27XXX_REG_CYCT] = 0x2a,
198 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
199 [BQ27XXX_REG_SOC] = 0x2c,
200 [BQ27XXX_REG_DCAP] = 0x3c,
201 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
202 BQ27XXX_DM_REG_ROWS,
203 },
204 #define bq2751x_regs bq27510g3_regs
205 #define bq2752x_regs bq27510g3_regs
206 bq27500_regs[BQ27XXX_REG_MAX] = {
207 [BQ27XXX_REG_CTRL] = 0x00,
208 [BQ27XXX_REG_TEMP] = 0x06,
209 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
210 [BQ27XXX_REG_VOLT] = 0x08,
211 [BQ27XXX_REG_AI] = 0x14,
212 [BQ27XXX_REG_FLAGS] = 0x0a,
213 [BQ27XXX_REG_TTE] = 0x16,
214 [BQ27XXX_REG_TTF] = 0x18,
215 [BQ27XXX_REG_TTES] = 0x1c,
216 [BQ27XXX_REG_TTECP] = 0x26,
217 [BQ27XXX_REG_NAC] = 0x0c,
218 [BQ27XXX_REG_FCC] = 0x12,
219 [BQ27XXX_REG_CYCT] = 0x2a,
220 [BQ27XXX_REG_AE] = 0x22,
221 [BQ27XXX_REG_SOC] = 0x2c,
222 [BQ27XXX_REG_DCAP] = 0x3c,
223 [BQ27XXX_REG_AP] = 0x24,
224 BQ27XXX_DM_REG_ROWS,
225 },
226 #define bq27510g1_regs bq27500_regs
227 #define bq27510g2_regs bq27500_regs
228 bq27510g3_regs[BQ27XXX_REG_MAX] = {
229 [BQ27XXX_REG_CTRL] = 0x00,
230 [BQ27XXX_REG_TEMP] = 0x06,
231 [BQ27XXX_REG_INT_TEMP] = 0x28,
232 [BQ27XXX_REG_VOLT] = 0x08,
233 [BQ27XXX_REG_AI] = 0x14,
234 [BQ27XXX_REG_FLAGS] = 0x0a,
235 [BQ27XXX_REG_TTE] = 0x16,
236 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
237 [BQ27XXX_REG_TTES] = 0x1a,
238 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
239 [BQ27XXX_REG_NAC] = 0x0c,
240 [BQ27XXX_REG_FCC] = 0x12,
241 [BQ27XXX_REG_CYCT] = 0x1e,
242 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
243 [BQ27XXX_REG_SOC] = 0x20,
244 [BQ27XXX_REG_DCAP] = 0x2e,
245 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
246 BQ27XXX_DM_REG_ROWS,
247 },
248 bq27520g1_regs[BQ27XXX_REG_MAX] = {
249 [BQ27XXX_REG_CTRL] = 0x00,
250 [BQ27XXX_REG_TEMP] = 0x06,
251 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
252 [BQ27XXX_REG_VOLT] = 0x08,
253 [BQ27XXX_REG_AI] = 0x14,
254 [BQ27XXX_REG_FLAGS] = 0x0a,
255 [BQ27XXX_REG_TTE] = 0x16,
256 [BQ27XXX_REG_TTF] = 0x18,
257 [BQ27XXX_REG_TTES] = 0x1c,
258 [BQ27XXX_REG_TTECP] = 0x26,
259 [BQ27XXX_REG_NAC] = 0x0c,
260 [BQ27XXX_REG_FCC] = 0x12,
261 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
262 [BQ27XXX_REG_AE] = 0x22,
263 [BQ27XXX_REG_SOC] = 0x2c,
264 [BQ27XXX_REG_DCAP] = 0x3c,
265 [BQ27XXX_REG_AP] = 0x24,
266 BQ27XXX_DM_REG_ROWS,
267 },
268 bq27520g2_regs[BQ27XXX_REG_MAX] = {
269 [BQ27XXX_REG_CTRL] = 0x00,
270 [BQ27XXX_REG_TEMP] = 0x06,
271 [BQ27XXX_REG_INT_TEMP] = 0x36,
272 [BQ27XXX_REG_VOLT] = 0x08,
273 [BQ27XXX_REG_AI] = 0x14,
274 [BQ27XXX_REG_FLAGS] = 0x0a,
275 [BQ27XXX_REG_TTE] = 0x16,
276 [BQ27XXX_REG_TTF] = 0x18,
277 [BQ27XXX_REG_TTES] = 0x1c,
278 [BQ27XXX_REG_TTECP] = 0x26,
279 [BQ27XXX_REG_NAC] = 0x0c,
280 [BQ27XXX_REG_FCC] = 0x12,
281 [BQ27XXX_REG_CYCT] = 0x2a,
282 [BQ27XXX_REG_AE] = 0x22,
283 [BQ27XXX_REG_SOC] = 0x2c,
284 [BQ27XXX_REG_DCAP] = 0x3c,
285 [BQ27XXX_REG_AP] = 0x24,
286 BQ27XXX_DM_REG_ROWS,
287 },
288 bq27520g3_regs[BQ27XXX_REG_MAX] = {
289 [BQ27XXX_REG_CTRL] = 0x00,
290 [BQ27XXX_REG_TEMP] = 0x06,
291 [BQ27XXX_REG_INT_TEMP] = 0x36,
292 [BQ27XXX_REG_VOLT] = 0x08,
293 [BQ27XXX_REG_AI] = 0x14,
294 [BQ27XXX_REG_FLAGS] = 0x0a,
295 [BQ27XXX_REG_TTE] = 0x16,
296 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
297 [BQ27XXX_REG_TTES] = 0x1c,
298 [BQ27XXX_REG_TTECP] = 0x26,
299 [BQ27XXX_REG_NAC] = 0x0c,
300 [BQ27XXX_REG_FCC] = 0x12,
301 [BQ27XXX_REG_CYCT] = 0x2a,
302 [BQ27XXX_REG_AE] = 0x22,
303 [BQ27XXX_REG_SOC] = 0x2c,
304 [BQ27XXX_REG_DCAP] = 0x3c,
305 [BQ27XXX_REG_AP] = 0x24,
306 BQ27XXX_DM_REG_ROWS,
307 },
308 bq27520g4_regs[BQ27XXX_REG_MAX] = {
309 [BQ27XXX_REG_CTRL] = 0x00,
310 [BQ27XXX_REG_TEMP] = 0x06,
311 [BQ27XXX_REG_INT_TEMP] = 0x28,
312 [BQ27XXX_REG_VOLT] = 0x08,
313 [BQ27XXX_REG_AI] = 0x14,
314 [BQ27XXX_REG_FLAGS] = 0x0a,
315 [BQ27XXX_REG_TTE] = 0x16,
316 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
317 [BQ27XXX_REG_TTES] = 0x1c,
318 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
319 [BQ27XXX_REG_NAC] = 0x0c,
320 [BQ27XXX_REG_FCC] = 0x12,
321 [BQ27XXX_REG_CYCT] = 0x1e,
322 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
323 [BQ27XXX_REG_SOC] = 0x20,
324 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
325 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
326 BQ27XXX_DM_REG_ROWS,
327 },
328 bq27521_regs[BQ27XXX_REG_MAX] = {
329 [BQ27XXX_REG_CTRL] = 0x02,
330 [BQ27XXX_REG_TEMP] = 0x0a,
331 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
332 [BQ27XXX_REG_VOLT] = 0x0c,
333 [BQ27XXX_REG_AI] = 0x0e,
334 [BQ27XXX_REG_FLAGS] = 0x08,
335 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
336 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
337 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
338 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
339 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
340 [BQ27XXX_REG_FCC] = INVALID_REG_ADDR,
341 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
342 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
343 [BQ27XXX_REG_SOC] = INVALID_REG_ADDR,
344 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
345 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
346 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
347 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
348 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
349 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
350 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
351 },
352 bq27530_regs[BQ27XXX_REG_MAX] = {
353 [BQ27XXX_REG_CTRL] = 0x00,
354 [BQ27XXX_REG_TEMP] = 0x06,
355 [BQ27XXX_REG_INT_TEMP] = 0x32,
356 [BQ27XXX_REG_VOLT] = 0x08,
357 [BQ27XXX_REG_AI] = 0x14,
358 [BQ27XXX_REG_FLAGS] = 0x0a,
359 [BQ27XXX_REG_TTE] = 0x16,
360 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
361 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
362 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
363 [BQ27XXX_REG_NAC] = 0x0c,
364 [BQ27XXX_REG_FCC] = 0x12,
365 [BQ27XXX_REG_CYCT] = 0x2a,
366 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
367 [BQ27XXX_REG_SOC] = 0x2c,
368 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
369 [BQ27XXX_REG_AP] = 0x24,
370 BQ27XXX_DM_REG_ROWS,
371 },
372 #define bq27531_regs bq27530_regs
373 bq27541_regs[BQ27XXX_REG_MAX] = {
374 [BQ27XXX_REG_CTRL] = 0x00,
375 [BQ27XXX_REG_TEMP] = 0x06,
376 [BQ27XXX_REG_INT_TEMP] = 0x28,
377 [BQ27XXX_REG_VOLT] = 0x08,
378 [BQ27XXX_REG_AI] = 0x14,
379 [BQ27XXX_REG_FLAGS] = 0x0a,
380 [BQ27XXX_REG_TTE] = 0x16,
381 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
382 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
383 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
384 [BQ27XXX_REG_NAC] = 0x0c,
385 [BQ27XXX_REG_FCC] = 0x12,
386 [BQ27XXX_REG_CYCT] = 0x2a,
387 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
388 [BQ27XXX_REG_SOC] = 0x2c,
389 [BQ27XXX_REG_DCAP] = 0x3c,
390 [BQ27XXX_REG_AP] = 0x24,
391 BQ27XXX_DM_REG_ROWS,
392 },
393 #define bq27542_regs bq27541_regs
394 #define bq27546_regs bq27541_regs
395 #define bq27742_regs bq27541_regs
396 bq27545_regs[BQ27XXX_REG_MAX] = {
397 [BQ27XXX_REG_CTRL] = 0x00,
398 [BQ27XXX_REG_TEMP] = 0x06,
399 [BQ27XXX_REG_INT_TEMP] = 0x28,
400 [BQ27XXX_REG_VOLT] = 0x08,
401 [BQ27XXX_REG_AI] = 0x14,
402 [BQ27XXX_REG_FLAGS] = 0x0a,
403 [BQ27XXX_REG_TTE] = 0x16,
404 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
405 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
406 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
407 [BQ27XXX_REG_NAC] = 0x0c,
408 [BQ27XXX_REG_FCC] = 0x12,
409 [BQ27XXX_REG_CYCT] = 0x2a,
410 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
411 [BQ27XXX_REG_SOC] = 0x2c,
412 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
413 [BQ27XXX_REG_AP] = 0x24,
414 BQ27XXX_DM_REG_ROWS,
415 },
416 bq27421_regs[BQ27XXX_REG_MAX] = {
417 [BQ27XXX_REG_CTRL] = 0x00,
418 [BQ27XXX_REG_TEMP] = 0x02,
419 [BQ27XXX_REG_INT_TEMP] = 0x1e,
420 [BQ27XXX_REG_VOLT] = 0x04,
421 [BQ27XXX_REG_AI] = 0x10,
422 [BQ27XXX_REG_FLAGS] = 0x06,
423 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
424 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
425 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
426 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
427 [BQ27XXX_REG_NAC] = 0x08,
428 [BQ27XXX_REG_FCC] = 0x0e,
429 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
430 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
431 [BQ27XXX_REG_SOC] = 0x1c,
432 [BQ27XXX_REG_DCAP] = 0x3c,
433 [BQ27XXX_REG_AP] = 0x18,
434 BQ27XXX_DM_REG_ROWS,
435 },
436 #define bq27411_regs bq27421_regs
437 #define bq27425_regs bq27421_regs
438 #define bq27426_regs bq27421_regs
439 #define bq27441_regs bq27421_regs
440 #define bq27621_regs bq27421_regs
441 bq27z561_regs[BQ27XXX_REG_MAX] = {
442 [BQ27XXX_REG_CTRL] = 0x00,
443 [BQ27XXX_REG_TEMP] = 0x06,
444 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
445 [BQ27XXX_REG_VOLT] = 0x08,
446 [BQ27XXX_REG_AI] = 0x14,
447 [BQ27XXX_REG_FLAGS] = 0x0a,
448 [BQ27XXX_REG_TTE] = 0x16,
449 [BQ27XXX_REG_TTF] = 0x18,
450 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
451 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
452 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
453 [BQ27XXX_REG_FCC] = 0x12,
454 [BQ27XXX_REG_CYCT] = 0x2a,
455 [BQ27XXX_REG_AE] = 0x22,
456 [BQ27XXX_REG_SOC] = 0x2c,
457 [BQ27XXX_REG_DCAP] = 0x3c,
458 [BQ27XXX_REG_AP] = 0x22,
459 BQ27XXX_DM_REG_ROWS,
460 },
461 bq28z610_regs[BQ27XXX_REG_MAX] = {
462 [BQ27XXX_REG_CTRL] = 0x00,
463 [BQ27XXX_REG_TEMP] = 0x06,
464 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
465 [BQ27XXX_REG_VOLT] = 0x08,
466 [BQ27XXX_REG_AI] = 0x14,
467 [BQ27XXX_REG_FLAGS] = 0x0a,
468 [BQ27XXX_REG_TTE] = 0x16,
469 [BQ27XXX_REG_TTF] = 0x18,
470 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
471 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
472 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
473 [BQ27XXX_REG_FCC] = 0x12,
474 [BQ27XXX_REG_CYCT] = 0x2a,
475 [BQ27XXX_REG_AE] = 0x22,
476 [BQ27XXX_REG_SOC] = 0x2c,
477 [BQ27XXX_REG_DCAP] = 0x3c,
478 [BQ27XXX_REG_AP] = 0x22,
479 BQ27XXX_DM_REG_ROWS,
480 },
481 bq34z100_regs[BQ27XXX_REG_MAX] = {
482 [BQ27XXX_REG_CTRL] = 0x00,
483 [BQ27XXX_REG_TEMP] = 0x0c,
484 [BQ27XXX_REG_INT_TEMP] = 0x2a,
485 [BQ27XXX_REG_VOLT] = 0x08,
486 [BQ27XXX_REG_AI] = 0x0a,
487 [BQ27XXX_REG_FLAGS] = 0x0e,
488 [BQ27XXX_REG_TTE] = 0x18,
489 [BQ27XXX_REG_TTF] = 0x1a,
490 [BQ27XXX_REG_TTES] = 0x1e,
491 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
492 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
493 [BQ27XXX_REG_FCC] = 0x06,
494 [BQ27XXX_REG_CYCT] = 0x2c,
495 [BQ27XXX_REG_AE] = 0x24,
496 [BQ27XXX_REG_SOC] = 0x02,
497 [BQ27XXX_REG_DCAP] = 0x3c,
498 [BQ27XXX_REG_AP] = 0x22,
499 BQ27XXX_DM_REG_ROWS,
500 };
501
502 static enum power_supply_property bq27000_props[] = {
503 POWER_SUPPLY_PROP_STATUS,
504 POWER_SUPPLY_PROP_PRESENT,
505 POWER_SUPPLY_PROP_VOLTAGE_NOW,
506 POWER_SUPPLY_PROP_CURRENT_NOW,
507 POWER_SUPPLY_PROP_CAPACITY,
508 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
509 POWER_SUPPLY_PROP_TEMP,
510 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
511 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
512 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
513 POWER_SUPPLY_PROP_TECHNOLOGY,
514 POWER_SUPPLY_PROP_CHARGE_FULL,
515 POWER_SUPPLY_PROP_CHARGE_NOW,
516 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
517 POWER_SUPPLY_PROP_CYCLE_COUNT,
518 POWER_SUPPLY_PROP_ENERGY_NOW,
519 POWER_SUPPLY_PROP_POWER_AVG,
520 POWER_SUPPLY_PROP_HEALTH,
521 POWER_SUPPLY_PROP_MANUFACTURER,
522 };
523
524 static enum power_supply_property bq27010_props[] = {
525 POWER_SUPPLY_PROP_STATUS,
526 POWER_SUPPLY_PROP_PRESENT,
527 POWER_SUPPLY_PROP_VOLTAGE_NOW,
528 POWER_SUPPLY_PROP_CURRENT_NOW,
529 POWER_SUPPLY_PROP_CAPACITY,
530 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
531 POWER_SUPPLY_PROP_TEMP,
532 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
533 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
534 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
535 POWER_SUPPLY_PROP_TECHNOLOGY,
536 POWER_SUPPLY_PROP_CHARGE_FULL,
537 POWER_SUPPLY_PROP_CHARGE_NOW,
538 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
539 POWER_SUPPLY_PROP_CYCLE_COUNT,
540 POWER_SUPPLY_PROP_HEALTH,
541 POWER_SUPPLY_PROP_MANUFACTURER,
542 };
543
544 #define bq2750x_props bq27510g3_props
545 #define bq2751x_props bq27510g3_props
546 #define bq2752x_props bq27510g3_props
547
548 static enum power_supply_property bq27500_props[] = {
549 POWER_SUPPLY_PROP_STATUS,
550 POWER_SUPPLY_PROP_PRESENT,
551 POWER_SUPPLY_PROP_VOLTAGE_NOW,
552 POWER_SUPPLY_PROP_CURRENT_NOW,
553 POWER_SUPPLY_PROP_CAPACITY,
554 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
555 POWER_SUPPLY_PROP_TEMP,
556 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
557 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
558 POWER_SUPPLY_PROP_TECHNOLOGY,
559 POWER_SUPPLY_PROP_CHARGE_FULL,
560 POWER_SUPPLY_PROP_CHARGE_NOW,
561 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
562 POWER_SUPPLY_PROP_CYCLE_COUNT,
563 POWER_SUPPLY_PROP_ENERGY_NOW,
564 POWER_SUPPLY_PROP_POWER_AVG,
565 POWER_SUPPLY_PROP_HEALTH,
566 POWER_SUPPLY_PROP_MANUFACTURER,
567 };
568 #define bq27510g1_props bq27500_props
569 #define bq27510g2_props bq27500_props
570
571 static enum power_supply_property bq27510g3_props[] = {
572 POWER_SUPPLY_PROP_STATUS,
573 POWER_SUPPLY_PROP_PRESENT,
574 POWER_SUPPLY_PROP_VOLTAGE_NOW,
575 POWER_SUPPLY_PROP_CURRENT_NOW,
576 POWER_SUPPLY_PROP_CAPACITY,
577 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
578 POWER_SUPPLY_PROP_TEMP,
579 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
580 POWER_SUPPLY_PROP_TECHNOLOGY,
581 POWER_SUPPLY_PROP_CHARGE_FULL,
582 POWER_SUPPLY_PROP_CHARGE_NOW,
583 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
584 POWER_SUPPLY_PROP_CYCLE_COUNT,
585 POWER_SUPPLY_PROP_HEALTH,
586 POWER_SUPPLY_PROP_MANUFACTURER,
587 };
588
589 static enum power_supply_property bq27520g1_props[] = {
590 POWER_SUPPLY_PROP_STATUS,
591 POWER_SUPPLY_PROP_PRESENT,
592 POWER_SUPPLY_PROP_VOLTAGE_NOW,
593 POWER_SUPPLY_PROP_CURRENT_NOW,
594 POWER_SUPPLY_PROP_CAPACITY,
595 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
596 POWER_SUPPLY_PROP_TEMP,
597 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
598 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
599 POWER_SUPPLY_PROP_TECHNOLOGY,
600 POWER_SUPPLY_PROP_CHARGE_FULL,
601 POWER_SUPPLY_PROP_CHARGE_NOW,
602 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
603 POWER_SUPPLY_PROP_ENERGY_NOW,
604 POWER_SUPPLY_PROP_POWER_AVG,
605 POWER_SUPPLY_PROP_HEALTH,
606 POWER_SUPPLY_PROP_MANUFACTURER,
607 };
608
609 #define bq27520g2_props bq27500_props
610
611 static enum power_supply_property bq27520g3_props[] = {
612 POWER_SUPPLY_PROP_STATUS,
613 POWER_SUPPLY_PROP_PRESENT,
614 POWER_SUPPLY_PROP_VOLTAGE_NOW,
615 POWER_SUPPLY_PROP_CURRENT_NOW,
616 POWER_SUPPLY_PROP_CAPACITY,
617 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
618 POWER_SUPPLY_PROP_TEMP,
619 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
620 POWER_SUPPLY_PROP_TECHNOLOGY,
621 POWER_SUPPLY_PROP_CHARGE_FULL,
622 POWER_SUPPLY_PROP_CHARGE_NOW,
623 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
624 POWER_SUPPLY_PROP_CYCLE_COUNT,
625 POWER_SUPPLY_PROP_ENERGY_NOW,
626 POWER_SUPPLY_PROP_POWER_AVG,
627 POWER_SUPPLY_PROP_HEALTH,
628 POWER_SUPPLY_PROP_MANUFACTURER,
629 };
630
631 static enum power_supply_property bq27520g4_props[] = {
632 POWER_SUPPLY_PROP_STATUS,
633 POWER_SUPPLY_PROP_PRESENT,
634 POWER_SUPPLY_PROP_VOLTAGE_NOW,
635 POWER_SUPPLY_PROP_CURRENT_NOW,
636 POWER_SUPPLY_PROP_CAPACITY,
637 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
638 POWER_SUPPLY_PROP_TEMP,
639 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
640 POWER_SUPPLY_PROP_TECHNOLOGY,
641 POWER_SUPPLY_PROP_CHARGE_FULL,
642 POWER_SUPPLY_PROP_CHARGE_NOW,
643 POWER_SUPPLY_PROP_CYCLE_COUNT,
644 POWER_SUPPLY_PROP_HEALTH,
645 POWER_SUPPLY_PROP_MANUFACTURER,
646 };
647
648 static enum power_supply_property bq27521_props[] = {
649 POWER_SUPPLY_PROP_STATUS,
650 POWER_SUPPLY_PROP_PRESENT,
651 POWER_SUPPLY_PROP_VOLTAGE_NOW,
652 POWER_SUPPLY_PROP_CURRENT_NOW,
653 POWER_SUPPLY_PROP_TEMP,
654 POWER_SUPPLY_PROP_TECHNOLOGY,
655 };
656
657 static enum power_supply_property bq27530_props[] = {
658 POWER_SUPPLY_PROP_STATUS,
659 POWER_SUPPLY_PROP_PRESENT,
660 POWER_SUPPLY_PROP_VOLTAGE_NOW,
661 POWER_SUPPLY_PROP_CURRENT_NOW,
662 POWER_SUPPLY_PROP_CAPACITY,
663 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
664 POWER_SUPPLY_PROP_TEMP,
665 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
666 POWER_SUPPLY_PROP_TECHNOLOGY,
667 POWER_SUPPLY_PROP_CHARGE_FULL,
668 POWER_SUPPLY_PROP_CHARGE_NOW,
669 POWER_SUPPLY_PROP_POWER_AVG,
670 POWER_SUPPLY_PROP_HEALTH,
671 POWER_SUPPLY_PROP_CYCLE_COUNT,
672 POWER_SUPPLY_PROP_MANUFACTURER,
673 };
674 #define bq27531_props bq27530_props
675
676 static enum power_supply_property bq27541_props[] = {
677 POWER_SUPPLY_PROP_STATUS,
678 POWER_SUPPLY_PROP_PRESENT,
679 POWER_SUPPLY_PROP_VOLTAGE_NOW,
680 POWER_SUPPLY_PROP_CURRENT_NOW,
681 POWER_SUPPLY_PROP_CAPACITY,
682 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
683 POWER_SUPPLY_PROP_TEMP,
684 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
685 POWER_SUPPLY_PROP_TECHNOLOGY,
686 POWER_SUPPLY_PROP_CHARGE_FULL,
687 POWER_SUPPLY_PROP_CHARGE_NOW,
688 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
689 POWER_SUPPLY_PROP_CYCLE_COUNT,
690 POWER_SUPPLY_PROP_POWER_AVG,
691 POWER_SUPPLY_PROP_HEALTH,
692 POWER_SUPPLY_PROP_MANUFACTURER,
693 };
694 #define bq27542_props bq27541_props
695 #define bq27546_props bq27541_props
696 #define bq27742_props bq27541_props
697
698 static enum power_supply_property bq27545_props[] = {
699 POWER_SUPPLY_PROP_STATUS,
700 POWER_SUPPLY_PROP_PRESENT,
701 POWER_SUPPLY_PROP_VOLTAGE_NOW,
702 POWER_SUPPLY_PROP_CURRENT_NOW,
703 POWER_SUPPLY_PROP_CAPACITY,
704 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
705 POWER_SUPPLY_PROP_TEMP,
706 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
707 POWER_SUPPLY_PROP_TECHNOLOGY,
708 POWER_SUPPLY_PROP_CHARGE_FULL,
709 POWER_SUPPLY_PROP_CHARGE_NOW,
710 POWER_SUPPLY_PROP_HEALTH,
711 POWER_SUPPLY_PROP_CYCLE_COUNT,
712 POWER_SUPPLY_PROP_POWER_AVG,
713 POWER_SUPPLY_PROP_MANUFACTURER,
714 };
715
716 static enum power_supply_property bq27421_props[] = {
717 POWER_SUPPLY_PROP_STATUS,
718 POWER_SUPPLY_PROP_PRESENT,
719 POWER_SUPPLY_PROP_VOLTAGE_NOW,
720 POWER_SUPPLY_PROP_CURRENT_NOW,
721 POWER_SUPPLY_PROP_CAPACITY,
722 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
723 POWER_SUPPLY_PROP_TEMP,
724 POWER_SUPPLY_PROP_TECHNOLOGY,
725 POWER_SUPPLY_PROP_CHARGE_FULL,
726 POWER_SUPPLY_PROP_CHARGE_NOW,
727 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
728 POWER_SUPPLY_PROP_MANUFACTURER,
729 };
730 #define bq27411_props bq27421_props
731 #define bq27425_props bq27421_props
732 #define bq27426_props bq27421_props
733 #define bq27441_props bq27421_props
734 #define bq27621_props bq27421_props
735
736 static enum power_supply_property bq27z561_props[] = {
737 POWER_SUPPLY_PROP_STATUS,
738 POWER_SUPPLY_PROP_PRESENT,
739 POWER_SUPPLY_PROP_VOLTAGE_NOW,
740 POWER_SUPPLY_PROP_CURRENT_NOW,
741 POWER_SUPPLY_PROP_CAPACITY,
742 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
743 POWER_SUPPLY_PROP_TEMP,
744 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
745 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
746 POWER_SUPPLY_PROP_TECHNOLOGY,
747 POWER_SUPPLY_PROP_CHARGE_FULL,
748 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
749 POWER_SUPPLY_PROP_CYCLE_COUNT,
750 POWER_SUPPLY_PROP_POWER_AVG,
751 POWER_SUPPLY_PROP_HEALTH,
752 POWER_SUPPLY_PROP_MANUFACTURER,
753 };
754
755 static enum power_supply_property bq28z610_props[] = {
756 POWER_SUPPLY_PROP_STATUS,
757 POWER_SUPPLY_PROP_PRESENT,
758 POWER_SUPPLY_PROP_VOLTAGE_NOW,
759 POWER_SUPPLY_PROP_CURRENT_NOW,
760 POWER_SUPPLY_PROP_CAPACITY,
761 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
762 POWER_SUPPLY_PROP_TEMP,
763 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
764 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
765 POWER_SUPPLY_PROP_TECHNOLOGY,
766 POWER_SUPPLY_PROP_CHARGE_FULL,
767 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
768 POWER_SUPPLY_PROP_CYCLE_COUNT,
769 POWER_SUPPLY_PROP_POWER_AVG,
770 POWER_SUPPLY_PROP_HEALTH,
771 POWER_SUPPLY_PROP_MANUFACTURER,
772 };
773
774 static enum power_supply_property bq34z100_props[] = {
775 POWER_SUPPLY_PROP_STATUS,
776 POWER_SUPPLY_PROP_PRESENT,
777 POWER_SUPPLY_PROP_VOLTAGE_NOW,
778 POWER_SUPPLY_PROP_CURRENT_NOW,
779 POWER_SUPPLY_PROP_CAPACITY,
780 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
781 POWER_SUPPLY_PROP_TEMP,
782 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
783 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
784 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
785 POWER_SUPPLY_PROP_TECHNOLOGY,
786 POWER_SUPPLY_PROP_CHARGE_FULL,
787 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
788 POWER_SUPPLY_PROP_CYCLE_COUNT,
789 POWER_SUPPLY_PROP_ENERGY_NOW,
790 POWER_SUPPLY_PROP_POWER_AVG,
791 POWER_SUPPLY_PROP_HEALTH,
792 POWER_SUPPLY_PROP_MANUFACTURER,
793 };
794
795 struct bq27xxx_dm_reg {
796 u8 subclass_id;
797 u8 offset;
798 u8 bytes;
799 u16 min, max;
800 };
801
802 enum bq27xxx_dm_reg_id {
803 BQ27XXX_DM_DESIGN_CAPACITY = 0,
804 BQ27XXX_DM_DESIGN_ENERGY,
805 BQ27XXX_DM_TERMINATE_VOLTAGE,
806 };
807
808 #define bq27000_dm_regs 0
809 #define bq27010_dm_regs 0
810 #define bq2750x_dm_regs 0
811 #define bq2751x_dm_regs 0
812 #define bq2752x_dm_regs 0
813
814 #if 0 /* not yet tested */
815 static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
816 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 10, 2, 0, 65535 },
817 [BQ27XXX_DM_DESIGN_ENERGY] = { }, /* missing on chip */
818 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 },
819 };
820 #else
821 #define bq27500_dm_regs 0
822 #endif
823
824 /* todo create data memory definitions from datasheets and test on chips */
825 #define bq27510g1_dm_regs 0
826 #define bq27510g2_dm_regs 0
827 #define bq27510g3_dm_regs 0
828 #define bq27520g1_dm_regs 0
829 #define bq27520g2_dm_regs 0
830 #define bq27520g3_dm_regs 0
831 #define bq27520g4_dm_regs 0
832 #define bq27521_dm_regs 0
833 #define bq27530_dm_regs 0
834 #define bq27531_dm_regs 0
835 #define bq27541_dm_regs 0
836 #define bq27542_dm_regs 0
837 #define bq27546_dm_regs 0
838 #define bq27742_dm_regs 0
839
840 #if 0 /* not yet tested */
841 static struct bq27xxx_dm_reg bq27545_dm_regs[] = {
842 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 23, 2, 0, 32767 },
843 [BQ27XXX_DM_DESIGN_ENERGY] = { 48, 25, 2, 0, 32767 },
844 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800, 3700 },
845 };
846 #else
847 #define bq27545_dm_regs 0
848 #endif
849
850 static struct bq27xxx_dm_reg bq27411_dm_regs[] = {
851 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 32767 },
852 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
853 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2800, 3700 },
854 };
855
856 static struct bq27xxx_dm_reg bq27421_dm_regs[] = {
857 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 8000 },
858 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
859 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500, 3700 },
860 };
861
862 static struct bq27xxx_dm_reg bq27425_dm_regs[] = {
863 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 12, 2, 0, 32767 },
864 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 14, 2, 0, 32767 },
865 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800, 3700 },
866 };
867
868 static struct bq27xxx_dm_reg bq27426_dm_regs[] = {
869 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 6, 2, 0, 8000 },
870 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 8, 2, 0, 32767 },
871 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500, 3700 },
872 };
873
874 #if 0 /* not yet tested */
875 #define bq27441_dm_regs bq27421_dm_regs
876 #else
877 #define bq27441_dm_regs 0
878 #endif
879
880 #if 0 /* not yet tested */
881 static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
882 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 3, 2, 0, 8000 },
883 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 5, 2, 0, 32767 },
884 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500, 3700 },
885 };
886 #else
887 #define bq27621_dm_regs 0
888 #endif
889
890 #define bq27z561_dm_regs 0
891 #define bq28z610_dm_regs 0
892 #define bq34z100_dm_regs 0
893
894 #define BQ27XXX_O_ZERO BIT(0)
895 #define BQ27XXX_O_OTDC BIT(1) /* has OTC/OTD overtemperature flags */
896 #define BQ27XXX_O_UTOT BIT(2) /* has OT overtemperature flag */
897 #define BQ27XXX_O_CFGUP BIT(3)
898 #define BQ27XXX_O_RAM BIT(4)
899 #define BQ27Z561_O_BITS BIT(5)
900 #define BQ27XXX_O_SOC_SI BIT(6) /* SoC is single register */
901 #define BQ27XXX_O_HAS_CI BIT(7) /* has Capacity Inaccurate flag */
902 #define BQ27XXX_O_MUL_CHEM BIT(8) /* multiple chemistries supported */
903
904 #define BQ27XXX_DATA(ref, key, opt) { \
905 .opts = (opt), \
906 .unseal_key = key, \
907 .regs = ref##_regs, \
908 .dm_regs = ref##_dm_regs, \
909 .props = ref##_props, \
910 .props_size = ARRAY_SIZE(ref##_props) }
911
912 static struct {
913 u32 opts;
914 u32 unseal_key;
915 u8 *regs;
916 struct bq27xxx_dm_reg *dm_regs;
917 enum power_supply_property *props;
918 size_t props_size;
919 } bq27xxx_chip_data[] = {
920 [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
921 [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
922 [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC),
923 [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC),
924 [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC),
925 [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC),
926 [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC),
927 [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC),
928 [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC),
929 [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC),
930 [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC),
931 [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC),
932 [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC),
933 [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0),
934 [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT),
935 [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT),
936 [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC),
937 [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC),
938 [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC),
939 [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC),
940 [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC),
941 [BQ27411] = BQ27XXX_DATA(bq27411, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
942 [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
943 [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP),
944 [BQ27426] = BQ27XXX_DATA(bq27426, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
945 [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
946 [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
947 [BQ27Z561] = BQ27XXX_DATA(bq27z561, 0 , BQ27Z561_O_BITS),
948 [BQ28Z610] = BQ27XXX_DATA(bq28z610, 0 , BQ27Z561_O_BITS),
949 [BQ34Z100] = BQ27XXX_DATA(bq34z100, 0 , BQ27XXX_O_OTDC | BQ27XXX_O_SOC_SI | \
950 BQ27XXX_O_HAS_CI | BQ27XXX_O_MUL_CHEM),
951 };
952
953 static DEFINE_MUTEX(bq27xxx_list_lock);
954 static LIST_HEAD(bq27xxx_battery_devices);
955
956 #define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500)
957
958 #define BQ27XXX_DM_SZ 32
959
960 /**
961 * struct bq27xxx_dm_buf - chip data memory buffer
962 * @class: data memory subclass_id
963 * @block: data memory block number
964 * @data: data from/for the block
965 * @has_data: true if data has been filled by read
966 * @dirty: true if data has changed since last read/write
967 *
968 * Encapsulates info required to manage chip data memory blocks.
969 */
970 struct bq27xxx_dm_buf {
971 u8 class;
972 u8 block;
973 u8 data[BQ27XXX_DM_SZ];
974 bool has_data, dirty;
975 };
976
977 #define BQ27XXX_DM_BUF(di, i) { \
978 .class = (di)->dm_regs[i].subclass_id, \
979 .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
980 }
981
bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf * buf,struct bq27xxx_dm_reg * reg)982 static inline u16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf,
983 struct bq27xxx_dm_reg *reg)
984 {
985 if (buf->class == reg->subclass_id &&
986 buf->block == reg->offset / BQ27XXX_DM_SZ)
987 return (u16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
988
989 return NULL;
990 }
991
992 static const char * const bq27xxx_dm_reg_name[] = {
993 [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
994 [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
995 [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
996 };
997
998
999 static bool bq27xxx_dt_to_nvm = true;
1000 module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444);
1001 MODULE_PARM_DESC(dt_monitored_battery_updates_nvm,
1002 "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
1003 "Users must set this =0 when installing a different type of battery!\n"
1004 "Default is =1."
1005 #ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1006 "\nSetting this affects future kernel updates, not the current configuration."
1007 #endif
1008 );
1009
poll_interval_param_set(const char * val,const struct kernel_param * kp)1010 static int poll_interval_param_set(const char *val, const struct kernel_param *kp)
1011 {
1012 struct bq27xxx_device_info *di;
1013 unsigned int prev_val = *(unsigned int *) kp->arg;
1014 int ret;
1015
1016 ret = param_set_uint(val, kp);
1017 if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
1018 return ret;
1019
1020 mutex_lock(&bq27xxx_list_lock);
1021 list_for_each_entry(di, &bq27xxx_battery_devices, list) {
1022 cancel_delayed_work_sync(&di->work);
1023 schedule_delayed_work(&di->work, 0);
1024 }
1025 mutex_unlock(&bq27xxx_list_lock);
1026
1027 return ret;
1028 }
1029
1030 static const struct kernel_param_ops param_ops_poll_interval = {
1031 .get = param_get_uint,
1032 .set = poll_interval_param_set,
1033 };
1034
1035 static unsigned int poll_interval = 360;
1036 module_param_cb(poll_interval, ¶m_ops_poll_interval, &poll_interval, 0644);
1037 MODULE_PARM_DESC(poll_interval,
1038 "battery poll interval in seconds - 0 disables polling");
1039
1040 /*
1041 * Common code for BQ27xxx devices
1042 */
1043
bq27xxx_read(struct bq27xxx_device_info * di,int reg_index,bool single)1044 static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index,
1045 bool single)
1046 {
1047 int ret;
1048
1049 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1050 return -EINVAL;
1051
1052 ret = di->bus.read(di, di->regs[reg_index], single);
1053 if (ret < 0)
1054 dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
1055 di->regs[reg_index], reg_index);
1056
1057 return ret;
1058 }
1059
bq27xxx_write(struct bq27xxx_device_info * di,int reg_index,u16 value,bool single)1060 static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index,
1061 u16 value, bool single)
1062 {
1063 int ret;
1064
1065 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1066 return -EINVAL;
1067
1068 if (!di->bus.write)
1069 return -EPERM;
1070
1071 ret = di->bus.write(di, di->regs[reg_index], value, single);
1072 if (ret < 0)
1073 dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
1074 di->regs[reg_index], reg_index);
1075
1076 return ret;
1077 }
1078
bq27xxx_read_block(struct bq27xxx_device_info * di,int reg_index,u8 * data,int len)1079 static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index,
1080 u8 *data, int len)
1081 {
1082 int ret;
1083
1084 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1085 return -EINVAL;
1086
1087 if (!di->bus.read_bulk)
1088 return -EPERM;
1089
1090 ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
1091 if (ret < 0)
1092 dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
1093 di->regs[reg_index], reg_index);
1094
1095 return ret;
1096 }
1097
bq27xxx_write_block(struct bq27xxx_device_info * di,int reg_index,u8 * data,int len)1098 static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index,
1099 u8 *data, int len)
1100 {
1101 int ret;
1102
1103 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1104 return -EINVAL;
1105
1106 if (!di->bus.write_bulk)
1107 return -EPERM;
1108
1109 ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
1110 if (ret < 0)
1111 dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
1112 di->regs[reg_index], reg_index);
1113
1114 return ret;
1115 }
1116
bq27xxx_battery_seal(struct bq27xxx_device_info * di)1117 static int bq27xxx_battery_seal(struct bq27xxx_device_info *di)
1118 {
1119 int ret;
1120
1121 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false);
1122 if (ret < 0) {
1123 dev_err(di->dev, "bus error on seal: %d\n", ret);
1124 return ret;
1125 }
1126
1127 return 0;
1128 }
1129
bq27xxx_battery_unseal(struct bq27xxx_device_info * di)1130 static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di)
1131 {
1132 int ret;
1133
1134 if (di->unseal_key == 0) {
1135 dev_err(di->dev, "unseal failed due to missing key\n");
1136 return -EINVAL;
1137 }
1138
1139 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
1140 if (ret < 0)
1141 goto out;
1142
1143 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
1144 if (ret < 0)
1145 goto out;
1146
1147 return 0;
1148
1149 out:
1150 dev_err(di->dev, "bus error on unseal: %d\n", ret);
1151 return ret;
1152 }
1153
bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf * buf)1154 static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf)
1155 {
1156 u16 sum = 0;
1157 int i;
1158
1159 for (i = 0; i < BQ27XXX_DM_SZ; i++)
1160 sum += buf->data[i];
1161 sum &= 0xff;
1162
1163 return 0xff - sum;
1164 }
1165
bq27xxx_battery_read_dm_block(struct bq27xxx_device_info * di,struct bq27xxx_dm_buf * buf)1166 static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di,
1167 struct bq27xxx_dm_buf *buf)
1168 {
1169 int ret;
1170
1171 buf->has_data = false;
1172
1173 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1174 if (ret < 0)
1175 goto out;
1176
1177 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1178 if (ret < 0)
1179 goto out;
1180
1181 BQ27XXX_MSLEEP(1);
1182
1183 ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1184 if (ret < 0)
1185 goto out;
1186
1187 ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true);
1188 if (ret < 0)
1189 goto out;
1190
1191 if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) {
1192 ret = -EINVAL;
1193 goto out;
1194 }
1195
1196 buf->has_data = true;
1197 buf->dirty = false;
1198
1199 return 0;
1200
1201 out:
1202 dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
1203 return ret;
1204 }
1205
bq27xxx_battery_update_dm_block(struct bq27xxx_device_info * di,struct bq27xxx_dm_buf * buf,enum bq27xxx_dm_reg_id reg_id,unsigned int val)1206 static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di,
1207 struct bq27xxx_dm_buf *buf,
1208 enum bq27xxx_dm_reg_id reg_id,
1209 unsigned int val)
1210 {
1211 struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
1212 const char *str = bq27xxx_dm_reg_name[reg_id];
1213 u16 *prev = bq27xxx_dm_reg_ptr(buf, reg);
1214
1215 if (prev == NULL) {
1216 dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
1217 return;
1218 }
1219
1220 if (reg->bytes != 2) {
1221 dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
1222 return;
1223 }
1224
1225 if (!buf->has_data)
1226 return;
1227
1228 if (be16_to_cpup(prev) == val) {
1229 dev_info(di->dev, "%s has %u\n", str, val);
1230 return;
1231 }
1232
1233 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1234 if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
1235 #else
1236 if (!(di->opts & BQ27XXX_O_RAM)) {
1237 #endif
1238 /* devicetree and NVM differ; defer to NVM */
1239 dev_warn(di->dev, "%s has %u; update to %u disallowed "
1240 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1241 "by dt_monitored_battery_updates_nvm=0"
1242 #else
1243 "for flash/NVM data memory"
1244 #endif
1245 "\n", str, be16_to_cpup(prev), val);
1246 return;
1247 }
1248
1249 dev_info(di->dev, "update %s to %u\n", str, val);
1250
1251 *prev = cpu_to_be16(val);
1252 buf->dirty = true;
1253 }
1254
1255 static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active)
1256 {
1257 const int limit = 100;
1258 u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET;
1259 int ret, try = limit;
1260
1261 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false);
1262 if (ret < 0)
1263 return ret;
1264
1265 do {
1266 BQ27XXX_MSLEEP(25);
1267 ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false);
1268 if (ret < 0)
1269 return ret;
1270 } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
1271
1272 if (!try && di->chip != BQ27425) { // 425 has a bug
1273 dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
1274 return -EINVAL;
1275 }
1276
1277 if (limit - try > 3)
1278 dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
1279
1280 return 0;
1281 }
1282
1283 static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di)
1284 {
1285 int ret = bq27xxx_battery_cfgupdate_priv(di, true);
1286 if (ret < 0 && ret != -EINVAL)
1287 dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
1288
1289 return ret;
1290 }
1291
1292 static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di)
1293 {
1294 int ret = bq27xxx_battery_cfgupdate_priv(di, false);
1295 if (ret < 0 && ret != -EINVAL)
1296 dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
1297
1298 return ret;
1299 }
1300
1301 static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di,
1302 struct bq27xxx_dm_buf *buf)
1303 {
1304 bool cfgup = di->opts & BQ27XXX_O_CFGUP;
1305 int ret;
1306
1307 if (!buf->dirty)
1308 return 0;
1309
1310 if (cfgup) {
1311 ret = bq27xxx_battery_set_cfgupdate(di);
1312 if (ret < 0)
1313 return ret;
1314 }
1315
1316 ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true);
1317 if (ret < 0)
1318 goto out;
1319
1320 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1321 if (ret < 0)
1322 goto out;
1323
1324 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1325 if (ret < 0)
1326 goto out;
1327
1328 BQ27XXX_MSLEEP(1);
1329
1330 ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1331 if (ret < 0)
1332 goto out;
1333
1334 ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM,
1335 bq27xxx_battery_checksum_dm_block(buf), true);
1336 if (ret < 0)
1337 goto out;
1338
1339 /* DO NOT read BQ27XXX_DM_CKSUM here to verify it! That may cause NVM
1340 * corruption on the '425 chip (and perhaps others), which can damage
1341 * the chip.
1342 */
1343
1344 if (cfgup) {
1345 BQ27XXX_MSLEEP(1);
1346 ret = bq27xxx_battery_soft_reset(di);
1347 if (ret < 0)
1348 return ret;
1349 } else {
1350 BQ27XXX_MSLEEP(100); /* flash DM updates in <100ms */
1351 }
1352
1353 buf->dirty = false;
1354
1355 return 0;
1356
1357 out:
1358 if (cfgup)
1359 bq27xxx_battery_soft_reset(di);
1360
1361 dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
1362 return ret;
1363 }
1364
1365 static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di,
1366 struct power_supply_battery_info *info)
1367 {
1368 struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY);
1369 struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE);
1370 bool updated;
1371
1372 if (bq27xxx_battery_unseal(di) < 0)
1373 return;
1374
1375 if (info->charge_full_design_uah != -EINVAL &&
1376 info->energy_full_design_uwh != -EINVAL) {
1377 bq27xxx_battery_read_dm_block(di, &bd);
1378 /* assume design energy & capacity are in same block */
1379 bq27xxx_battery_update_dm_block(di, &bd,
1380 BQ27XXX_DM_DESIGN_CAPACITY,
1381 info->charge_full_design_uah / 1000);
1382 bq27xxx_battery_update_dm_block(di, &bd,
1383 BQ27XXX_DM_DESIGN_ENERGY,
1384 info->energy_full_design_uwh / 1000);
1385 }
1386
1387 if (info->voltage_min_design_uv != -EINVAL) {
1388 bool same = bd.class == bt.class && bd.block == bt.block;
1389 if (!same)
1390 bq27xxx_battery_read_dm_block(di, &bt);
1391 bq27xxx_battery_update_dm_block(di, same ? &bd : &bt,
1392 BQ27XXX_DM_TERMINATE_VOLTAGE,
1393 info->voltage_min_design_uv / 1000);
1394 }
1395
1396 updated = bd.dirty || bt.dirty;
1397
1398 bq27xxx_battery_write_dm_block(di, &bd);
1399 bq27xxx_battery_write_dm_block(di, &bt);
1400
1401 bq27xxx_battery_seal(di);
1402
1403 if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
1404 bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false);
1405 BQ27XXX_MSLEEP(300); /* reset time is not documented */
1406 }
1407 /* assume bq27xxx_battery_update() is called hereafter */
1408 }
1409
1410 static void bq27xxx_battery_settings(struct bq27xxx_device_info *di)
1411 {
1412 struct power_supply_battery_info info = {};
1413 unsigned int min, max;
1414
1415 if (power_supply_get_battery_info(di->bat, &info) < 0)
1416 return;
1417
1418 if (!di->dm_regs) {
1419 dev_warn(di->dev, "data memory update not supported for chip\n");
1420 return;
1421 }
1422
1423 if (info.energy_full_design_uwh != info.charge_full_design_uah) {
1424 if (info.energy_full_design_uwh == -EINVAL)
1425 dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
1426 else if (info.charge_full_design_uah == -EINVAL)
1427 dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
1428 }
1429
1430 /* assume min == 0 */
1431 max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
1432 if (info.energy_full_design_uwh > max * 1000) {
1433 dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
1434 info.energy_full_design_uwh);
1435 info.energy_full_design_uwh = -EINVAL;
1436 }
1437
1438 /* assume min == 0 */
1439 max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
1440 if (info.charge_full_design_uah > max * 1000) {
1441 dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
1442 info.charge_full_design_uah);
1443 info.charge_full_design_uah = -EINVAL;
1444 }
1445
1446 min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
1447 max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
1448 if ((info.voltage_min_design_uv < min * 1000 ||
1449 info.voltage_min_design_uv > max * 1000) &&
1450 info.voltage_min_design_uv != -EINVAL) {
1451 dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
1452 info.voltage_min_design_uv);
1453 info.voltage_min_design_uv = -EINVAL;
1454 }
1455
1456 if ((info.energy_full_design_uwh != -EINVAL &&
1457 info.charge_full_design_uah != -EINVAL) ||
1458 info.voltage_min_design_uv != -EINVAL)
1459 bq27xxx_battery_set_config(di, &info);
1460 }
1461
1462 /*
1463 * Return the battery State-of-Charge
1464 * Or < 0 if something fails.
1465 */
1466 static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di)
1467 {
1468 int soc;
1469
1470 if (di->opts & BQ27XXX_O_SOC_SI)
1471 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true);
1472 else
1473 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false);
1474
1475 if (soc < 0)
1476 dev_dbg(di->dev, "error reading State-of-Charge\n");
1477
1478 return soc;
1479 }
1480
1481 /*
1482 * Return a battery charge value in µAh
1483 * Or < 0 if something fails.
1484 */
1485 static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg)
1486 {
1487 int charge;
1488
1489 charge = bq27xxx_read(di, reg, false);
1490 if (charge < 0) {
1491 dev_dbg(di->dev, "error reading charge register %02x: %d\n",
1492 reg, charge);
1493 return charge;
1494 }
1495
1496 if (di->opts & BQ27XXX_O_ZERO)
1497 charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1498 else
1499 charge *= 1000;
1500
1501 return charge;
1502 }
1503
1504 /*
1505 * Return the battery Nominal available capacity in µAh
1506 * Or < 0 if something fails.
1507 */
1508 static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di)
1509 {
1510 int flags;
1511
1512 if (di->opts & BQ27XXX_O_ZERO) {
1513 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1514 if (flags >= 0 && (flags & BQ27000_FLAG_CI))
1515 return -ENODATA;
1516 }
1517
1518 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC);
1519 }
1520
1521 /*
1522 * Return the battery Full Charge Capacity in µAh
1523 * Or < 0 if something fails.
1524 */
1525 static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di)
1526 {
1527 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC);
1528 }
1529
1530 /*
1531 * Return the Design Capacity in µAh
1532 * Or < 0 if something fails.
1533 */
1534 static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di)
1535 {
1536 int dcap;
1537
1538 if (di->opts & BQ27XXX_O_ZERO)
1539 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true);
1540 else
1541 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false);
1542
1543 if (dcap < 0) {
1544 dev_dbg(di->dev, "error reading initial last measured discharge\n");
1545 return dcap;
1546 }
1547
1548 if (di->opts & BQ27XXX_O_ZERO)
1549 dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1550 else
1551 dcap *= 1000;
1552
1553 return dcap;
1554 }
1555
1556 /*
1557 * Return the battery Available energy in µWh
1558 * Or < 0 if something fails.
1559 */
1560 static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di)
1561 {
1562 int ae;
1563
1564 ae = bq27xxx_read(di, BQ27XXX_REG_AE, false);
1565 if (ae < 0) {
1566 dev_dbg(di->dev, "error reading available energy\n");
1567 return ae;
1568 }
1569
1570 if (di->opts & BQ27XXX_O_ZERO)
1571 ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS;
1572 else
1573 ae *= 1000;
1574
1575 return ae;
1576 }
1577
1578 /*
1579 * Return the battery temperature in tenths of degree Kelvin
1580 * Or < 0 if something fails.
1581 */
1582 static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di)
1583 {
1584 int temp;
1585
1586 temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false);
1587 if (temp < 0) {
1588 dev_err(di->dev, "error reading temperature\n");
1589 return temp;
1590 }
1591
1592 if (di->opts & BQ27XXX_O_ZERO)
1593 temp = 5 * temp / 2;
1594
1595 return temp;
1596 }
1597
1598 /*
1599 * Return the battery Cycle count total
1600 * Or < 0 if something fails.
1601 */
1602 static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di)
1603 {
1604 int cyct;
1605
1606 cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false);
1607 if (cyct < 0)
1608 dev_err(di->dev, "error reading cycle count total\n");
1609
1610 return cyct;
1611 }
1612
1613 /*
1614 * Read a time register.
1615 * Return < 0 if something fails.
1616 */
1617 static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg)
1618 {
1619 int tval;
1620
1621 tval = bq27xxx_read(di, reg, false);
1622 if (tval < 0) {
1623 dev_dbg(di->dev, "error reading time register %02x: %d\n",
1624 reg, tval);
1625 return tval;
1626 }
1627
1628 if (tval == 65535)
1629 return -ENODATA;
1630
1631 return tval * 60;
1632 }
1633
1634 /*
1635 * Read an average power register.
1636 * Return < 0 if something fails.
1637 */
1638 static int bq27xxx_battery_read_pwr_avg(struct bq27xxx_device_info *di)
1639 {
1640 int tval;
1641
1642 tval = bq27xxx_read(di, BQ27XXX_REG_AP, false);
1643 if (tval < 0) {
1644 dev_err(di->dev, "error reading average power register %02x: %d\n",
1645 BQ27XXX_REG_AP, tval);
1646 return tval;
1647 }
1648
1649 if (di->opts & BQ27XXX_O_ZERO)
1650 return (tval * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
1651 else
1652 return tval;
1653 }
1654
1655 /*
1656 * Returns true if a battery over temperature condition is detected
1657 */
1658 static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags)
1659 {
1660 if (di->opts & BQ27XXX_O_OTDC)
1661 return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD);
1662 if (di->opts & BQ27XXX_O_UTOT)
1663 return flags & BQ27XXX_FLAG_OT;
1664
1665 return false;
1666 }
1667
1668 /*
1669 * Returns true if a battery under temperature condition is detected
1670 */
1671 static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags)
1672 {
1673 if (di->opts & BQ27XXX_O_UTOT)
1674 return flags & BQ27XXX_FLAG_UT;
1675
1676 return false;
1677 }
1678
1679 /*
1680 * Returns true if a low state of charge condition is detected
1681 */
1682 static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags)
1683 {
1684 if (di->opts & BQ27XXX_O_ZERO)
1685 return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF);
1686 else if (di->opts & BQ27Z561_O_BITS)
1687 return flags & BQ27Z561_FLAG_FDC;
1688 else
1689 return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF);
1690 }
1691
1692 static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di)
1693 {
1694 /* Unlikely but important to return first */
1695 if (unlikely(bq27xxx_battery_overtemp(di, di->cache.flags)))
1696 return POWER_SUPPLY_HEALTH_OVERHEAT;
1697 if (unlikely(bq27xxx_battery_undertemp(di, di->cache.flags)))
1698 return POWER_SUPPLY_HEALTH_COLD;
1699 if (unlikely(bq27xxx_battery_dead(di, di->cache.flags)))
1700 return POWER_SUPPLY_HEALTH_DEAD;
1701
1702 return POWER_SUPPLY_HEALTH_GOOD;
1703 }
1704
1705 void bq27xxx_battery_update(struct bq27xxx_device_info *di)
1706 {
1707 struct bq27xxx_reg_cache cache = {0, };
1708 bool has_ci_flag = di->opts & BQ27XXX_O_HAS_CI;
1709 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1710
1711 cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1712 if ((cache.flags & 0xff) == 0xff)
1713 cache.flags = -1; /* read error */
1714 if (cache.flags >= 0) {
1715 cache.temperature = bq27xxx_battery_read_temperature(di);
1716 if (has_ci_flag && (cache.flags & BQ27000_FLAG_CI)) {
1717 dev_info_once(di->dev, "battery is not calibrated! ignoring capacity values\n");
1718 cache.capacity = -ENODATA;
1719 cache.energy = -ENODATA;
1720 cache.time_to_empty = -ENODATA;
1721 cache.time_to_empty_avg = -ENODATA;
1722 cache.time_to_full = -ENODATA;
1723 cache.charge_full = -ENODATA;
1724 cache.health = -ENODATA;
1725 } else {
1726 if (di->regs[BQ27XXX_REG_TTE] != INVALID_REG_ADDR)
1727 cache.time_to_empty = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE);
1728 if (di->regs[BQ27XXX_REG_TTECP] != INVALID_REG_ADDR)
1729 cache.time_to_empty_avg = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP);
1730 if (di->regs[BQ27XXX_REG_TTF] != INVALID_REG_ADDR)
1731 cache.time_to_full = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF);
1732
1733 cache.charge_full = bq27xxx_battery_read_fcc(di);
1734 cache.capacity = bq27xxx_battery_read_soc(di);
1735 if (di->regs[BQ27XXX_REG_AE] != INVALID_REG_ADDR)
1736 cache.energy = bq27xxx_battery_read_energy(di);
1737 di->cache.flags = cache.flags;
1738 cache.health = bq27xxx_battery_read_health(di);
1739 }
1740 if (di->regs[BQ27XXX_REG_CYCT] != INVALID_REG_ADDR)
1741 cache.cycle_count = bq27xxx_battery_read_cyct(di);
1742 if (di->regs[BQ27XXX_REG_AP] != INVALID_REG_ADDR)
1743 cache.power_avg = bq27xxx_battery_read_pwr_avg(di);
1744
1745 /* We only have to read charge design full once */
1746 if (di->charge_design_full <= 0)
1747 di->charge_design_full = bq27xxx_battery_read_dcap(di);
1748 }
1749
1750 if ((di->cache.capacity != cache.capacity) ||
1751 (di->cache.flags != cache.flags))
1752 power_supply_changed(di->bat);
1753
1754 if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
1755 di->cache = cache;
1756
1757 di->last_update = jiffies;
1758 }
1759 EXPORT_SYMBOL_GPL(bq27xxx_battery_update);
1760
1761 static void bq27xxx_battery_poll(struct work_struct *work)
1762 {
1763 struct bq27xxx_device_info *di =
1764 container_of(work, struct bq27xxx_device_info,
1765 work.work);
1766
1767 bq27xxx_battery_update(di);
1768
1769 if (poll_interval > 0)
1770 schedule_delayed_work(&di->work, poll_interval * HZ);
1771 }
1772
1773 /*
1774 * Return the battery average current in µA
1775 * Note that current can be negative signed as well
1776 * Or 0 if something fails.
1777 */
1778 static int bq27xxx_battery_current(struct bq27xxx_device_info *di,
1779 union power_supply_propval *val)
1780 {
1781 int curr;
1782 int flags;
1783
1784 curr = bq27xxx_read(di, BQ27XXX_REG_AI, false);
1785 if (curr < 0) {
1786 dev_err(di->dev, "error reading current\n");
1787 return curr;
1788 }
1789
1790 if (di->opts & BQ27XXX_O_ZERO) {
1791 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1792 if (flags & BQ27000_FLAG_CHGS) {
1793 dev_dbg(di->dev, "negative current!\n");
1794 curr = -curr;
1795 }
1796
1797 val->intval = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1798 } else {
1799 /* Other gauges return signed value */
1800 val->intval = (int)((s16)curr) * 1000;
1801 }
1802
1803 return 0;
1804 }
1805
1806 static int bq27xxx_battery_status(struct bq27xxx_device_info *di,
1807 union power_supply_propval *val)
1808 {
1809 int status;
1810
1811 if (di->opts & BQ27XXX_O_ZERO) {
1812 if (di->cache.flags & BQ27000_FLAG_FC)
1813 status = POWER_SUPPLY_STATUS_FULL;
1814 else if (di->cache.flags & BQ27000_FLAG_CHGS)
1815 status = POWER_SUPPLY_STATUS_CHARGING;
1816 else
1817 status = POWER_SUPPLY_STATUS_DISCHARGING;
1818 } else if (di->opts & BQ27Z561_O_BITS) {
1819 if (di->cache.flags & BQ27Z561_FLAG_FC)
1820 status = POWER_SUPPLY_STATUS_FULL;
1821 else if (di->cache.flags & BQ27Z561_FLAG_DIS_CH)
1822 status = POWER_SUPPLY_STATUS_DISCHARGING;
1823 else
1824 status = POWER_SUPPLY_STATUS_CHARGING;
1825 } else {
1826 if (di->cache.flags & BQ27XXX_FLAG_FC)
1827 status = POWER_SUPPLY_STATUS_FULL;
1828 else if (di->cache.flags & BQ27XXX_FLAG_DSC)
1829 status = POWER_SUPPLY_STATUS_DISCHARGING;
1830 else
1831 status = POWER_SUPPLY_STATUS_CHARGING;
1832 }
1833
1834 if ((status == POWER_SUPPLY_STATUS_DISCHARGING) &&
1835 (power_supply_am_i_supplied(di->bat) > 0))
1836 status = POWER_SUPPLY_STATUS_NOT_CHARGING;
1837
1838 val->intval = status;
1839
1840 return 0;
1841 }
1842
1843 static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di,
1844 union power_supply_propval *val)
1845 {
1846 int level;
1847
1848 if (di->opts & BQ27XXX_O_ZERO) {
1849 if (di->cache.flags & BQ27000_FLAG_FC)
1850 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1851 else if (di->cache.flags & BQ27000_FLAG_EDV1)
1852 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1853 else if (di->cache.flags & BQ27000_FLAG_EDVF)
1854 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1855 else
1856 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1857 } else if (di->opts & BQ27Z561_O_BITS) {
1858 if (di->cache.flags & BQ27Z561_FLAG_FC)
1859 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1860 else if (di->cache.flags & BQ27Z561_FLAG_FDC)
1861 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1862 else
1863 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1864 } else {
1865 if (di->cache.flags & BQ27XXX_FLAG_FC)
1866 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1867 else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
1868 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1869 else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
1870 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1871 else
1872 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1873 }
1874
1875 val->intval = level;
1876
1877 return 0;
1878 }
1879
1880 /*
1881 * Return the battery Voltage in millivolts
1882 * Or < 0 if something fails.
1883 */
1884 static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di,
1885 union power_supply_propval *val)
1886 {
1887 int volt;
1888
1889 volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
1890 if (volt < 0) {
1891 dev_err(di->dev, "error reading voltage\n");
1892 return volt;
1893 }
1894
1895 val->intval = volt * 1000;
1896
1897 return 0;
1898 }
1899
1900 static int bq27xxx_simple_value(int value,
1901 union power_supply_propval *val)
1902 {
1903 if (value < 0)
1904 return value;
1905
1906 val->intval = value;
1907
1908 return 0;
1909 }
1910
1911 static int bq27xxx_battery_get_property(struct power_supply *psy,
1912 enum power_supply_property psp,
1913 union power_supply_propval *val)
1914 {
1915 int ret = 0;
1916 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1917
1918 mutex_lock(&di->lock);
1919 if (time_is_before_jiffies(di->last_update + 5 * HZ)) {
1920 cancel_delayed_work_sync(&di->work);
1921 bq27xxx_battery_poll(&di->work.work);
1922 }
1923 mutex_unlock(&di->lock);
1924
1925 if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
1926 return -ENODEV;
1927
1928 switch (psp) {
1929 case POWER_SUPPLY_PROP_STATUS:
1930 ret = bq27xxx_battery_status(di, val);
1931 break;
1932 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
1933 ret = bq27xxx_battery_voltage(di, val);
1934 break;
1935 case POWER_SUPPLY_PROP_PRESENT:
1936 val->intval = di->cache.flags < 0 ? 0 : 1;
1937 break;
1938 case POWER_SUPPLY_PROP_CURRENT_NOW:
1939 ret = bq27xxx_battery_current(di, val);
1940 break;
1941 case POWER_SUPPLY_PROP_CAPACITY:
1942 ret = bq27xxx_simple_value(di->cache.capacity, val);
1943 break;
1944 case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
1945 ret = bq27xxx_battery_capacity_level(di, val);
1946 break;
1947 case POWER_SUPPLY_PROP_TEMP:
1948 ret = bq27xxx_simple_value(di->cache.temperature, val);
1949 if (ret == 0)
1950 val->intval -= 2731; /* convert decidegree k to c */
1951 break;
1952 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
1953 ret = bq27xxx_simple_value(di->cache.time_to_empty, val);
1954 break;
1955 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
1956 ret = bq27xxx_simple_value(di->cache.time_to_empty_avg, val);
1957 break;
1958 case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
1959 ret = bq27xxx_simple_value(di->cache.time_to_full, val);
1960 break;
1961 case POWER_SUPPLY_PROP_TECHNOLOGY:
1962 if (di->opts & BQ27XXX_O_MUL_CHEM)
1963 val->intval = POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
1964 else
1965 val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
1966 break;
1967 case POWER_SUPPLY_PROP_CHARGE_NOW:
1968 ret = bq27xxx_simple_value(bq27xxx_battery_read_nac(di), val);
1969 break;
1970 case POWER_SUPPLY_PROP_CHARGE_FULL:
1971 ret = bq27xxx_simple_value(di->cache.charge_full, val);
1972 break;
1973 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
1974 ret = bq27xxx_simple_value(di->charge_design_full, val);
1975 break;
1976 /*
1977 * TODO: Implement these to make registers set from
1978 * power_supply_battery_info visible in sysfs.
1979 */
1980 case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
1981 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
1982 return -EINVAL;
1983 case POWER_SUPPLY_PROP_CYCLE_COUNT:
1984 ret = bq27xxx_simple_value(di->cache.cycle_count, val);
1985 break;
1986 case POWER_SUPPLY_PROP_ENERGY_NOW:
1987 ret = bq27xxx_simple_value(di->cache.energy, val);
1988 break;
1989 case POWER_SUPPLY_PROP_POWER_AVG:
1990 ret = bq27xxx_simple_value(di->cache.power_avg, val);
1991 break;
1992 case POWER_SUPPLY_PROP_HEALTH:
1993 ret = bq27xxx_simple_value(di->cache.health, val);
1994 break;
1995 case POWER_SUPPLY_PROP_MANUFACTURER:
1996 val->strval = BQ27XXX_MANUFACTURER;
1997 break;
1998 default:
1999 return -EINVAL;
2000 }
2001
2002 return ret;
2003 }
2004
2005 static void bq27xxx_external_power_changed(struct power_supply *psy)
2006 {
2007 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
2008
2009 cancel_delayed_work_sync(&di->work);
2010 schedule_delayed_work(&di->work, 0);
2011 }
2012
2013 int bq27xxx_battery_setup(struct bq27xxx_device_info *di)
2014 {
2015 struct power_supply_desc *psy_desc;
2016 struct power_supply_config psy_cfg = {
2017 .of_node = di->dev->of_node,
2018 .drv_data = di,
2019 };
2020
2021 INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
2022 mutex_init(&di->lock);
2023
2024 di->regs = bq27xxx_chip_data[di->chip].regs;
2025 di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
2026 di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs;
2027 di->opts = bq27xxx_chip_data[di->chip].opts;
2028
2029 psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
2030 if (!psy_desc)
2031 return -ENOMEM;
2032
2033 psy_desc->name = di->name;
2034 psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
2035 psy_desc->properties = bq27xxx_chip_data[di->chip].props;
2036 psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
2037 psy_desc->get_property = bq27xxx_battery_get_property;
2038 psy_desc->external_power_changed = bq27xxx_external_power_changed;
2039
2040 di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg);
2041 if (IS_ERR(di->bat))
2042 return dev_err_probe(di->dev, PTR_ERR(di->bat),
2043 "failed to register battery\n");
2044
2045 bq27xxx_battery_settings(di);
2046 bq27xxx_battery_update(di);
2047
2048 mutex_lock(&bq27xxx_list_lock);
2049 list_add(&di->list, &bq27xxx_battery_devices);
2050 mutex_unlock(&bq27xxx_list_lock);
2051
2052 return 0;
2053 }
2054 EXPORT_SYMBOL_GPL(bq27xxx_battery_setup);
2055
2056 void bq27xxx_battery_teardown(struct bq27xxx_device_info *di)
2057 {
2058 /*
2059 * power_supply_unregister call bq27xxx_battery_get_property which
2060 * call bq27xxx_battery_poll.
2061 * Make sure that bq27xxx_battery_poll will not call
2062 * schedule_delayed_work again after unregister (which cause OOPS).
2063 */
2064 poll_interval = 0;
2065
2066 cancel_delayed_work_sync(&di->work);
2067
2068 power_supply_unregister(di->bat);
2069
2070 mutex_lock(&bq27xxx_list_lock);
2071 list_del(&di->list);
2072 mutex_unlock(&bq27xxx_list_lock);
2073
2074 mutex_destroy(&di->lock);
2075 }
2076 EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown);
2077
2078 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
2079 MODULE_DESCRIPTION("BQ27xxx battery monitor driver");
2080 MODULE_LICENSE("GPL");
2081
