1 /*
2 * BQ27xxx battery driver
3 *
4 * Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it>
5 * Copyright (C) 2008 Eurotech S.p.A. <info@eurotech.it>
6 * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de>
7 * Copyright (C) 2011 Pali Rohár <pali.rohar@gmail.com>
8 * Copyright (C) 2017 Liam Breck <kernel@networkimprov.net>
9 *
10 * Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc.
11 *
12 * This package is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
18 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
19 *
20 * Datasheets:
21 * http://www.ti.com/product/bq27000
22 * http://www.ti.com/product/bq27200
23 * http://www.ti.com/product/bq27010
24 * http://www.ti.com/product/bq27210
25 * http://www.ti.com/product/bq27500
26 * http://www.ti.com/product/bq27510-g1
27 * http://www.ti.com/product/bq27510-g2
28 * http://www.ti.com/product/bq27510-g3
29 * http://www.ti.com/product/bq27520-g1
30 * http://www.ti.com/product/bq27520-g2
31 * http://www.ti.com/product/bq27520-g3
32 * http://www.ti.com/product/bq27520-g4
33 * http://www.ti.com/product/bq27530-g1
34 * http://www.ti.com/product/bq27531-g1
35 * http://www.ti.com/product/bq27541-g1
36 * http://www.ti.com/product/bq27542-g1
37 * http://www.ti.com/product/bq27546-g1
38 * http://www.ti.com/product/bq27742-g1
39 * http://www.ti.com/product/bq27545-g1
40 * http://www.ti.com/product/bq27421-g1
41 * http://www.ti.com/product/bq27425-g1
42 * http://www.ti.com/product/bq27426
43 * http://www.ti.com/product/bq27411-g1
44 * http://www.ti.com/product/bq27441-g1
45 * http://www.ti.com/product/bq27621-g1
46 */
47
48 #include <linux/device.h>
49 #include <linux/module.h>
50 #include <linux/mutex.h>
51 #include <linux/param.h>
52 #include <linux/jiffies.h>
53 #include <linux/workqueue.h>
54 #include <linux/delay.h>
55 #include <linux/platform_device.h>
56 #include <linux/power_supply.h>
57 #include <linux/slab.h>
58 #include <linux/of.h>
59
60 #include <linux/power/bq27xxx_battery.h>
61
62 #define BQ27XXX_MANUFACTURER "Texas Instruments"
63
64 /* BQ27XXX Flags */
65 #define BQ27XXX_FLAG_DSC BIT(0)
66 #define BQ27XXX_FLAG_SOCF BIT(1) /* State-of-Charge threshold final */
67 #define BQ27XXX_FLAG_SOC1 BIT(2) /* State-of-Charge threshold 1 */
68 #define BQ27XXX_FLAG_CFGUP BIT(4)
69 #define BQ27XXX_FLAG_FC BIT(9)
70 #define BQ27XXX_FLAG_OTD BIT(14)
71 #define BQ27XXX_FLAG_OTC BIT(15)
72 #define BQ27XXX_FLAG_UT BIT(14)
73 #define BQ27XXX_FLAG_OT BIT(15)
74
75 /* BQ27000 has different layout for Flags register */
76 #define BQ27000_FLAG_EDVF BIT(0) /* Final End-of-Discharge-Voltage flag */
77 #define BQ27000_FLAG_EDV1 BIT(1) /* First End-of-Discharge-Voltage flag */
78 #define BQ27000_FLAG_CI BIT(4) /* Capacity Inaccurate flag */
79 #define BQ27000_FLAG_FC BIT(5)
80 #define BQ27000_FLAG_CHGS BIT(7) /* Charge state flag */
81
82 /* control register params */
83 #define BQ27XXX_SEALED 0x20
84 #define BQ27XXX_SET_CFGUPDATE 0x13
85 #define BQ27XXX_SOFT_RESET 0x42
86 #define BQ27XXX_RESET 0x41
87
88 #define BQ27XXX_RS (20) /* Resistor sense mOhm */
89 #define BQ27XXX_POWER_CONSTANT (29200) /* 29.2 µV^2 * 1000 */
90 #define BQ27XXX_CURRENT_CONSTANT (3570) /* 3.57 µV * 1000 */
91
92 #define INVALID_REG_ADDR 0xff
93
94 /*
95 * bq27xxx_reg_index - Register names
96 *
97 * These are indexes into a device's register mapping array.
98 */
99
100 enum bq27xxx_reg_index {
101 BQ27XXX_REG_CTRL = 0, /* Control */
102 BQ27XXX_REG_TEMP, /* Temperature */
103 BQ27XXX_REG_INT_TEMP, /* Internal Temperature */
104 BQ27XXX_REG_VOLT, /* Voltage */
105 BQ27XXX_REG_AI, /* Average Current */
106 BQ27XXX_REG_FLAGS, /* Flags */
107 BQ27XXX_REG_TTE, /* Time-to-Empty */
108 BQ27XXX_REG_TTF, /* Time-to-Full */
109 BQ27XXX_REG_TTES, /* Time-to-Empty Standby */
110 BQ27XXX_REG_TTECP, /* Time-to-Empty at Constant Power */
111 BQ27XXX_REG_NAC, /* Nominal Available Capacity */
112 BQ27XXX_REG_FCC, /* Full Charge Capacity */
113 BQ27XXX_REG_CYCT, /* Cycle Count */
114 BQ27XXX_REG_AE, /* Available Energy */
115 BQ27XXX_REG_SOC, /* State-of-Charge */
116 BQ27XXX_REG_DCAP, /* Design Capacity */
117 BQ27XXX_REG_AP, /* Average Power */
118 BQ27XXX_DM_CTRL, /* Block Data Control */
119 BQ27XXX_DM_CLASS, /* Data Class */
120 BQ27XXX_DM_BLOCK, /* Data Block */
121 BQ27XXX_DM_DATA, /* Block Data */
122 BQ27XXX_DM_CKSUM, /* Block Data Checksum */
123 BQ27XXX_REG_MAX, /* sentinel */
124 };
125
126 #define BQ27XXX_DM_REG_ROWS \
127 [BQ27XXX_DM_CTRL] = 0x61, \
128 [BQ27XXX_DM_CLASS] = 0x3e, \
129 [BQ27XXX_DM_BLOCK] = 0x3f, \
130 [BQ27XXX_DM_DATA] = 0x40, \
131 [BQ27XXX_DM_CKSUM] = 0x60
132
133 /* Register mappings */
134 static u8
135 bq27000_regs[BQ27XXX_REG_MAX] = {
136 [BQ27XXX_REG_CTRL] = 0x00,
137 [BQ27XXX_REG_TEMP] = 0x06,
138 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
139 [BQ27XXX_REG_VOLT] = 0x08,
140 [BQ27XXX_REG_AI] = 0x14,
141 [BQ27XXX_REG_FLAGS] = 0x0a,
142 [BQ27XXX_REG_TTE] = 0x16,
143 [BQ27XXX_REG_TTF] = 0x18,
144 [BQ27XXX_REG_TTES] = 0x1c,
145 [BQ27XXX_REG_TTECP] = 0x26,
146 [BQ27XXX_REG_NAC] = 0x0c,
147 [BQ27XXX_REG_FCC] = 0x12,
148 [BQ27XXX_REG_CYCT] = 0x2a,
149 [BQ27XXX_REG_AE] = 0x22,
150 [BQ27XXX_REG_SOC] = 0x0b,
151 [BQ27XXX_REG_DCAP] = 0x76,
152 [BQ27XXX_REG_AP] = 0x24,
153 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
154 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
155 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
156 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
157 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
158 },
159 bq27010_regs[BQ27XXX_REG_MAX] = {
160 [BQ27XXX_REG_CTRL] = 0x00,
161 [BQ27XXX_REG_TEMP] = 0x06,
162 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
163 [BQ27XXX_REG_VOLT] = 0x08,
164 [BQ27XXX_REG_AI] = 0x14,
165 [BQ27XXX_REG_FLAGS] = 0x0a,
166 [BQ27XXX_REG_TTE] = 0x16,
167 [BQ27XXX_REG_TTF] = 0x18,
168 [BQ27XXX_REG_TTES] = 0x1c,
169 [BQ27XXX_REG_TTECP] = 0x26,
170 [BQ27XXX_REG_NAC] = 0x0c,
171 [BQ27XXX_REG_FCC] = 0x12,
172 [BQ27XXX_REG_CYCT] = 0x2a,
173 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
174 [BQ27XXX_REG_SOC] = 0x0b,
175 [BQ27XXX_REG_DCAP] = 0x76,
176 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
177 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
178 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
179 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
180 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
181 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
182 },
183 bq2750x_regs[BQ27XXX_REG_MAX] = {
184 [BQ27XXX_REG_CTRL] = 0x00,
185 [BQ27XXX_REG_TEMP] = 0x06,
186 [BQ27XXX_REG_INT_TEMP] = 0x28,
187 [BQ27XXX_REG_VOLT] = 0x08,
188 [BQ27XXX_REG_AI] = 0x14,
189 [BQ27XXX_REG_FLAGS] = 0x0a,
190 [BQ27XXX_REG_TTE] = 0x16,
191 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
192 [BQ27XXX_REG_TTES] = 0x1a,
193 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
194 [BQ27XXX_REG_NAC] = 0x0c,
195 [BQ27XXX_REG_FCC] = 0x12,
196 [BQ27XXX_REG_CYCT] = 0x2a,
197 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
198 [BQ27XXX_REG_SOC] = 0x2c,
199 [BQ27XXX_REG_DCAP] = 0x3c,
200 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
201 BQ27XXX_DM_REG_ROWS,
202 },
203 #define bq2751x_regs bq27510g3_regs
204 #define bq2752x_regs bq27510g3_regs
205 bq27500_regs[BQ27XXX_REG_MAX] = {
206 [BQ27XXX_REG_CTRL] = 0x00,
207 [BQ27XXX_REG_TEMP] = 0x06,
208 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
209 [BQ27XXX_REG_VOLT] = 0x08,
210 [BQ27XXX_REG_AI] = 0x14,
211 [BQ27XXX_REG_FLAGS] = 0x0a,
212 [BQ27XXX_REG_TTE] = 0x16,
213 [BQ27XXX_REG_TTF] = 0x18,
214 [BQ27XXX_REG_TTES] = 0x1c,
215 [BQ27XXX_REG_TTECP] = 0x26,
216 [BQ27XXX_REG_NAC] = 0x0c,
217 [BQ27XXX_REG_FCC] = 0x12,
218 [BQ27XXX_REG_CYCT] = 0x2a,
219 [BQ27XXX_REG_AE] = 0x22,
220 [BQ27XXX_REG_SOC] = 0x2c,
221 [BQ27XXX_REG_DCAP] = 0x3c,
222 [BQ27XXX_REG_AP] = 0x24,
223 BQ27XXX_DM_REG_ROWS,
224 },
225 #define bq27510g1_regs bq27500_regs
226 #define bq27510g2_regs bq27500_regs
227 bq27510g3_regs[BQ27XXX_REG_MAX] = {
228 [BQ27XXX_REG_CTRL] = 0x00,
229 [BQ27XXX_REG_TEMP] = 0x06,
230 [BQ27XXX_REG_INT_TEMP] = 0x28,
231 [BQ27XXX_REG_VOLT] = 0x08,
232 [BQ27XXX_REG_AI] = 0x14,
233 [BQ27XXX_REG_FLAGS] = 0x0a,
234 [BQ27XXX_REG_TTE] = 0x16,
235 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
236 [BQ27XXX_REG_TTES] = 0x1a,
237 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
238 [BQ27XXX_REG_NAC] = 0x0c,
239 [BQ27XXX_REG_FCC] = 0x12,
240 [BQ27XXX_REG_CYCT] = 0x1e,
241 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
242 [BQ27XXX_REG_SOC] = 0x20,
243 [BQ27XXX_REG_DCAP] = 0x2e,
244 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
245 BQ27XXX_DM_REG_ROWS,
246 },
247 bq27520g1_regs[BQ27XXX_REG_MAX] = {
248 [BQ27XXX_REG_CTRL] = 0x00,
249 [BQ27XXX_REG_TEMP] = 0x06,
250 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
251 [BQ27XXX_REG_VOLT] = 0x08,
252 [BQ27XXX_REG_AI] = 0x14,
253 [BQ27XXX_REG_FLAGS] = 0x0a,
254 [BQ27XXX_REG_TTE] = 0x16,
255 [BQ27XXX_REG_TTF] = 0x18,
256 [BQ27XXX_REG_TTES] = 0x1c,
257 [BQ27XXX_REG_TTECP] = 0x26,
258 [BQ27XXX_REG_NAC] = 0x0c,
259 [BQ27XXX_REG_FCC] = 0x12,
260 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
261 [BQ27XXX_REG_AE] = 0x22,
262 [BQ27XXX_REG_SOC] = 0x2c,
263 [BQ27XXX_REG_DCAP] = 0x3c,
264 [BQ27XXX_REG_AP] = 0x24,
265 BQ27XXX_DM_REG_ROWS,
266 },
267 bq27520g2_regs[BQ27XXX_REG_MAX] = {
268 [BQ27XXX_REG_CTRL] = 0x00,
269 [BQ27XXX_REG_TEMP] = 0x06,
270 [BQ27XXX_REG_INT_TEMP] = 0x36,
271 [BQ27XXX_REG_VOLT] = 0x08,
272 [BQ27XXX_REG_AI] = 0x14,
273 [BQ27XXX_REG_FLAGS] = 0x0a,
274 [BQ27XXX_REG_TTE] = 0x16,
275 [BQ27XXX_REG_TTF] = 0x18,
276 [BQ27XXX_REG_TTES] = 0x1c,
277 [BQ27XXX_REG_TTECP] = 0x26,
278 [BQ27XXX_REG_NAC] = 0x0c,
279 [BQ27XXX_REG_FCC] = 0x12,
280 [BQ27XXX_REG_CYCT] = 0x2a,
281 [BQ27XXX_REG_AE] = 0x22,
282 [BQ27XXX_REG_SOC] = 0x2c,
283 [BQ27XXX_REG_DCAP] = 0x3c,
284 [BQ27XXX_REG_AP] = 0x24,
285 BQ27XXX_DM_REG_ROWS,
286 },
287 bq27520g3_regs[BQ27XXX_REG_MAX] = {
288 [BQ27XXX_REG_CTRL] = 0x00,
289 [BQ27XXX_REG_TEMP] = 0x06,
290 [BQ27XXX_REG_INT_TEMP] = 0x36,
291 [BQ27XXX_REG_VOLT] = 0x08,
292 [BQ27XXX_REG_AI] = 0x14,
293 [BQ27XXX_REG_FLAGS] = 0x0a,
294 [BQ27XXX_REG_TTE] = 0x16,
295 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
296 [BQ27XXX_REG_TTES] = 0x1c,
297 [BQ27XXX_REG_TTECP] = 0x26,
298 [BQ27XXX_REG_NAC] = 0x0c,
299 [BQ27XXX_REG_FCC] = 0x12,
300 [BQ27XXX_REG_CYCT] = 0x2a,
301 [BQ27XXX_REG_AE] = 0x22,
302 [BQ27XXX_REG_SOC] = 0x2c,
303 [BQ27XXX_REG_DCAP] = 0x3c,
304 [BQ27XXX_REG_AP] = 0x24,
305 BQ27XXX_DM_REG_ROWS,
306 },
307 bq27520g4_regs[BQ27XXX_REG_MAX] = {
308 [BQ27XXX_REG_CTRL] = 0x00,
309 [BQ27XXX_REG_TEMP] = 0x06,
310 [BQ27XXX_REG_INT_TEMP] = 0x28,
311 [BQ27XXX_REG_VOLT] = 0x08,
312 [BQ27XXX_REG_AI] = 0x14,
313 [BQ27XXX_REG_FLAGS] = 0x0a,
314 [BQ27XXX_REG_TTE] = 0x16,
315 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
316 [BQ27XXX_REG_TTES] = 0x1c,
317 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
318 [BQ27XXX_REG_NAC] = 0x0c,
319 [BQ27XXX_REG_FCC] = 0x12,
320 [BQ27XXX_REG_CYCT] = 0x1e,
321 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
322 [BQ27XXX_REG_SOC] = 0x20,
323 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
324 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
325 BQ27XXX_DM_REG_ROWS,
326 },
327 bq27521_regs[BQ27XXX_REG_MAX] = {
328 [BQ27XXX_REG_CTRL] = 0x02,
329 [BQ27XXX_REG_TEMP] = 0x0a,
330 [BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
331 [BQ27XXX_REG_VOLT] = 0x0c,
332 [BQ27XXX_REG_AI] = 0x0e,
333 [BQ27XXX_REG_FLAGS] = 0x08,
334 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
335 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
336 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
337 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
338 [BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
339 [BQ27XXX_REG_FCC] = INVALID_REG_ADDR,
340 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
341 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
342 [BQ27XXX_REG_SOC] = INVALID_REG_ADDR,
343 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
344 [BQ27XXX_REG_AP] = INVALID_REG_ADDR,
345 [BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
346 [BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
347 [BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
348 [BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
349 [BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
350 },
351 bq27530_regs[BQ27XXX_REG_MAX] = {
352 [BQ27XXX_REG_CTRL] = 0x00,
353 [BQ27XXX_REG_TEMP] = 0x06,
354 [BQ27XXX_REG_INT_TEMP] = 0x32,
355 [BQ27XXX_REG_VOLT] = 0x08,
356 [BQ27XXX_REG_AI] = 0x14,
357 [BQ27XXX_REG_FLAGS] = 0x0a,
358 [BQ27XXX_REG_TTE] = 0x16,
359 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
360 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
361 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
362 [BQ27XXX_REG_NAC] = 0x0c,
363 [BQ27XXX_REG_FCC] = 0x12,
364 [BQ27XXX_REG_CYCT] = 0x2a,
365 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
366 [BQ27XXX_REG_SOC] = 0x2c,
367 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
368 [BQ27XXX_REG_AP] = 0x24,
369 BQ27XXX_DM_REG_ROWS,
370 },
371 #define bq27531_regs bq27530_regs
372 bq27541_regs[BQ27XXX_REG_MAX] = {
373 [BQ27XXX_REG_CTRL] = 0x00,
374 [BQ27XXX_REG_TEMP] = 0x06,
375 [BQ27XXX_REG_INT_TEMP] = 0x28,
376 [BQ27XXX_REG_VOLT] = 0x08,
377 [BQ27XXX_REG_AI] = 0x14,
378 [BQ27XXX_REG_FLAGS] = 0x0a,
379 [BQ27XXX_REG_TTE] = 0x16,
380 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
381 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
382 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
383 [BQ27XXX_REG_NAC] = 0x0c,
384 [BQ27XXX_REG_FCC] = 0x12,
385 [BQ27XXX_REG_CYCT] = 0x2a,
386 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
387 [BQ27XXX_REG_SOC] = 0x2c,
388 [BQ27XXX_REG_DCAP] = 0x3c,
389 [BQ27XXX_REG_AP] = 0x24,
390 BQ27XXX_DM_REG_ROWS,
391 },
392 #define bq27542_regs bq27541_regs
393 #define bq27546_regs bq27541_regs
394 #define bq27742_regs bq27541_regs
395 bq27545_regs[BQ27XXX_REG_MAX] = {
396 [BQ27XXX_REG_CTRL] = 0x00,
397 [BQ27XXX_REG_TEMP] = 0x06,
398 [BQ27XXX_REG_INT_TEMP] = 0x28,
399 [BQ27XXX_REG_VOLT] = 0x08,
400 [BQ27XXX_REG_AI] = 0x14,
401 [BQ27XXX_REG_FLAGS] = 0x0a,
402 [BQ27XXX_REG_TTE] = 0x16,
403 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
404 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
405 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
406 [BQ27XXX_REG_NAC] = 0x0c,
407 [BQ27XXX_REG_FCC] = 0x12,
408 [BQ27XXX_REG_CYCT] = 0x2a,
409 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
410 [BQ27XXX_REG_SOC] = 0x2c,
411 [BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
412 [BQ27XXX_REG_AP] = 0x24,
413 BQ27XXX_DM_REG_ROWS,
414 },
415 bq27421_regs[BQ27XXX_REG_MAX] = {
416 [BQ27XXX_REG_CTRL] = 0x00,
417 [BQ27XXX_REG_TEMP] = 0x02,
418 [BQ27XXX_REG_INT_TEMP] = 0x1e,
419 [BQ27XXX_REG_VOLT] = 0x04,
420 [BQ27XXX_REG_AI] = 0x10,
421 [BQ27XXX_REG_FLAGS] = 0x06,
422 [BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
423 [BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
424 [BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
425 [BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
426 [BQ27XXX_REG_NAC] = 0x08,
427 [BQ27XXX_REG_FCC] = 0x0e,
428 [BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
429 [BQ27XXX_REG_AE] = INVALID_REG_ADDR,
430 [BQ27XXX_REG_SOC] = 0x1c,
431 [BQ27XXX_REG_DCAP] = 0x3c,
432 [BQ27XXX_REG_AP] = 0x18,
433 BQ27XXX_DM_REG_ROWS,
434 };
435 #define bq27425_regs bq27421_regs
436 #define bq27426_regs bq27421_regs
437 #define bq27441_regs bq27421_regs
438 #define bq27621_regs bq27421_regs
439
440 static enum power_supply_property bq27000_props[] = {
441 POWER_SUPPLY_PROP_STATUS,
442 POWER_SUPPLY_PROP_PRESENT,
443 POWER_SUPPLY_PROP_VOLTAGE_NOW,
444 POWER_SUPPLY_PROP_CURRENT_NOW,
445 POWER_SUPPLY_PROP_CAPACITY,
446 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
447 POWER_SUPPLY_PROP_TEMP,
448 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
449 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
450 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
451 POWER_SUPPLY_PROP_TECHNOLOGY,
452 POWER_SUPPLY_PROP_CHARGE_FULL,
453 POWER_SUPPLY_PROP_CHARGE_NOW,
454 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
455 POWER_SUPPLY_PROP_CYCLE_COUNT,
456 POWER_SUPPLY_PROP_ENERGY_NOW,
457 POWER_SUPPLY_PROP_POWER_AVG,
458 POWER_SUPPLY_PROP_HEALTH,
459 POWER_SUPPLY_PROP_MANUFACTURER,
460 };
461
462 static enum power_supply_property bq27010_props[] = {
463 POWER_SUPPLY_PROP_STATUS,
464 POWER_SUPPLY_PROP_PRESENT,
465 POWER_SUPPLY_PROP_VOLTAGE_NOW,
466 POWER_SUPPLY_PROP_CURRENT_NOW,
467 POWER_SUPPLY_PROP_CAPACITY,
468 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
469 POWER_SUPPLY_PROP_TEMP,
470 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
471 POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
472 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
473 POWER_SUPPLY_PROP_TECHNOLOGY,
474 POWER_SUPPLY_PROP_CHARGE_FULL,
475 POWER_SUPPLY_PROP_CHARGE_NOW,
476 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
477 POWER_SUPPLY_PROP_CYCLE_COUNT,
478 POWER_SUPPLY_PROP_HEALTH,
479 POWER_SUPPLY_PROP_MANUFACTURER,
480 };
481
482 #define bq2750x_props bq27510g3_props
483 #define bq2751x_props bq27510g3_props
484 #define bq2752x_props bq27510g3_props
485
486 static enum power_supply_property bq27500_props[] = {
487 POWER_SUPPLY_PROP_STATUS,
488 POWER_SUPPLY_PROP_PRESENT,
489 POWER_SUPPLY_PROP_VOLTAGE_NOW,
490 POWER_SUPPLY_PROP_CURRENT_NOW,
491 POWER_SUPPLY_PROP_CAPACITY,
492 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
493 POWER_SUPPLY_PROP_TEMP,
494 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
495 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
496 POWER_SUPPLY_PROP_TECHNOLOGY,
497 POWER_SUPPLY_PROP_CHARGE_FULL,
498 POWER_SUPPLY_PROP_CHARGE_NOW,
499 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
500 POWER_SUPPLY_PROP_CYCLE_COUNT,
501 POWER_SUPPLY_PROP_ENERGY_NOW,
502 POWER_SUPPLY_PROP_POWER_AVG,
503 POWER_SUPPLY_PROP_HEALTH,
504 POWER_SUPPLY_PROP_MANUFACTURER,
505 };
506 #define bq27510g1_props bq27500_props
507 #define bq27510g2_props bq27500_props
508
509 static enum power_supply_property bq27510g3_props[] = {
510 POWER_SUPPLY_PROP_STATUS,
511 POWER_SUPPLY_PROP_PRESENT,
512 POWER_SUPPLY_PROP_VOLTAGE_NOW,
513 POWER_SUPPLY_PROP_CURRENT_NOW,
514 POWER_SUPPLY_PROP_CAPACITY,
515 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
516 POWER_SUPPLY_PROP_TEMP,
517 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
518 POWER_SUPPLY_PROP_TECHNOLOGY,
519 POWER_SUPPLY_PROP_CHARGE_FULL,
520 POWER_SUPPLY_PROP_CHARGE_NOW,
521 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
522 POWER_SUPPLY_PROP_CYCLE_COUNT,
523 POWER_SUPPLY_PROP_HEALTH,
524 POWER_SUPPLY_PROP_MANUFACTURER,
525 };
526
527 static enum power_supply_property bq27520g1_props[] = {
528 POWER_SUPPLY_PROP_STATUS,
529 POWER_SUPPLY_PROP_PRESENT,
530 POWER_SUPPLY_PROP_VOLTAGE_NOW,
531 POWER_SUPPLY_PROP_CURRENT_NOW,
532 POWER_SUPPLY_PROP_CAPACITY,
533 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
534 POWER_SUPPLY_PROP_TEMP,
535 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
536 POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
537 POWER_SUPPLY_PROP_TECHNOLOGY,
538 POWER_SUPPLY_PROP_CHARGE_FULL,
539 POWER_SUPPLY_PROP_CHARGE_NOW,
540 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
541 POWER_SUPPLY_PROP_ENERGY_NOW,
542 POWER_SUPPLY_PROP_POWER_AVG,
543 POWER_SUPPLY_PROP_HEALTH,
544 POWER_SUPPLY_PROP_MANUFACTURER,
545 };
546
547 #define bq27520g2_props bq27500_props
548
549 static enum power_supply_property bq27520g3_props[] = {
550 POWER_SUPPLY_PROP_STATUS,
551 POWER_SUPPLY_PROP_PRESENT,
552 POWER_SUPPLY_PROP_VOLTAGE_NOW,
553 POWER_SUPPLY_PROP_CURRENT_NOW,
554 POWER_SUPPLY_PROP_CAPACITY,
555 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
556 POWER_SUPPLY_PROP_TEMP,
557 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
558 POWER_SUPPLY_PROP_TECHNOLOGY,
559 POWER_SUPPLY_PROP_CHARGE_FULL,
560 POWER_SUPPLY_PROP_CHARGE_NOW,
561 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
562 POWER_SUPPLY_PROP_CYCLE_COUNT,
563 POWER_SUPPLY_PROP_ENERGY_NOW,
564 POWER_SUPPLY_PROP_POWER_AVG,
565 POWER_SUPPLY_PROP_HEALTH,
566 POWER_SUPPLY_PROP_MANUFACTURER,
567 };
568
569 static enum power_supply_property bq27520g4_props[] = {
570 POWER_SUPPLY_PROP_STATUS,
571 POWER_SUPPLY_PROP_PRESENT,
572 POWER_SUPPLY_PROP_VOLTAGE_NOW,
573 POWER_SUPPLY_PROP_CURRENT_NOW,
574 POWER_SUPPLY_PROP_CAPACITY,
575 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
576 POWER_SUPPLY_PROP_TEMP,
577 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
578 POWER_SUPPLY_PROP_TECHNOLOGY,
579 POWER_SUPPLY_PROP_CHARGE_FULL,
580 POWER_SUPPLY_PROP_CHARGE_NOW,
581 POWER_SUPPLY_PROP_CYCLE_COUNT,
582 POWER_SUPPLY_PROP_HEALTH,
583 POWER_SUPPLY_PROP_MANUFACTURER,
584 };
585
586 static enum power_supply_property bq27521_props[] = {
587 POWER_SUPPLY_PROP_STATUS,
588 POWER_SUPPLY_PROP_PRESENT,
589 POWER_SUPPLY_PROP_VOLTAGE_NOW,
590 POWER_SUPPLY_PROP_CURRENT_NOW,
591 POWER_SUPPLY_PROP_TEMP,
592 POWER_SUPPLY_PROP_TECHNOLOGY,
593 };
594
595 static enum power_supply_property bq27530_props[] = {
596 POWER_SUPPLY_PROP_STATUS,
597 POWER_SUPPLY_PROP_PRESENT,
598 POWER_SUPPLY_PROP_VOLTAGE_NOW,
599 POWER_SUPPLY_PROP_CURRENT_NOW,
600 POWER_SUPPLY_PROP_CAPACITY,
601 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
602 POWER_SUPPLY_PROP_TEMP,
603 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
604 POWER_SUPPLY_PROP_TECHNOLOGY,
605 POWER_SUPPLY_PROP_CHARGE_FULL,
606 POWER_SUPPLY_PROP_CHARGE_NOW,
607 POWER_SUPPLY_PROP_POWER_AVG,
608 POWER_SUPPLY_PROP_HEALTH,
609 POWER_SUPPLY_PROP_CYCLE_COUNT,
610 POWER_SUPPLY_PROP_MANUFACTURER,
611 };
612 #define bq27531_props bq27530_props
613
614 static enum power_supply_property bq27541_props[] = {
615 POWER_SUPPLY_PROP_STATUS,
616 POWER_SUPPLY_PROP_PRESENT,
617 POWER_SUPPLY_PROP_VOLTAGE_NOW,
618 POWER_SUPPLY_PROP_CURRENT_NOW,
619 POWER_SUPPLY_PROP_CAPACITY,
620 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
621 POWER_SUPPLY_PROP_TEMP,
622 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
623 POWER_SUPPLY_PROP_TECHNOLOGY,
624 POWER_SUPPLY_PROP_CHARGE_FULL,
625 POWER_SUPPLY_PROP_CHARGE_NOW,
626 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
627 POWER_SUPPLY_PROP_CYCLE_COUNT,
628 POWER_SUPPLY_PROP_POWER_AVG,
629 POWER_SUPPLY_PROP_HEALTH,
630 POWER_SUPPLY_PROP_MANUFACTURER,
631 };
632 #define bq27542_props bq27541_props
633 #define bq27546_props bq27541_props
634 #define bq27742_props bq27541_props
635
636 static enum power_supply_property bq27545_props[] = {
637 POWER_SUPPLY_PROP_STATUS,
638 POWER_SUPPLY_PROP_PRESENT,
639 POWER_SUPPLY_PROP_VOLTAGE_NOW,
640 POWER_SUPPLY_PROP_CURRENT_NOW,
641 POWER_SUPPLY_PROP_CAPACITY,
642 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
643 POWER_SUPPLY_PROP_TEMP,
644 POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
645 POWER_SUPPLY_PROP_TECHNOLOGY,
646 POWER_SUPPLY_PROP_CHARGE_FULL,
647 POWER_SUPPLY_PROP_CHARGE_NOW,
648 POWER_SUPPLY_PROP_HEALTH,
649 POWER_SUPPLY_PROP_CYCLE_COUNT,
650 POWER_SUPPLY_PROP_POWER_AVG,
651 POWER_SUPPLY_PROP_MANUFACTURER,
652 };
653
654 static enum power_supply_property bq27421_props[] = {
655 POWER_SUPPLY_PROP_STATUS,
656 POWER_SUPPLY_PROP_PRESENT,
657 POWER_SUPPLY_PROP_VOLTAGE_NOW,
658 POWER_SUPPLY_PROP_CURRENT_NOW,
659 POWER_SUPPLY_PROP_CAPACITY,
660 POWER_SUPPLY_PROP_CAPACITY_LEVEL,
661 POWER_SUPPLY_PROP_TEMP,
662 POWER_SUPPLY_PROP_TECHNOLOGY,
663 POWER_SUPPLY_PROP_CHARGE_FULL,
664 POWER_SUPPLY_PROP_CHARGE_NOW,
665 POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
666 POWER_SUPPLY_PROP_MANUFACTURER,
667 };
668 #define bq27425_props bq27421_props
669 #define bq27426_props bq27421_props
670 #define bq27441_props bq27421_props
671 #define bq27621_props bq27421_props
672
673 struct bq27xxx_dm_reg {
674 u8 subclass_id;
675 u8 offset;
676 u8 bytes;
677 u16 min, max;
678 };
679
680 enum bq27xxx_dm_reg_id {
681 BQ27XXX_DM_DESIGN_CAPACITY = 0,
682 BQ27XXX_DM_DESIGN_ENERGY,
683 BQ27XXX_DM_TERMINATE_VOLTAGE,
684 };
685
686 #define bq27000_dm_regs 0
687 #define bq27010_dm_regs 0
688 #define bq2750x_dm_regs 0
689 #define bq2751x_dm_regs 0
690 #define bq2752x_dm_regs 0
691
692 #if 0 /* not yet tested */
693 static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
694 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 10, 2, 0, 65535 },
695 [BQ27XXX_DM_DESIGN_ENERGY] = { }, /* missing on chip */
696 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 },
697 };
698 #else
699 #define bq27500_dm_regs 0
700 #endif
701
702 /* todo create data memory definitions from datasheets and test on chips */
703 #define bq27510g1_dm_regs 0
704 #define bq27510g2_dm_regs 0
705 #define bq27510g3_dm_regs 0
706 #define bq27520g1_dm_regs 0
707 #define bq27520g2_dm_regs 0
708 #define bq27520g3_dm_regs 0
709 #define bq27520g4_dm_regs 0
710 #define bq27521_dm_regs 0
711 #define bq27530_dm_regs 0
712 #define bq27531_dm_regs 0
713 #define bq27541_dm_regs 0
714 #define bq27542_dm_regs 0
715 #define bq27546_dm_regs 0
716 #define bq27742_dm_regs 0
717
718 #if 0 /* not yet tested */
719 static struct bq27xxx_dm_reg bq27545_dm_regs[] = {
720 [BQ27XXX_DM_DESIGN_CAPACITY] = { 48, 23, 2, 0, 32767 },
721 [BQ27XXX_DM_DESIGN_ENERGY] = { 48, 25, 2, 0, 32767 },
722 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800, 3700 },
723 };
724 #else
725 #define bq27545_dm_regs 0
726 #endif
727
728 static struct bq27xxx_dm_reg bq27421_dm_regs[] = {
729 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 10, 2, 0, 8000 },
730 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 12, 2, 0, 32767 },
731 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500, 3700 },
732 };
733
734 static struct bq27xxx_dm_reg bq27425_dm_regs[] = {
735 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 12, 2, 0, 32767 },
736 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 14, 2, 0, 32767 },
737 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800, 3700 },
738 };
739
740 static struct bq27xxx_dm_reg bq27426_dm_regs[] = {
741 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 6, 2, 0, 8000 },
742 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 8, 2, 0, 32767 },
743 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500, 3700 },
744 };
745
746 #if 0 /* not yet tested */
747 #define bq27441_dm_regs bq27421_dm_regs
748 #else
749 #define bq27441_dm_regs 0
750 #endif
751
752 #if 0 /* not yet tested */
753 static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
754 [BQ27XXX_DM_DESIGN_CAPACITY] = { 82, 3, 2, 0, 8000 },
755 [BQ27XXX_DM_DESIGN_ENERGY] = { 82, 5, 2, 0, 32767 },
756 [BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500, 3700 },
757 };
758 #else
759 #define bq27621_dm_regs 0
760 #endif
761
762 #define BQ27XXX_O_ZERO 0x00000001
763 #define BQ27XXX_O_OTDC 0x00000002 /* has OTC/OTD overtemperature flags */
764 #define BQ27XXX_O_UTOT 0x00000004 /* has OT overtemperature flag */
765 #define BQ27XXX_O_CFGUP 0x00000008
766 #define BQ27XXX_O_RAM 0x00000010
767
768 #define BQ27XXX_DATA(ref, key, opt) { \
769 .opts = (opt), \
770 .unseal_key = key, \
771 .regs = ref##_regs, \
772 .dm_regs = ref##_dm_regs, \
773 .props = ref##_props, \
774 .props_size = ARRAY_SIZE(ref##_props) }
775
776 static struct {
777 u32 opts;
778 u32 unseal_key;
779 u8 *regs;
780 struct bq27xxx_dm_reg *dm_regs;
781 enum power_supply_property *props;
782 size_t props_size;
783 } bq27xxx_chip_data[] = {
784 [BQ27000] = BQ27XXX_DATA(bq27000, 0 , BQ27XXX_O_ZERO),
785 [BQ27010] = BQ27XXX_DATA(bq27010, 0 , BQ27XXX_O_ZERO),
786 [BQ2750X] = BQ27XXX_DATA(bq2750x, 0 , BQ27XXX_O_OTDC),
787 [BQ2751X] = BQ27XXX_DATA(bq2751x, 0 , BQ27XXX_O_OTDC),
788 [BQ2752X] = BQ27XXX_DATA(bq2752x, 0 , BQ27XXX_O_OTDC),
789 [BQ27500] = BQ27XXX_DATA(bq27500, 0x04143672, BQ27XXX_O_OTDC),
790 [BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0 , BQ27XXX_O_OTDC),
791 [BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0 , BQ27XXX_O_OTDC),
792 [BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0 , BQ27XXX_O_OTDC),
793 [BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0 , BQ27XXX_O_OTDC),
794 [BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0 , BQ27XXX_O_OTDC),
795 [BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0 , BQ27XXX_O_OTDC),
796 [BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0 , BQ27XXX_O_OTDC),
797 [BQ27521] = BQ27XXX_DATA(bq27521, 0 , 0),
798 [BQ27530] = BQ27XXX_DATA(bq27530, 0 , BQ27XXX_O_UTOT),
799 [BQ27531] = BQ27XXX_DATA(bq27531, 0 , BQ27XXX_O_UTOT),
800 [BQ27541] = BQ27XXX_DATA(bq27541, 0 , BQ27XXX_O_OTDC),
801 [BQ27542] = BQ27XXX_DATA(bq27542, 0 , BQ27XXX_O_OTDC),
802 [BQ27546] = BQ27XXX_DATA(bq27546, 0 , BQ27XXX_O_OTDC),
803 [BQ27742] = BQ27XXX_DATA(bq27742, 0 , BQ27XXX_O_OTDC),
804 [BQ27545] = BQ27XXX_DATA(bq27545, 0x04143672, BQ27XXX_O_OTDC),
805 [BQ27421] = BQ27XXX_DATA(bq27421, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
806 [BQ27425] = BQ27XXX_DATA(bq27425, 0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP),
807 [BQ27426] = BQ27XXX_DATA(bq27426, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
808 [BQ27441] = BQ27XXX_DATA(bq27441, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
809 [BQ27621] = BQ27XXX_DATA(bq27621, 0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
810 };
811
812 static DEFINE_MUTEX(bq27xxx_list_lock);
813 static LIST_HEAD(bq27xxx_battery_devices);
814
815 #define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500)
816
817 #define BQ27XXX_DM_SZ 32
818
819 /**
820 * struct bq27xxx_dm_buf - chip data memory buffer
821 * @class: data memory subclass_id
822 * @block: data memory block number
823 * @data: data from/for the block
824 * @has_data: true if data has been filled by read
825 * @dirty: true if data has changed since last read/write
826 *
827 * Encapsulates info required to manage chip data memory blocks.
828 */
829 struct bq27xxx_dm_buf {
830 u8 class;
831 u8 block;
832 u8 data[BQ27XXX_DM_SZ];
833 bool has_data, dirty;
834 };
835
836 #define BQ27XXX_DM_BUF(di, i) { \
837 .class = (di)->dm_regs[i].subclass_id, \
838 .block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
839 }
840
bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf * buf,struct bq27xxx_dm_reg * reg)841 static inline u16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf,
842 struct bq27xxx_dm_reg *reg)
843 {
844 if (buf->class == reg->subclass_id &&
845 buf->block == reg->offset / BQ27XXX_DM_SZ)
846 return (u16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
847
848 return NULL;
849 }
850
851 static const char * const bq27xxx_dm_reg_name[] = {
852 [BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
853 [BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
854 [BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
855 };
856
857
858 static bool bq27xxx_dt_to_nvm = true;
859 module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444);
860 MODULE_PARM_DESC(dt_monitored_battery_updates_nvm,
861 "Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
862 "Users must set this =0 when installing a different type of battery!\n"
863 "Default is =1."
864 #ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
865 "\nSetting this affects future kernel updates, not the current configuration."
866 #endif
867 );
868
poll_interval_param_set(const char * val,const struct kernel_param * kp)869 static int poll_interval_param_set(const char *val, const struct kernel_param *kp)
870 {
871 struct bq27xxx_device_info *di;
872 unsigned int prev_val = *(unsigned int *) kp->arg;
873 int ret;
874
875 ret = param_set_uint(val, kp);
876 if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
877 return ret;
878
879 mutex_lock(&bq27xxx_list_lock);
880 list_for_each_entry(di, &bq27xxx_battery_devices, list) {
881 cancel_delayed_work_sync(&di->work);
882 schedule_delayed_work(&di->work, 0);
883 }
884 mutex_unlock(&bq27xxx_list_lock);
885
886 return ret;
887 }
888
889 static const struct kernel_param_ops param_ops_poll_interval = {
890 .get = param_get_uint,
891 .set = poll_interval_param_set,
892 };
893
894 static unsigned int poll_interval = 360;
895 module_param_cb(poll_interval, ¶m_ops_poll_interval, &poll_interval, 0644);
896 MODULE_PARM_DESC(poll_interval,
897 "battery poll interval in seconds - 0 disables polling");
898
899 /*
900 * Common code for BQ27xxx devices
901 */
902
bq27xxx_read(struct bq27xxx_device_info * di,int reg_index,bool single)903 static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index,
904 bool single)
905 {
906 int ret;
907
908 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
909 return -EINVAL;
910
911 ret = di->bus.read(di, di->regs[reg_index], single);
912 if (ret < 0)
913 dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
914 di->regs[reg_index], reg_index);
915
916 return ret;
917 }
918
bq27xxx_write(struct bq27xxx_device_info * di,int reg_index,u16 value,bool single)919 static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index,
920 u16 value, bool single)
921 {
922 int ret;
923
924 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
925 return -EINVAL;
926
927 if (!di->bus.write)
928 return -EPERM;
929
930 ret = di->bus.write(di, di->regs[reg_index], value, single);
931 if (ret < 0)
932 dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
933 di->regs[reg_index], reg_index);
934
935 return ret;
936 }
937
bq27xxx_read_block(struct bq27xxx_device_info * di,int reg_index,u8 * data,int len)938 static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index,
939 u8 *data, int len)
940 {
941 int ret;
942
943 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
944 return -EINVAL;
945
946 if (!di->bus.read_bulk)
947 return -EPERM;
948
949 ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
950 if (ret < 0)
951 dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
952 di->regs[reg_index], reg_index);
953
954 return ret;
955 }
956
bq27xxx_write_block(struct bq27xxx_device_info * di,int reg_index,u8 * data,int len)957 static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index,
958 u8 *data, int len)
959 {
960 int ret;
961
962 if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
963 return -EINVAL;
964
965 if (!di->bus.write_bulk)
966 return -EPERM;
967
968 ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
969 if (ret < 0)
970 dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
971 di->regs[reg_index], reg_index);
972
973 return ret;
974 }
975
bq27xxx_battery_seal(struct bq27xxx_device_info * di)976 static int bq27xxx_battery_seal(struct bq27xxx_device_info *di)
977 {
978 int ret;
979
980 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false);
981 if (ret < 0) {
982 dev_err(di->dev, "bus error on seal: %d\n", ret);
983 return ret;
984 }
985
986 return 0;
987 }
988
bq27xxx_battery_unseal(struct bq27xxx_device_info * di)989 static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di)
990 {
991 int ret;
992
993 if (di->unseal_key == 0) {
994 dev_err(di->dev, "unseal failed due to missing key\n");
995 return -EINVAL;
996 }
997
998 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
999 if (ret < 0)
1000 goto out;
1001
1002 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
1003 if (ret < 0)
1004 goto out;
1005
1006 return 0;
1007
1008 out:
1009 dev_err(di->dev, "bus error on unseal: %d\n", ret);
1010 return ret;
1011 }
1012
bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf * buf)1013 static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf)
1014 {
1015 u16 sum = 0;
1016 int i;
1017
1018 for (i = 0; i < BQ27XXX_DM_SZ; i++)
1019 sum += buf->data[i];
1020 sum &= 0xff;
1021
1022 return 0xff - sum;
1023 }
1024
bq27xxx_battery_read_dm_block(struct bq27xxx_device_info * di,struct bq27xxx_dm_buf * buf)1025 static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di,
1026 struct bq27xxx_dm_buf *buf)
1027 {
1028 int ret;
1029
1030 buf->has_data = false;
1031
1032 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1033 if (ret < 0)
1034 goto out;
1035
1036 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1037 if (ret < 0)
1038 goto out;
1039
1040 BQ27XXX_MSLEEP(1);
1041
1042 ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1043 if (ret < 0)
1044 goto out;
1045
1046 ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true);
1047 if (ret < 0)
1048 goto out;
1049
1050 if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) {
1051 ret = -EINVAL;
1052 goto out;
1053 }
1054
1055 buf->has_data = true;
1056 buf->dirty = false;
1057
1058 return 0;
1059
1060 out:
1061 dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
1062 return ret;
1063 }
1064
bq27xxx_battery_update_dm_block(struct bq27xxx_device_info * di,struct bq27xxx_dm_buf * buf,enum bq27xxx_dm_reg_id reg_id,unsigned int val)1065 static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di,
1066 struct bq27xxx_dm_buf *buf,
1067 enum bq27xxx_dm_reg_id reg_id,
1068 unsigned int val)
1069 {
1070 struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
1071 const char *str = bq27xxx_dm_reg_name[reg_id];
1072 u16 *prev = bq27xxx_dm_reg_ptr(buf, reg);
1073
1074 if (prev == NULL) {
1075 dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
1076 return;
1077 }
1078
1079 if (reg->bytes != 2) {
1080 dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
1081 return;
1082 }
1083
1084 if (!buf->has_data)
1085 return;
1086
1087 if (be16_to_cpup(prev) == val) {
1088 dev_info(di->dev, "%s has %u\n", str, val);
1089 return;
1090 }
1091
1092 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1093 if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
1094 #else
1095 if (!(di->opts & BQ27XXX_O_RAM)) {
1096 #endif
1097 /* devicetree and NVM differ; defer to NVM */
1098 dev_warn(di->dev, "%s has %u; update to %u disallowed "
1099 #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1100 "by dt_monitored_battery_updates_nvm=0"
1101 #else
1102 "for flash/NVM data memory"
1103 #endif
1104 "\n", str, be16_to_cpup(prev), val);
1105 return;
1106 }
1107
1108 dev_info(di->dev, "update %s to %u\n", str, val);
1109
1110 *prev = cpu_to_be16(val);
1111 buf->dirty = true;
1112 }
1113
1114 static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active)
1115 {
1116 const int limit = 100;
1117 u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET;
1118 int ret, try = limit;
1119
1120 ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false);
1121 if (ret < 0)
1122 return ret;
1123
1124 do {
1125 BQ27XXX_MSLEEP(25);
1126 ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false);
1127 if (ret < 0)
1128 return ret;
1129 } while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
1130
1131 if (!try && di->chip != BQ27425) { // 425 has a bug
1132 dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
1133 return -EINVAL;
1134 }
1135
1136 if (limit - try > 3)
1137 dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
1138
1139 return 0;
1140 }
1141
1142 static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di)
1143 {
1144 int ret = bq27xxx_battery_cfgupdate_priv(di, true);
1145 if (ret < 0 && ret != -EINVAL)
1146 dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
1147
1148 return ret;
1149 }
1150
1151 static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di)
1152 {
1153 int ret = bq27xxx_battery_cfgupdate_priv(di, false);
1154 if (ret < 0 && ret != -EINVAL)
1155 dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
1156
1157 return ret;
1158 }
1159
1160 static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di,
1161 struct bq27xxx_dm_buf *buf)
1162 {
1163 bool cfgup = di->opts & BQ27XXX_O_CFGUP;
1164 int ret;
1165
1166 if (!buf->dirty)
1167 return 0;
1168
1169 if (cfgup) {
1170 ret = bq27xxx_battery_set_cfgupdate(di);
1171 if (ret < 0)
1172 return ret;
1173 }
1174
1175 ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true);
1176 if (ret < 0)
1177 goto out;
1178
1179 ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1180 if (ret < 0)
1181 goto out;
1182
1183 ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1184 if (ret < 0)
1185 goto out;
1186
1187 BQ27XXX_MSLEEP(1);
1188
1189 ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1190 if (ret < 0)
1191 goto out;
1192
1193 ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM,
1194 bq27xxx_battery_checksum_dm_block(buf), true);
1195 if (ret < 0)
1196 goto out;
1197
1198 /* DO NOT read BQ27XXX_DM_CKSUM here to verify it! That may cause NVM
1199 * corruption on the '425 chip (and perhaps others), which can damage
1200 * the chip.
1201 */
1202
1203 if (cfgup) {
1204 BQ27XXX_MSLEEP(1);
1205 ret = bq27xxx_battery_soft_reset(di);
1206 if (ret < 0)
1207 return ret;
1208 } else {
1209 BQ27XXX_MSLEEP(100); /* flash DM updates in <100ms */
1210 }
1211
1212 buf->dirty = false;
1213
1214 return 0;
1215
1216 out:
1217 if (cfgup)
1218 bq27xxx_battery_soft_reset(di);
1219
1220 dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
1221 return ret;
1222 }
1223
1224 static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di,
1225 struct power_supply_battery_info *info)
1226 {
1227 struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY);
1228 struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE);
1229 bool updated;
1230
1231 if (bq27xxx_battery_unseal(di) < 0)
1232 return;
1233
1234 if (info->charge_full_design_uah != -EINVAL &&
1235 info->energy_full_design_uwh != -EINVAL) {
1236 bq27xxx_battery_read_dm_block(di, &bd);
1237 /* assume design energy & capacity are in same block */
1238 bq27xxx_battery_update_dm_block(di, &bd,
1239 BQ27XXX_DM_DESIGN_CAPACITY,
1240 info->charge_full_design_uah / 1000);
1241 bq27xxx_battery_update_dm_block(di, &bd,
1242 BQ27XXX_DM_DESIGN_ENERGY,
1243 info->energy_full_design_uwh / 1000);
1244 }
1245
1246 if (info->voltage_min_design_uv != -EINVAL) {
1247 bool same = bd.class == bt.class && bd.block == bt.block;
1248 if (!same)
1249 bq27xxx_battery_read_dm_block(di, &bt);
1250 bq27xxx_battery_update_dm_block(di, same ? &bd : &bt,
1251 BQ27XXX_DM_TERMINATE_VOLTAGE,
1252 info->voltage_min_design_uv / 1000);
1253 }
1254
1255 updated = bd.dirty || bt.dirty;
1256
1257 bq27xxx_battery_write_dm_block(di, &bd);
1258 bq27xxx_battery_write_dm_block(di, &bt);
1259
1260 bq27xxx_battery_seal(di);
1261
1262 if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
1263 bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false);
1264 BQ27XXX_MSLEEP(300); /* reset time is not documented */
1265 }
1266 /* assume bq27xxx_battery_update() is called hereafter */
1267 }
1268
1269 static void bq27xxx_battery_settings(struct bq27xxx_device_info *di)
1270 {
1271 struct power_supply_battery_info info = {};
1272 unsigned int min, max;
1273
1274 if (power_supply_get_battery_info(di->bat, &info) < 0)
1275 return;
1276
1277 if (!di->dm_regs) {
1278 dev_warn(di->dev, "data memory update not supported for chip\n");
1279 return;
1280 }
1281
1282 if (info.energy_full_design_uwh != info.charge_full_design_uah) {
1283 if (info.energy_full_design_uwh == -EINVAL)
1284 dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
1285 else if (info.charge_full_design_uah == -EINVAL)
1286 dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
1287 }
1288
1289 /* assume min == 0 */
1290 max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
1291 if (info.energy_full_design_uwh > max * 1000) {
1292 dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
1293 info.energy_full_design_uwh);
1294 info.energy_full_design_uwh = -EINVAL;
1295 }
1296
1297 /* assume min == 0 */
1298 max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
1299 if (info.charge_full_design_uah > max * 1000) {
1300 dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
1301 info.charge_full_design_uah);
1302 info.charge_full_design_uah = -EINVAL;
1303 }
1304
1305 min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
1306 max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
1307 if ((info.voltage_min_design_uv < min * 1000 ||
1308 info.voltage_min_design_uv > max * 1000) &&
1309 info.voltage_min_design_uv != -EINVAL) {
1310 dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
1311 info.voltage_min_design_uv);
1312 info.voltage_min_design_uv = -EINVAL;
1313 }
1314
1315 if ((info.energy_full_design_uwh != -EINVAL &&
1316 info.charge_full_design_uah != -EINVAL) ||
1317 info.voltage_min_design_uv != -EINVAL)
1318 bq27xxx_battery_set_config(di, &info);
1319 }
1320
1321 /*
1322 * Return the battery State-of-Charge
1323 * Or < 0 if something fails.
1324 */
1325 static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di)
1326 {
1327 int soc;
1328
1329 if (di->opts & BQ27XXX_O_ZERO)
1330 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true);
1331 else
1332 soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false);
1333
1334 if (soc < 0)
1335 dev_dbg(di->dev, "error reading State-of-Charge\n");
1336
1337 return soc;
1338 }
1339
1340 /*
1341 * Return a battery charge value in µAh
1342 * Or < 0 if something fails.
1343 */
1344 static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg)
1345 {
1346 int charge;
1347
1348 charge = bq27xxx_read(di, reg, false);
1349 if (charge < 0) {
1350 dev_dbg(di->dev, "error reading charge register %02x: %d\n",
1351 reg, charge);
1352 return charge;
1353 }
1354
1355 if (di->opts & BQ27XXX_O_ZERO)
1356 charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1357 else
1358 charge *= 1000;
1359
1360 return charge;
1361 }
1362
1363 /*
1364 * Return the battery Nominal available capacity in µAh
1365 * Or < 0 if something fails.
1366 */
1367 static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di)
1368 {
1369 int flags;
1370
1371 if (di->opts & BQ27XXX_O_ZERO) {
1372 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1373 if (flags >= 0 && (flags & BQ27000_FLAG_CI))
1374 return -ENODATA;
1375 }
1376
1377 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC);
1378 }
1379
1380 /*
1381 * Return the battery Full Charge Capacity in µAh
1382 * Or < 0 if something fails.
1383 */
1384 static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di)
1385 {
1386 return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC);
1387 }
1388
1389 /*
1390 * Return the Design Capacity in µAh
1391 * Or < 0 if something fails.
1392 */
1393 static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di)
1394 {
1395 int dcap;
1396
1397 if (di->opts & BQ27XXX_O_ZERO)
1398 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true);
1399 else
1400 dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false);
1401
1402 if (dcap < 0) {
1403 dev_dbg(di->dev, "error reading initial last measured discharge\n");
1404 return dcap;
1405 }
1406
1407 if (di->opts & BQ27XXX_O_ZERO)
1408 dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1409 else
1410 dcap *= 1000;
1411
1412 return dcap;
1413 }
1414
1415 /*
1416 * Return the battery Available energy in µWh
1417 * Or < 0 if something fails.
1418 */
1419 static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di)
1420 {
1421 int ae;
1422
1423 ae = bq27xxx_read(di, BQ27XXX_REG_AE, false);
1424 if (ae < 0) {
1425 dev_dbg(di->dev, "error reading available energy\n");
1426 return ae;
1427 }
1428
1429 if (di->opts & BQ27XXX_O_ZERO)
1430 ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS;
1431 else
1432 ae *= 1000;
1433
1434 return ae;
1435 }
1436
1437 /*
1438 * Return the battery temperature in tenths of degree Kelvin
1439 * Or < 0 if something fails.
1440 */
1441 static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di)
1442 {
1443 int temp;
1444
1445 temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false);
1446 if (temp < 0) {
1447 dev_err(di->dev, "error reading temperature\n");
1448 return temp;
1449 }
1450
1451 if (di->opts & BQ27XXX_O_ZERO)
1452 temp = 5 * temp / 2;
1453
1454 return temp;
1455 }
1456
1457 /*
1458 * Return the battery Cycle count total
1459 * Or < 0 if something fails.
1460 */
1461 static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di)
1462 {
1463 int cyct;
1464
1465 cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false);
1466 if (cyct < 0)
1467 dev_err(di->dev, "error reading cycle count total\n");
1468
1469 return cyct;
1470 }
1471
1472 /*
1473 * Read a time register.
1474 * Return < 0 if something fails.
1475 */
1476 static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg)
1477 {
1478 int tval;
1479
1480 tval = bq27xxx_read(di, reg, false);
1481 if (tval < 0) {
1482 dev_dbg(di->dev, "error reading time register %02x: %d\n",
1483 reg, tval);
1484 return tval;
1485 }
1486
1487 if (tval == 65535)
1488 return -ENODATA;
1489
1490 return tval * 60;
1491 }
1492
1493 /*
1494 * Read an average power register.
1495 * Return < 0 if something fails.
1496 */
1497 static int bq27xxx_battery_read_pwr_avg(struct bq27xxx_device_info *di)
1498 {
1499 int tval;
1500
1501 tval = bq27xxx_read(di, BQ27XXX_REG_AP, false);
1502 if (tval < 0) {
1503 dev_err(di->dev, "error reading average power register %02x: %d\n",
1504 BQ27XXX_REG_AP, tval);
1505 return tval;
1506 }
1507
1508 if (di->opts & BQ27XXX_O_ZERO)
1509 return (tval * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
1510 else
1511 return tval;
1512 }
1513
1514 /*
1515 * Returns true if a battery over temperature condition is detected
1516 */
1517 static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags)
1518 {
1519 if (di->opts & BQ27XXX_O_OTDC)
1520 return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD);
1521 if (di->opts & BQ27XXX_O_UTOT)
1522 return flags & BQ27XXX_FLAG_OT;
1523
1524 return false;
1525 }
1526
1527 /*
1528 * Returns true if a battery under temperature condition is detected
1529 */
1530 static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags)
1531 {
1532 if (di->opts & BQ27XXX_O_UTOT)
1533 return flags & BQ27XXX_FLAG_UT;
1534
1535 return false;
1536 }
1537
1538 /*
1539 * Returns true if a low state of charge condition is detected
1540 */
1541 static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags)
1542 {
1543 if (di->opts & BQ27XXX_O_ZERO)
1544 return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF);
1545 else
1546 return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF);
1547 }
1548
1549 /*
1550 * Read flag register.
1551 * Return < 0 if something fails.
1552 */
1553 static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di)
1554 {
1555 int flags;
1556 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1557
1558 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1559 if (flags < 0) {
1560 dev_err(di->dev, "error reading flag register:%d\n", flags);
1561 return flags;
1562 }
1563
1564 /* Unlikely but important to return first */
1565 if (unlikely(bq27xxx_battery_overtemp(di, flags)))
1566 return POWER_SUPPLY_HEALTH_OVERHEAT;
1567 if (unlikely(bq27xxx_battery_undertemp(di, flags)))
1568 return POWER_SUPPLY_HEALTH_COLD;
1569 if (unlikely(bq27xxx_battery_dead(di, flags)))
1570 return POWER_SUPPLY_HEALTH_DEAD;
1571
1572 return POWER_SUPPLY_HEALTH_GOOD;
1573 }
1574
1575 void bq27xxx_battery_update(struct bq27xxx_device_info *di)
1576 {
1577 struct bq27xxx_reg_cache cache = {0, };
1578 bool has_ci_flag = di->opts & BQ27XXX_O_ZERO;
1579 bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1580
1581 cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1582 if ((cache.flags & 0xff) == 0xff)
1583 cache.flags = -1; /* read error */
1584 if (cache.flags >= 0) {
1585 cache.temperature = bq27xxx_battery_read_temperature(di);
1586 if (has_ci_flag && (cache.flags & BQ27000_FLAG_CI)) {
1587 dev_info_once(di->dev, "battery is not calibrated! ignoring capacity values\n");
1588 cache.capacity = -ENODATA;
1589 cache.energy = -ENODATA;
1590 cache.time_to_empty = -ENODATA;
1591 cache.time_to_empty_avg = -ENODATA;
1592 cache.time_to_full = -ENODATA;
1593 cache.charge_full = -ENODATA;
1594 cache.health = -ENODATA;
1595 } else {
1596 if (di->regs[BQ27XXX_REG_TTE] != INVALID_REG_ADDR)
1597 cache.time_to_empty = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE);
1598 if (di->regs[BQ27XXX_REG_TTECP] != INVALID_REG_ADDR)
1599 cache.time_to_empty_avg = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP);
1600 if (di->regs[BQ27XXX_REG_TTF] != INVALID_REG_ADDR)
1601 cache.time_to_full = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF);
1602 cache.charge_full = bq27xxx_battery_read_fcc(di);
1603 cache.capacity = bq27xxx_battery_read_soc(di);
1604 if (di->regs[BQ27XXX_REG_AE] != INVALID_REG_ADDR)
1605 cache.energy = bq27xxx_battery_read_energy(di);
1606 cache.health = bq27xxx_battery_read_health(di);
1607 }
1608 if (di->regs[BQ27XXX_REG_CYCT] != INVALID_REG_ADDR)
1609 cache.cycle_count = bq27xxx_battery_read_cyct(di);
1610 if (di->regs[BQ27XXX_REG_AP] != INVALID_REG_ADDR)
1611 cache.power_avg = bq27xxx_battery_read_pwr_avg(di);
1612
1613 /* We only have to read charge design full once */
1614 if (di->charge_design_full <= 0)
1615 di->charge_design_full = bq27xxx_battery_read_dcap(di);
1616 }
1617
1618 if (di->cache.capacity != cache.capacity)
1619 power_supply_changed(di->bat);
1620
1621 if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
1622 di->cache = cache;
1623
1624 di->last_update = jiffies;
1625 }
1626 EXPORT_SYMBOL_GPL(bq27xxx_battery_update);
1627
1628 static void bq27xxx_battery_poll(struct work_struct *work)
1629 {
1630 struct bq27xxx_device_info *di =
1631 container_of(work, struct bq27xxx_device_info,
1632 work.work);
1633
1634 bq27xxx_battery_update(di);
1635
1636 if (poll_interval > 0)
1637 schedule_delayed_work(&di->work, poll_interval * HZ);
1638 }
1639
1640 /*
1641 * Return the battery average current in µA
1642 * Note that current can be negative signed as well
1643 * Or 0 if something fails.
1644 */
1645 static int bq27xxx_battery_current(struct bq27xxx_device_info *di,
1646 union power_supply_propval *val)
1647 {
1648 int curr;
1649 int flags;
1650
1651 curr = bq27xxx_read(di, BQ27XXX_REG_AI, false);
1652 if (curr < 0) {
1653 dev_err(di->dev, "error reading current\n");
1654 return curr;
1655 }
1656
1657 if (di->opts & BQ27XXX_O_ZERO) {
1658 flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1659 if (flags & BQ27000_FLAG_CHGS) {
1660 dev_dbg(di->dev, "negative current!\n");
1661 curr = -curr;
1662 }
1663
1664 val->intval = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1665 } else {
1666 /* Other gauges return signed value */
1667 val->intval = (int)((s16)curr) * 1000;
1668 }
1669
1670 return 0;
1671 }
1672
1673 static int bq27xxx_battery_status(struct bq27xxx_device_info *di,
1674 union power_supply_propval *val)
1675 {
1676 int status;
1677
1678 if (di->opts & BQ27XXX_O_ZERO) {
1679 if (di->cache.flags & BQ27000_FLAG_FC)
1680 status = POWER_SUPPLY_STATUS_FULL;
1681 else if (di->cache.flags & BQ27000_FLAG_CHGS)
1682 status = POWER_SUPPLY_STATUS_CHARGING;
1683 else if (power_supply_am_i_supplied(di->bat) > 0)
1684 status = POWER_SUPPLY_STATUS_NOT_CHARGING;
1685 else
1686 status = POWER_SUPPLY_STATUS_DISCHARGING;
1687 } else {
1688 if (di->cache.flags & BQ27XXX_FLAG_FC)
1689 status = POWER_SUPPLY_STATUS_FULL;
1690 else if (di->cache.flags & BQ27XXX_FLAG_DSC)
1691 status = POWER_SUPPLY_STATUS_DISCHARGING;
1692 else
1693 status = POWER_SUPPLY_STATUS_CHARGING;
1694 }
1695
1696 val->intval = status;
1697
1698 return 0;
1699 }
1700
1701 static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di,
1702 union power_supply_propval *val)
1703 {
1704 int level;
1705
1706 if (di->opts & BQ27XXX_O_ZERO) {
1707 if (di->cache.flags & BQ27000_FLAG_FC)
1708 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1709 else if (di->cache.flags & BQ27000_FLAG_EDV1)
1710 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1711 else if (di->cache.flags & BQ27000_FLAG_EDVF)
1712 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1713 else
1714 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1715 } else {
1716 if (di->cache.flags & BQ27XXX_FLAG_FC)
1717 level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1718 else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
1719 level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1720 else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
1721 level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1722 else
1723 level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1724 }
1725
1726 val->intval = level;
1727
1728 return 0;
1729 }
1730
1731 /*
1732 * Return the battery Voltage in millivolts
1733 * Or < 0 if something fails.
1734 */
1735 static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di,
1736 union power_supply_propval *val)
1737 {
1738 int volt;
1739
1740 volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
1741 if (volt < 0) {
1742 dev_err(di->dev, "error reading voltage\n");
1743 return volt;
1744 }
1745
1746 val->intval = volt * 1000;
1747
1748 return 0;
1749 }
1750
1751 static int bq27xxx_simple_value(int value,
1752 union power_supply_propval *val)
1753 {
1754 if (value < 0)
1755 return value;
1756
1757 val->intval = value;
1758
1759 return 0;
1760 }
1761
1762 static int bq27xxx_battery_get_property(struct power_supply *psy,
1763 enum power_supply_property psp,
1764 union power_supply_propval *val)
1765 {
1766 int ret = 0;
1767 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1768
1769 mutex_lock(&di->lock);
1770 if (time_is_before_jiffies(di->last_update + 5 * HZ)) {
1771 cancel_delayed_work_sync(&di->work);
1772 bq27xxx_battery_poll(&di->work.work);
1773 }
1774 mutex_unlock(&di->lock);
1775
1776 if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
1777 return -ENODEV;
1778
1779 switch (psp) {
1780 case POWER_SUPPLY_PROP_STATUS:
1781 ret = bq27xxx_battery_status(di, val);
1782 break;
1783 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
1784 ret = bq27xxx_battery_voltage(di, val);
1785 break;
1786 case POWER_SUPPLY_PROP_PRESENT:
1787 val->intval = di->cache.flags < 0 ? 0 : 1;
1788 break;
1789 case POWER_SUPPLY_PROP_CURRENT_NOW:
1790 ret = bq27xxx_battery_current(di, val);
1791 break;
1792 case POWER_SUPPLY_PROP_CAPACITY:
1793 ret = bq27xxx_simple_value(di->cache.capacity, val);
1794 break;
1795 case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
1796 ret = bq27xxx_battery_capacity_level(di, val);
1797 break;
1798 case POWER_SUPPLY_PROP_TEMP:
1799 ret = bq27xxx_simple_value(di->cache.temperature, val);
1800 if (ret == 0)
1801 val->intval -= 2731; /* convert decidegree k to c */
1802 break;
1803 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
1804 ret = bq27xxx_simple_value(di->cache.time_to_empty, val);
1805 break;
1806 case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
1807 ret = bq27xxx_simple_value(di->cache.time_to_empty_avg, val);
1808 break;
1809 case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
1810 ret = bq27xxx_simple_value(di->cache.time_to_full, val);
1811 break;
1812 case POWER_SUPPLY_PROP_TECHNOLOGY:
1813 val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
1814 break;
1815 case POWER_SUPPLY_PROP_CHARGE_NOW:
1816 ret = bq27xxx_simple_value(bq27xxx_battery_read_nac(di), val);
1817 break;
1818 case POWER_SUPPLY_PROP_CHARGE_FULL:
1819 ret = bq27xxx_simple_value(di->cache.charge_full, val);
1820 break;
1821 case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
1822 ret = bq27xxx_simple_value(di->charge_design_full, val);
1823 break;
1824 /*
1825 * TODO: Implement these to make registers set from
1826 * power_supply_battery_info visible in sysfs.
1827 */
1828 case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
1829 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
1830 return -EINVAL;
1831 case POWER_SUPPLY_PROP_CYCLE_COUNT:
1832 ret = bq27xxx_simple_value(di->cache.cycle_count, val);
1833 break;
1834 case POWER_SUPPLY_PROP_ENERGY_NOW:
1835 ret = bq27xxx_simple_value(di->cache.energy, val);
1836 break;
1837 case POWER_SUPPLY_PROP_POWER_AVG:
1838 ret = bq27xxx_simple_value(di->cache.power_avg, val);
1839 break;
1840 case POWER_SUPPLY_PROP_HEALTH:
1841 ret = bq27xxx_simple_value(di->cache.health, val);
1842 break;
1843 case POWER_SUPPLY_PROP_MANUFACTURER:
1844 val->strval = BQ27XXX_MANUFACTURER;
1845 break;
1846 default:
1847 return -EINVAL;
1848 }
1849
1850 return ret;
1851 }
1852
1853 static void bq27xxx_external_power_changed(struct power_supply *psy)
1854 {
1855 struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1856
1857 cancel_delayed_work_sync(&di->work);
1858 schedule_delayed_work(&di->work, 0);
1859 }
1860
1861 int bq27xxx_battery_setup(struct bq27xxx_device_info *di)
1862 {
1863 struct power_supply_desc *psy_desc;
1864 struct power_supply_config psy_cfg = {
1865 .of_node = di->dev->of_node,
1866 .drv_data = di,
1867 };
1868
1869 INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
1870 mutex_init(&di->lock);
1871
1872 di->regs = bq27xxx_chip_data[di->chip].regs;
1873 di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
1874 di->dm_regs = bq27xxx_chip_data[di->chip].dm_regs;
1875 di->opts = bq27xxx_chip_data[di->chip].opts;
1876
1877 psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
1878 if (!psy_desc)
1879 return -ENOMEM;
1880
1881 psy_desc->name = di->name;
1882 psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
1883 psy_desc->properties = bq27xxx_chip_data[di->chip].props;
1884 psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
1885 psy_desc->get_property = bq27xxx_battery_get_property;
1886 psy_desc->external_power_changed = bq27xxx_external_power_changed;
1887
1888 di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg);
1889 if (IS_ERR(di->bat)) {
1890 dev_err(di->dev, "failed to register battery\n");
1891 return PTR_ERR(di->bat);
1892 }
1893
1894 bq27xxx_battery_settings(di);
1895 bq27xxx_battery_update(di);
1896
1897 mutex_lock(&bq27xxx_list_lock);
1898 list_add(&di->list, &bq27xxx_battery_devices);
1899 mutex_unlock(&bq27xxx_list_lock);
1900
1901 return 0;
1902 }
1903 EXPORT_SYMBOL_GPL(bq27xxx_battery_setup);
1904
1905 void bq27xxx_battery_teardown(struct bq27xxx_device_info *di)
1906 {
1907 /*
1908 * power_supply_unregister call bq27xxx_battery_get_property which
1909 * call bq27xxx_battery_poll.
1910 * Make sure that bq27xxx_battery_poll will not call
1911 * schedule_delayed_work again after unregister (which cause OOPS).
1912 */
1913 poll_interval = 0;
1914
1915 cancel_delayed_work_sync(&di->work);
1916
1917 power_supply_unregister(di->bat);
1918
1919 mutex_lock(&bq27xxx_list_lock);
1920 list_del(&di->list);
1921 mutex_unlock(&bq27xxx_list_lock);
1922
1923 mutex_destroy(&di->lock);
1924 }
1925 EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown);
1926
1927 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
1928 MODULE_DESCRIPTION("BQ27xxx battery monitor driver");
1929 MODULE_LICENSE("GPL");
1930
