1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * A V4L2 driver for Sony IMX219 cameras.
4 * Copyright (C) 2019, Raspberry Pi (Trading) Ltd
5 *
6 * Based on Sony imx258 camera driver
7 * Copyright (C) 2018 Intel Corporation
8 *
9 * DT / fwnode changes, and regulator / GPIO control taken from imx214 driver
10 * Copyright 2018 Qtechnology A/S
11 *
12 * Flip handling taken from the Sony IMX319 driver.
13 * Copyright (C) 2018 Intel Corporation
14 *
15 */
16
17 #include <linux/clk.h>
18 #include <linux/delay.h>
19 #include <linux/gpio/consumer.h>
20 #include <linux/i2c.h>
21 #include <linux/module.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regulator/consumer.h>
24 #include <media/v4l2-ctrls.h>
25 #include <media/v4l2-device.h>
26 #include <media/v4l2-event.h>
27 #include <media/v4l2-fwnode.h>
28 #include <media/v4l2-mediabus.h>
29 #include <asm/unaligned.h>
30
31 #define IMX219_REG_VALUE_08BIT 1
32 #define IMX219_REG_VALUE_16BIT 2
33
34 #define IMX219_REG_MODE_SELECT 0x0100
35 #define IMX219_MODE_STANDBY 0x00
36 #define IMX219_MODE_STREAMING 0x01
37
38 /* Chip ID */
39 #define IMX219_REG_CHIP_ID 0x0000
40 #define IMX219_CHIP_ID 0x0219
41
42 /* External clock frequency is 24.0M */
43 #define IMX219_XCLK_FREQ 24000000
44
45 /* Pixel rate is fixed at 182.4M for all the modes */
46 #define IMX219_PIXEL_RATE 182400000
47
48 #define IMX219_DEFAULT_LINK_FREQ 456000000
49
50 /* V_TIMING internal */
51 #define IMX219_REG_VTS 0x0160
52 #define IMX219_VTS_15FPS 0x0dc6
53 #define IMX219_VTS_30FPS_1080P 0x06e3
54 #define IMX219_VTS_30FPS_BINNED 0x06e3
55 #define IMX219_VTS_30FPS_640x480 0x06e3
56 #define IMX219_VTS_MAX 0xffff
57
58 #define IMX219_VBLANK_MIN 4
59
60 /*Frame Length Line*/
61 #define IMX219_FLL_MIN 0x08a6
62 #define IMX219_FLL_MAX 0xffff
63 #define IMX219_FLL_STEP 1
64 #define IMX219_FLL_DEFAULT 0x0c98
65
66 /* HBLANK control - read only */
67 #define IMX219_PPL_DEFAULT 3448
68
69 /* Exposure control */
70 #define IMX219_REG_EXPOSURE 0x015a
71 #define IMX219_EXPOSURE_MIN 4
72 #define IMX219_EXPOSURE_STEP 1
73 #define IMX219_EXPOSURE_DEFAULT 0x640
74 #define IMX219_EXPOSURE_MAX 65535
75
76 /* Analog gain control */
77 #define IMX219_REG_ANALOG_GAIN 0x0157
78 #define IMX219_ANA_GAIN_MIN 0
79 #define IMX219_ANA_GAIN_MAX 232
80 #define IMX219_ANA_GAIN_STEP 1
81 #define IMX219_ANA_GAIN_DEFAULT 0x0
82
83 /* Digital gain control */
84 #define IMX219_REG_DIGITAL_GAIN 0x0158
85 #define IMX219_DGTL_GAIN_MIN 0x0100
86 #define IMX219_DGTL_GAIN_MAX 0x0fff
87 #define IMX219_DGTL_GAIN_DEFAULT 0x0100
88 #define IMX219_DGTL_GAIN_STEP 1
89
90 #define IMX219_REG_ORIENTATION 0x0172
91
92 /* Test Pattern Control */
93 #define IMX219_REG_TEST_PATTERN 0x0600
94 #define IMX219_TEST_PATTERN_DISABLE 0
95 #define IMX219_TEST_PATTERN_SOLID_COLOR 1
96 #define IMX219_TEST_PATTERN_COLOR_BARS 2
97 #define IMX219_TEST_PATTERN_GREY_COLOR 3
98 #define IMX219_TEST_PATTERN_PN9 4
99
100 /* Test pattern colour components */
101 #define IMX219_REG_TESTP_RED 0x0602
102 #define IMX219_REG_TESTP_GREENR 0x0604
103 #define IMX219_REG_TESTP_BLUE 0x0606
104 #define IMX219_REG_TESTP_GREENB 0x0608
105 #define IMX219_TESTP_COLOUR_MIN 0
106 #define IMX219_TESTP_COLOUR_MAX 0x03ff
107 #define IMX219_TESTP_COLOUR_STEP 1
108 #define IMX219_TESTP_RED_DEFAULT IMX219_TESTP_COLOUR_MAX
109 #define IMX219_TESTP_GREENR_DEFAULT 0
110 #define IMX219_TESTP_BLUE_DEFAULT 0
111 #define IMX219_TESTP_GREENB_DEFAULT 0
112
113 /* IMX219 native and active pixel array size. */
114 #define IMX219_NATIVE_WIDTH 3296U
115 #define IMX219_NATIVE_HEIGHT 2480U
116 #define IMX219_PIXEL_ARRAY_LEFT 8U
117 #define IMX219_PIXEL_ARRAY_TOP 8U
118 #define IMX219_PIXEL_ARRAY_WIDTH 3280U
119 #define IMX219_PIXEL_ARRAY_HEIGHT 2464U
120
121 struct imx219_reg {
122 u16 address;
123 u8 val;
124 };
125
126 struct imx219_reg_list {
127 unsigned int num_of_regs;
128 const struct imx219_reg *regs;
129 };
130
131 /* Mode : resolution and related config&values */
132 struct imx219_mode {
133 /* Frame width */
134 unsigned int width;
135 /* Frame height */
136 unsigned int height;
137
138 /* Analog crop rectangle. */
139 struct v4l2_rect crop;
140
141 /* V-timing */
142 unsigned int vts_def;
143
144 /* Default register values */
145 struct imx219_reg_list reg_list;
146 };
147
148 /*
149 * Register sets lifted off the i2C interface from the Raspberry Pi firmware
150 * driver.
151 * 3280x2464 = mode 2, 1920x1080 = mode 1, 1640x1232 = mode 4, 640x480 = mode 7.
152 */
153 static const struct imx219_reg mode_3280x2464_regs[] = {
154 {0x0100, 0x00},
155 {0x30eb, 0x0c},
156 {0x30eb, 0x05},
157 {0x300a, 0xff},
158 {0x300b, 0xff},
159 {0x30eb, 0x05},
160 {0x30eb, 0x09},
161 {0x0114, 0x01},
162 {0x0128, 0x00},
163 {0x012a, 0x18},
164 {0x012b, 0x00},
165 {0x0164, 0x00},
166 {0x0165, 0x00},
167 {0x0166, 0x0c},
168 {0x0167, 0xcf},
169 {0x0168, 0x00},
170 {0x0169, 0x00},
171 {0x016a, 0x09},
172 {0x016b, 0x9f},
173 {0x016c, 0x0c},
174 {0x016d, 0xd0},
175 {0x016e, 0x09},
176 {0x016f, 0xa0},
177 {0x0170, 0x01},
178 {0x0171, 0x01},
179 {0x0174, 0x00},
180 {0x0175, 0x00},
181 {0x0301, 0x05},
182 {0x0303, 0x01},
183 {0x0304, 0x03},
184 {0x0305, 0x03},
185 {0x0306, 0x00},
186 {0x0307, 0x39},
187 {0x030b, 0x01},
188 {0x030c, 0x00},
189 {0x030d, 0x72},
190 {0x0624, 0x0c},
191 {0x0625, 0xd0},
192 {0x0626, 0x09},
193 {0x0627, 0xa0},
194 {0x455e, 0x00},
195 {0x471e, 0x4b},
196 {0x4767, 0x0f},
197 {0x4750, 0x14},
198 {0x4540, 0x00},
199 {0x47b4, 0x14},
200 {0x4713, 0x30},
201 {0x478b, 0x10},
202 {0x478f, 0x10},
203 {0x4793, 0x10},
204 {0x4797, 0x0e},
205 {0x479b, 0x0e},
206 {0x0162, 0x0d},
207 {0x0163, 0x78},
208 };
209
210 static const struct imx219_reg mode_1920_1080_regs[] = {
211 {0x0100, 0x00},
212 {0x30eb, 0x05},
213 {0x30eb, 0x0c},
214 {0x300a, 0xff},
215 {0x300b, 0xff},
216 {0x30eb, 0x05},
217 {0x30eb, 0x09},
218 {0x0114, 0x01},
219 {0x0128, 0x00},
220 {0x012a, 0x18},
221 {0x012b, 0x00},
222 {0x0162, 0x0d},
223 {0x0163, 0x78},
224 {0x0164, 0x02},
225 {0x0165, 0xa8},
226 {0x0166, 0x0a},
227 {0x0167, 0x27},
228 {0x0168, 0x02},
229 {0x0169, 0xb4},
230 {0x016a, 0x06},
231 {0x016b, 0xeb},
232 {0x016c, 0x07},
233 {0x016d, 0x80},
234 {0x016e, 0x04},
235 {0x016f, 0x38},
236 {0x0170, 0x01},
237 {0x0171, 0x01},
238 {0x0174, 0x00},
239 {0x0175, 0x00},
240 {0x0301, 0x05},
241 {0x0303, 0x01},
242 {0x0304, 0x03},
243 {0x0305, 0x03},
244 {0x0306, 0x00},
245 {0x0307, 0x39},
246 {0x030b, 0x01},
247 {0x030c, 0x00},
248 {0x030d, 0x72},
249 {0x0624, 0x07},
250 {0x0625, 0x80},
251 {0x0626, 0x04},
252 {0x0627, 0x38},
253 {0x455e, 0x00},
254 {0x471e, 0x4b},
255 {0x4767, 0x0f},
256 {0x4750, 0x14},
257 {0x4540, 0x00},
258 {0x47b4, 0x14},
259 {0x4713, 0x30},
260 {0x478b, 0x10},
261 {0x478f, 0x10},
262 {0x4793, 0x10},
263 {0x4797, 0x0e},
264 {0x479b, 0x0e},
265 };
266
267 static const struct imx219_reg mode_1640_1232_regs[] = {
268 {0x0100, 0x00},
269 {0x30eb, 0x0c},
270 {0x30eb, 0x05},
271 {0x300a, 0xff},
272 {0x300b, 0xff},
273 {0x30eb, 0x05},
274 {0x30eb, 0x09},
275 {0x0114, 0x01},
276 {0x0128, 0x00},
277 {0x012a, 0x18},
278 {0x012b, 0x00},
279 {0x0164, 0x00},
280 {0x0165, 0x00},
281 {0x0166, 0x0c},
282 {0x0167, 0xcf},
283 {0x0168, 0x00},
284 {0x0169, 0x00},
285 {0x016a, 0x09},
286 {0x016b, 0x9f},
287 {0x016c, 0x06},
288 {0x016d, 0x68},
289 {0x016e, 0x04},
290 {0x016f, 0xd0},
291 {0x0170, 0x01},
292 {0x0171, 0x01},
293 {0x0174, 0x01},
294 {0x0175, 0x01},
295 {0x0301, 0x05},
296 {0x0303, 0x01},
297 {0x0304, 0x03},
298 {0x0305, 0x03},
299 {0x0306, 0x00},
300 {0x0307, 0x39},
301 {0x030b, 0x01},
302 {0x030c, 0x00},
303 {0x030d, 0x72},
304 {0x0624, 0x06},
305 {0x0625, 0x68},
306 {0x0626, 0x04},
307 {0x0627, 0xd0},
308 {0x455e, 0x00},
309 {0x471e, 0x4b},
310 {0x4767, 0x0f},
311 {0x4750, 0x14},
312 {0x4540, 0x00},
313 {0x47b4, 0x14},
314 {0x4713, 0x30},
315 {0x478b, 0x10},
316 {0x478f, 0x10},
317 {0x4793, 0x10},
318 {0x4797, 0x0e},
319 {0x479b, 0x0e},
320 {0x0162, 0x0d},
321 {0x0163, 0x78},
322 };
323
324 static const struct imx219_reg mode_640_480_regs[] = {
325 {0x0100, 0x00},
326 {0x30eb, 0x05},
327 {0x30eb, 0x0c},
328 {0x300a, 0xff},
329 {0x300b, 0xff},
330 {0x30eb, 0x05},
331 {0x30eb, 0x09},
332 {0x0114, 0x01},
333 {0x0128, 0x00},
334 {0x012a, 0x18},
335 {0x012b, 0x00},
336 {0x0162, 0x0d},
337 {0x0163, 0x78},
338 {0x0164, 0x03},
339 {0x0165, 0xe8},
340 {0x0166, 0x08},
341 {0x0167, 0xe7},
342 {0x0168, 0x02},
343 {0x0169, 0xf0},
344 {0x016a, 0x06},
345 {0x016b, 0xaf},
346 {0x016c, 0x02},
347 {0x016d, 0x80},
348 {0x016e, 0x01},
349 {0x016f, 0xe0},
350 {0x0170, 0x01},
351 {0x0171, 0x01},
352 {0x0174, 0x03},
353 {0x0175, 0x03},
354 {0x0301, 0x05},
355 {0x0303, 0x01},
356 {0x0304, 0x03},
357 {0x0305, 0x03},
358 {0x0306, 0x00},
359 {0x0307, 0x39},
360 {0x030b, 0x01},
361 {0x030c, 0x00},
362 {0x030d, 0x72},
363 {0x0624, 0x06},
364 {0x0625, 0x68},
365 {0x0626, 0x04},
366 {0x0627, 0xd0},
367 {0x455e, 0x00},
368 {0x471e, 0x4b},
369 {0x4767, 0x0f},
370 {0x4750, 0x14},
371 {0x4540, 0x00},
372 {0x47b4, 0x14},
373 {0x4713, 0x30},
374 {0x478b, 0x10},
375 {0x478f, 0x10},
376 {0x4793, 0x10},
377 {0x4797, 0x0e},
378 {0x479b, 0x0e},
379 };
380
381 static const struct imx219_reg raw8_framefmt_regs[] = {
382 {0x018c, 0x08},
383 {0x018d, 0x08},
384 {0x0309, 0x08},
385 };
386
387 static const struct imx219_reg raw10_framefmt_regs[] = {
388 {0x018c, 0x0a},
389 {0x018d, 0x0a},
390 {0x0309, 0x0a},
391 };
392
393 static const s64 imx219_link_freq_menu[] = {
394 IMX219_DEFAULT_LINK_FREQ,
395 };
396
397 static const char * const imx219_test_pattern_menu[] = {
398 "Disabled",
399 "Color Bars",
400 "Solid Color",
401 "Grey Color Bars",
402 "PN9"
403 };
404
405 static const int imx219_test_pattern_val[] = {
406 IMX219_TEST_PATTERN_DISABLE,
407 IMX219_TEST_PATTERN_COLOR_BARS,
408 IMX219_TEST_PATTERN_SOLID_COLOR,
409 IMX219_TEST_PATTERN_GREY_COLOR,
410 IMX219_TEST_PATTERN_PN9,
411 };
412
413 /* regulator supplies */
414 static const char * const imx219_supply_name[] = {
415 /* Supplies can be enabled in any order */
416 "VANA", /* Analog (2.8V) supply */
417 "VDIG", /* Digital Core (1.8V) supply */
418 "VDDL", /* IF (1.2V) supply */
419 };
420
421 #define IMX219_NUM_SUPPLIES ARRAY_SIZE(imx219_supply_name)
422
423 /*
424 * The supported formats.
425 * This table MUST contain 4 entries per format, to cover the various flip
426 * combinations in the order
427 * - no flip
428 * - h flip
429 * - v flip
430 * - h&v flips
431 */
432 static const u32 codes[] = {
433 MEDIA_BUS_FMT_SRGGB10_1X10,
434 MEDIA_BUS_FMT_SGRBG10_1X10,
435 MEDIA_BUS_FMT_SGBRG10_1X10,
436 MEDIA_BUS_FMT_SBGGR10_1X10,
437
438 MEDIA_BUS_FMT_SRGGB8_1X8,
439 MEDIA_BUS_FMT_SGRBG8_1X8,
440 MEDIA_BUS_FMT_SGBRG8_1X8,
441 MEDIA_BUS_FMT_SBGGR8_1X8,
442 };
443
444 /*
445 * Initialisation delay between XCLR low->high and the moment when the sensor
446 * can start capture (i.e. can leave software stanby) must be not less than:
447 * t4 + max(t5, t6 + <time to initialize the sensor register over I2C>)
448 * where
449 * t4 is fixed, and is max 200uS,
450 * t5 is fixed, and is 6000uS,
451 * t6 depends on the sensor external clock, and is max 32000 clock periods.
452 * As per sensor datasheet, the external clock must be from 6MHz to 27MHz.
453 * So for any acceptable external clock t6 is always within the range of
454 * 1185 to 5333 uS, and is always less than t5.
455 * For this reason this is always safe to wait (t4 + t5) = 6200 uS, then
456 * initialize the sensor over I2C, and then exit the software standby.
457 *
458 * This start-up time can be optimized a bit more, if we start the writes
459 * over I2C after (t4+t6), but before (t4+t5) expires. But then sensor
460 * initialization over I2C may complete before (t4+t5) expires, and we must
461 * ensure that capture is not started before (t4+t5).
462 *
463 * This delay doesn't account for the power supply startup time. If needed,
464 * this should be taken care of via the regulator framework. E.g. in the
465 * case of DT for regulator-fixed one should define the startup-delay-us
466 * property.
467 */
468 #define IMX219_XCLR_MIN_DELAY_US 6200
469 #define IMX219_XCLR_DELAY_RANGE_US 1000
470
471 /* Mode configs */
472 static const struct imx219_mode supported_modes[] = {
473 {
474 /* 8MPix 15fps mode */
475 .width = 3280,
476 .height = 2464,
477 .crop = {
478 .left = IMX219_PIXEL_ARRAY_LEFT,
479 .top = IMX219_PIXEL_ARRAY_TOP,
480 .width = 3280,
481 .height = 2464
482 },
483 .vts_def = IMX219_VTS_15FPS,
484 .reg_list = {
485 .num_of_regs = ARRAY_SIZE(mode_3280x2464_regs),
486 .regs = mode_3280x2464_regs,
487 },
488 },
489 {
490 /* 1080P 30fps cropped */
491 .width = 1920,
492 .height = 1080,
493 .crop = {
494 .left = 688,
495 .top = 700,
496 .width = 1920,
497 .height = 1080
498 },
499 .vts_def = IMX219_VTS_30FPS_1080P,
500 .reg_list = {
501 .num_of_regs = ARRAY_SIZE(mode_1920_1080_regs),
502 .regs = mode_1920_1080_regs,
503 },
504 },
505 {
506 /* 2x2 binned 30fps mode */
507 .width = 1640,
508 .height = 1232,
509 .crop = {
510 .left = IMX219_PIXEL_ARRAY_LEFT,
511 .top = IMX219_PIXEL_ARRAY_TOP,
512 .width = 3280,
513 .height = 2464
514 },
515 .vts_def = IMX219_VTS_30FPS_BINNED,
516 .reg_list = {
517 .num_of_regs = ARRAY_SIZE(mode_1640_1232_regs),
518 .regs = mode_1640_1232_regs,
519 },
520 },
521 {
522 /* 640x480 30fps mode */
523 .width = 640,
524 .height = 480,
525 .crop = {
526 .left = 1008,
527 .top = 760,
528 .width = 1280,
529 .height = 960
530 },
531 .vts_def = IMX219_VTS_30FPS_640x480,
532 .reg_list = {
533 .num_of_regs = ARRAY_SIZE(mode_640_480_regs),
534 .regs = mode_640_480_regs,
535 },
536 },
537 };
538
539 struct imx219 {
540 struct v4l2_subdev sd;
541 struct media_pad pad;
542
543 struct v4l2_mbus_framefmt fmt;
544
545 struct clk *xclk; /* system clock to IMX219 */
546 u32 xclk_freq;
547
548 struct gpio_desc *reset_gpio;
549 struct regulator_bulk_data supplies[IMX219_NUM_SUPPLIES];
550
551 struct v4l2_ctrl_handler ctrl_handler;
552 /* V4L2 Controls */
553 struct v4l2_ctrl *pixel_rate;
554 struct v4l2_ctrl *link_freq;
555 struct v4l2_ctrl *exposure;
556 struct v4l2_ctrl *vflip;
557 struct v4l2_ctrl *hflip;
558 struct v4l2_ctrl *vblank;
559 struct v4l2_ctrl *hblank;
560
561 /* Current mode */
562 const struct imx219_mode *mode;
563
564 /*
565 * Mutex for serialized access:
566 * Protect sensor module set pad format and start/stop streaming safely.
567 */
568 struct mutex mutex;
569
570 /* Streaming on/off */
571 bool streaming;
572 };
573
to_imx219(struct v4l2_subdev * _sd)574 static inline struct imx219 *to_imx219(struct v4l2_subdev *_sd)
575 {
576 return container_of(_sd, struct imx219, sd);
577 }
578
579 /* Read registers up to 2 at a time */
imx219_read_reg(struct imx219 * imx219,u16 reg,u32 len,u32 * val)580 static int imx219_read_reg(struct imx219 *imx219, u16 reg, u32 len, u32 *val)
581 {
582 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
583 struct i2c_msg msgs[2];
584 u8 addr_buf[2] = { reg >> 8, reg & 0xff };
585 u8 data_buf[4] = { 0, };
586 int ret;
587
588 if (len > 4)
589 return -EINVAL;
590
591 /* Write register address */
592 msgs[0].addr = client->addr;
593 msgs[0].flags = 0;
594 msgs[0].len = ARRAY_SIZE(addr_buf);
595 msgs[0].buf = addr_buf;
596
597 /* Read data from register */
598 msgs[1].addr = client->addr;
599 msgs[1].flags = I2C_M_RD;
600 msgs[1].len = len;
601 msgs[1].buf = &data_buf[4 - len];
602
603 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
604 if (ret != ARRAY_SIZE(msgs))
605 return -EIO;
606
607 *val = get_unaligned_be32(data_buf);
608
609 return 0;
610 }
611
612 /* Write registers up to 2 at a time */
imx219_write_reg(struct imx219 * imx219,u16 reg,u32 len,u32 val)613 static int imx219_write_reg(struct imx219 *imx219, u16 reg, u32 len, u32 val)
614 {
615 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
616 u8 buf[6];
617
618 if (len > 4)
619 return -EINVAL;
620
621 put_unaligned_be16(reg, buf);
622 put_unaligned_be32(val << (8 * (4 - len)), buf + 2);
623 if (i2c_master_send(client, buf, len + 2) != len + 2)
624 return -EIO;
625
626 return 0;
627 }
628
629 /* Write a list of registers */
imx219_write_regs(struct imx219 * imx219,const struct imx219_reg * regs,u32 len)630 static int imx219_write_regs(struct imx219 *imx219,
631 const struct imx219_reg *regs, u32 len)
632 {
633 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
634 unsigned int i;
635 int ret;
636
637 for (i = 0; i < len; i++) {
638 ret = imx219_write_reg(imx219, regs[i].address, 1, regs[i].val);
639 if (ret) {
640 dev_err_ratelimited(&client->dev,
641 "Failed to write reg 0x%4.4x. error = %d\n",
642 regs[i].address, ret);
643
644 return ret;
645 }
646 }
647
648 return 0;
649 }
650
651 /* Get bayer order based on flip setting. */
imx219_get_format_code(struct imx219 * imx219,u32 code)652 static u32 imx219_get_format_code(struct imx219 *imx219, u32 code)
653 {
654 unsigned int i;
655
656 lockdep_assert_held(&imx219->mutex);
657
658 for (i = 0; i < ARRAY_SIZE(codes); i++)
659 if (codes[i] == code)
660 break;
661
662 if (i >= ARRAY_SIZE(codes))
663 i = 0;
664
665 i = (i & ~3) | (imx219->vflip->val ? 2 : 0) |
666 (imx219->hflip->val ? 1 : 0);
667
668 return codes[i];
669 }
670
imx219_set_default_format(struct imx219 * imx219)671 static void imx219_set_default_format(struct imx219 *imx219)
672 {
673 struct v4l2_mbus_framefmt *fmt;
674
675 fmt = &imx219->fmt;
676 fmt->code = MEDIA_BUS_FMT_SRGGB10_1X10;
677 fmt->colorspace = V4L2_COLORSPACE_SRGB;
678 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
679 fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
680 fmt->colorspace,
681 fmt->ycbcr_enc);
682 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
683 fmt->width = supported_modes[0].width;
684 fmt->height = supported_modes[0].height;
685 fmt->field = V4L2_FIELD_NONE;
686 }
687
imx219_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)688 static int imx219_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
689 {
690 struct imx219 *imx219 = to_imx219(sd);
691 struct v4l2_mbus_framefmt *try_fmt =
692 v4l2_subdev_get_try_format(sd, fh->state, 0);
693 struct v4l2_rect *try_crop;
694
695 mutex_lock(&imx219->mutex);
696
697 /* Initialize try_fmt */
698 try_fmt->width = supported_modes[0].width;
699 try_fmt->height = supported_modes[0].height;
700 try_fmt->code = imx219_get_format_code(imx219,
701 MEDIA_BUS_FMT_SRGGB10_1X10);
702 try_fmt->field = V4L2_FIELD_NONE;
703
704 /* Initialize try_crop rectangle. */
705 try_crop = v4l2_subdev_get_try_crop(sd, fh->state, 0);
706 try_crop->top = IMX219_PIXEL_ARRAY_TOP;
707 try_crop->left = IMX219_PIXEL_ARRAY_LEFT;
708 try_crop->width = IMX219_PIXEL_ARRAY_WIDTH;
709 try_crop->height = IMX219_PIXEL_ARRAY_HEIGHT;
710
711 mutex_unlock(&imx219->mutex);
712
713 return 0;
714 }
715
imx219_set_ctrl(struct v4l2_ctrl * ctrl)716 static int imx219_set_ctrl(struct v4l2_ctrl *ctrl)
717 {
718 struct imx219 *imx219 =
719 container_of(ctrl->handler, struct imx219, ctrl_handler);
720 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
721 int ret;
722
723 if (ctrl->id == V4L2_CID_VBLANK) {
724 int exposure_max, exposure_def;
725
726 /* Update max exposure while meeting expected vblanking */
727 exposure_max = imx219->mode->height + ctrl->val - 4;
728 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
729 exposure_max : IMX219_EXPOSURE_DEFAULT;
730 __v4l2_ctrl_modify_range(imx219->exposure,
731 imx219->exposure->minimum,
732 exposure_max, imx219->exposure->step,
733 exposure_def);
734 }
735
736 /*
737 * Applying V4L2 control value only happens
738 * when power is up for streaming
739 */
740 if (pm_runtime_get_if_in_use(&client->dev) == 0)
741 return 0;
742
743 switch (ctrl->id) {
744 case V4L2_CID_ANALOGUE_GAIN:
745 ret = imx219_write_reg(imx219, IMX219_REG_ANALOG_GAIN,
746 IMX219_REG_VALUE_08BIT, ctrl->val);
747 break;
748 case V4L2_CID_EXPOSURE:
749 ret = imx219_write_reg(imx219, IMX219_REG_EXPOSURE,
750 IMX219_REG_VALUE_16BIT, ctrl->val);
751 break;
752 case V4L2_CID_DIGITAL_GAIN:
753 ret = imx219_write_reg(imx219, IMX219_REG_DIGITAL_GAIN,
754 IMX219_REG_VALUE_16BIT, ctrl->val);
755 break;
756 case V4L2_CID_TEST_PATTERN:
757 ret = imx219_write_reg(imx219, IMX219_REG_TEST_PATTERN,
758 IMX219_REG_VALUE_16BIT,
759 imx219_test_pattern_val[ctrl->val]);
760 break;
761 case V4L2_CID_HFLIP:
762 case V4L2_CID_VFLIP:
763 ret = imx219_write_reg(imx219, IMX219_REG_ORIENTATION, 1,
764 imx219->hflip->val |
765 imx219->vflip->val << 1);
766 break;
767 case V4L2_CID_VBLANK:
768 ret = imx219_write_reg(imx219, IMX219_REG_VTS,
769 IMX219_REG_VALUE_16BIT,
770 imx219->mode->height + ctrl->val);
771 break;
772 case V4L2_CID_TEST_PATTERN_RED:
773 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_RED,
774 IMX219_REG_VALUE_16BIT, ctrl->val);
775 break;
776 case V4L2_CID_TEST_PATTERN_GREENR:
777 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENR,
778 IMX219_REG_VALUE_16BIT, ctrl->val);
779 break;
780 case V4L2_CID_TEST_PATTERN_BLUE:
781 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_BLUE,
782 IMX219_REG_VALUE_16BIT, ctrl->val);
783 break;
784 case V4L2_CID_TEST_PATTERN_GREENB:
785 ret = imx219_write_reg(imx219, IMX219_REG_TESTP_GREENB,
786 IMX219_REG_VALUE_16BIT, ctrl->val);
787 break;
788 default:
789 dev_info(&client->dev,
790 "ctrl(id:0x%x,val:0x%x) is not handled\n",
791 ctrl->id, ctrl->val);
792 ret = -EINVAL;
793 break;
794 }
795
796 pm_runtime_put(&client->dev);
797
798 return ret;
799 }
800
801 static const struct v4l2_ctrl_ops imx219_ctrl_ops = {
802 .s_ctrl = imx219_set_ctrl,
803 };
804
imx219_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)805 static int imx219_enum_mbus_code(struct v4l2_subdev *sd,
806 struct v4l2_subdev_state *sd_state,
807 struct v4l2_subdev_mbus_code_enum *code)
808 {
809 struct imx219 *imx219 = to_imx219(sd);
810
811 if (code->index >= (ARRAY_SIZE(codes) / 4))
812 return -EINVAL;
813
814 mutex_lock(&imx219->mutex);
815 code->code = imx219_get_format_code(imx219, codes[code->index * 4]);
816 mutex_unlock(&imx219->mutex);
817
818 return 0;
819 }
820
imx219_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_size_enum * fse)821 static int imx219_enum_frame_size(struct v4l2_subdev *sd,
822 struct v4l2_subdev_state *sd_state,
823 struct v4l2_subdev_frame_size_enum *fse)
824 {
825 struct imx219 *imx219 = to_imx219(sd);
826 u32 code;
827
828 if (fse->index >= ARRAY_SIZE(supported_modes))
829 return -EINVAL;
830
831 mutex_lock(&imx219->mutex);
832 code = imx219_get_format_code(imx219, fse->code);
833 mutex_unlock(&imx219->mutex);
834 if (fse->code != code)
835 return -EINVAL;
836
837 fse->min_width = supported_modes[fse->index].width;
838 fse->max_width = fse->min_width;
839 fse->min_height = supported_modes[fse->index].height;
840 fse->max_height = fse->min_height;
841
842 return 0;
843 }
844
imx219_reset_colorspace(struct v4l2_mbus_framefmt * fmt)845 static void imx219_reset_colorspace(struct v4l2_mbus_framefmt *fmt)
846 {
847 fmt->colorspace = V4L2_COLORSPACE_SRGB;
848 fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(fmt->colorspace);
849 fmt->quantization = V4L2_MAP_QUANTIZATION_DEFAULT(true,
850 fmt->colorspace,
851 fmt->ycbcr_enc);
852 fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(fmt->colorspace);
853 }
854
imx219_update_pad_format(struct imx219 * imx219,const struct imx219_mode * mode,struct v4l2_subdev_format * fmt)855 static void imx219_update_pad_format(struct imx219 *imx219,
856 const struct imx219_mode *mode,
857 struct v4l2_subdev_format *fmt)
858 {
859 fmt->format.width = mode->width;
860 fmt->format.height = mode->height;
861 fmt->format.field = V4L2_FIELD_NONE;
862 imx219_reset_colorspace(&fmt->format);
863 }
864
__imx219_get_pad_format(struct imx219 * imx219,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)865 static int __imx219_get_pad_format(struct imx219 *imx219,
866 struct v4l2_subdev_state *sd_state,
867 struct v4l2_subdev_format *fmt)
868 {
869 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
870 struct v4l2_mbus_framefmt *try_fmt =
871 v4l2_subdev_get_try_format(&imx219->sd, sd_state,
872 fmt->pad);
873 /* update the code which could change due to vflip or hflip: */
874 try_fmt->code = imx219_get_format_code(imx219, try_fmt->code);
875 fmt->format = *try_fmt;
876 } else {
877 imx219_update_pad_format(imx219, imx219->mode, fmt);
878 fmt->format.code = imx219_get_format_code(imx219,
879 imx219->fmt.code);
880 }
881
882 return 0;
883 }
884
imx219_get_pad_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)885 static int imx219_get_pad_format(struct v4l2_subdev *sd,
886 struct v4l2_subdev_state *sd_state,
887 struct v4l2_subdev_format *fmt)
888 {
889 struct imx219 *imx219 = to_imx219(sd);
890 int ret;
891
892 mutex_lock(&imx219->mutex);
893 ret = __imx219_get_pad_format(imx219, sd_state, fmt);
894 mutex_unlock(&imx219->mutex);
895
896 return ret;
897 }
898
imx219_set_pad_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)899 static int imx219_set_pad_format(struct v4l2_subdev *sd,
900 struct v4l2_subdev_state *sd_state,
901 struct v4l2_subdev_format *fmt)
902 {
903 struct imx219 *imx219 = to_imx219(sd);
904 const struct imx219_mode *mode;
905 struct v4l2_mbus_framefmt *framefmt;
906 int exposure_max, exposure_def, hblank;
907 unsigned int i;
908
909 mutex_lock(&imx219->mutex);
910
911 for (i = 0; i < ARRAY_SIZE(codes); i++)
912 if (codes[i] == fmt->format.code)
913 break;
914 if (i >= ARRAY_SIZE(codes))
915 i = 0;
916
917 /* Bayer order varies with flips */
918 fmt->format.code = imx219_get_format_code(imx219, codes[i]);
919
920 mode = v4l2_find_nearest_size(supported_modes,
921 ARRAY_SIZE(supported_modes),
922 width, height,
923 fmt->format.width, fmt->format.height);
924 imx219_update_pad_format(imx219, mode, fmt);
925 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
926 framefmt = v4l2_subdev_get_try_format(sd, sd_state, fmt->pad);
927 *framefmt = fmt->format;
928 } else if (imx219->mode != mode ||
929 imx219->fmt.code != fmt->format.code) {
930 imx219->fmt = fmt->format;
931 imx219->mode = mode;
932 /* Update limits and set FPS to default */
933 __v4l2_ctrl_modify_range(imx219->vblank, IMX219_VBLANK_MIN,
934 IMX219_VTS_MAX - mode->height, 1,
935 mode->vts_def - mode->height);
936 __v4l2_ctrl_s_ctrl(imx219->vblank,
937 mode->vts_def - mode->height);
938 /* Update max exposure while meeting expected vblanking */
939 exposure_max = mode->vts_def - 4;
940 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
941 exposure_max : IMX219_EXPOSURE_DEFAULT;
942 __v4l2_ctrl_modify_range(imx219->exposure,
943 imx219->exposure->minimum,
944 exposure_max, imx219->exposure->step,
945 exposure_def);
946 /*
947 * Currently PPL is fixed to IMX219_PPL_DEFAULT, so hblank
948 * depends on mode->width only, and is not changeble in any
949 * way other than changing the mode.
950 */
951 hblank = IMX219_PPL_DEFAULT - mode->width;
952 __v4l2_ctrl_modify_range(imx219->hblank, hblank, hblank, 1,
953 hblank);
954 }
955
956 mutex_unlock(&imx219->mutex);
957
958 return 0;
959 }
960
imx219_set_framefmt(struct imx219 * imx219)961 static int imx219_set_framefmt(struct imx219 *imx219)
962 {
963 switch (imx219->fmt.code) {
964 case MEDIA_BUS_FMT_SRGGB8_1X8:
965 case MEDIA_BUS_FMT_SGRBG8_1X8:
966 case MEDIA_BUS_FMT_SGBRG8_1X8:
967 case MEDIA_BUS_FMT_SBGGR8_1X8:
968 return imx219_write_regs(imx219, raw8_framefmt_regs,
969 ARRAY_SIZE(raw8_framefmt_regs));
970
971 case MEDIA_BUS_FMT_SRGGB10_1X10:
972 case MEDIA_BUS_FMT_SGRBG10_1X10:
973 case MEDIA_BUS_FMT_SGBRG10_1X10:
974 case MEDIA_BUS_FMT_SBGGR10_1X10:
975 return imx219_write_regs(imx219, raw10_framefmt_regs,
976 ARRAY_SIZE(raw10_framefmt_regs));
977 }
978
979 return -EINVAL;
980 }
981
982 static const struct v4l2_rect *
__imx219_get_pad_crop(struct imx219 * imx219,struct v4l2_subdev_state * sd_state,unsigned int pad,enum v4l2_subdev_format_whence which)983 __imx219_get_pad_crop(struct imx219 *imx219,
984 struct v4l2_subdev_state *sd_state,
985 unsigned int pad, enum v4l2_subdev_format_whence which)
986 {
987 switch (which) {
988 case V4L2_SUBDEV_FORMAT_TRY:
989 return v4l2_subdev_get_try_crop(&imx219->sd, sd_state, pad);
990 case V4L2_SUBDEV_FORMAT_ACTIVE:
991 return &imx219->mode->crop;
992 }
993
994 return NULL;
995 }
996
imx219_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_selection * sel)997 static int imx219_get_selection(struct v4l2_subdev *sd,
998 struct v4l2_subdev_state *sd_state,
999 struct v4l2_subdev_selection *sel)
1000 {
1001 switch (sel->target) {
1002 case V4L2_SEL_TGT_CROP: {
1003 struct imx219 *imx219 = to_imx219(sd);
1004
1005 mutex_lock(&imx219->mutex);
1006 sel->r = *__imx219_get_pad_crop(imx219, sd_state, sel->pad,
1007 sel->which);
1008 mutex_unlock(&imx219->mutex);
1009
1010 return 0;
1011 }
1012
1013 case V4L2_SEL_TGT_NATIVE_SIZE:
1014 sel->r.top = 0;
1015 sel->r.left = 0;
1016 sel->r.width = IMX219_NATIVE_WIDTH;
1017 sel->r.height = IMX219_NATIVE_HEIGHT;
1018
1019 return 0;
1020
1021 case V4L2_SEL_TGT_CROP_DEFAULT:
1022 case V4L2_SEL_TGT_CROP_BOUNDS:
1023 sel->r.top = IMX219_PIXEL_ARRAY_TOP;
1024 sel->r.left = IMX219_PIXEL_ARRAY_LEFT;
1025 sel->r.width = IMX219_PIXEL_ARRAY_WIDTH;
1026 sel->r.height = IMX219_PIXEL_ARRAY_HEIGHT;
1027
1028 return 0;
1029 }
1030
1031 return -EINVAL;
1032 }
1033
imx219_start_streaming(struct imx219 * imx219)1034 static int imx219_start_streaming(struct imx219 *imx219)
1035 {
1036 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1037 const struct imx219_reg_list *reg_list;
1038 int ret;
1039
1040 ret = pm_runtime_resume_and_get(&client->dev);
1041 if (ret < 0)
1042 return ret;
1043
1044 /* Apply default values of current mode */
1045 reg_list = &imx219->mode->reg_list;
1046 ret = imx219_write_regs(imx219, reg_list->regs, reg_list->num_of_regs);
1047 if (ret) {
1048 dev_err(&client->dev, "%s failed to set mode\n", __func__);
1049 goto err_rpm_put;
1050 }
1051
1052 ret = imx219_set_framefmt(imx219);
1053 if (ret) {
1054 dev_err(&client->dev, "%s failed to set frame format: %d\n",
1055 __func__, ret);
1056 goto err_rpm_put;
1057 }
1058
1059 /* Apply customized values from user */
1060 ret = __v4l2_ctrl_handler_setup(imx219->sd.ctrl_handler);
1061 if (ret)
1062 goto err_rpm_put;
1063
1064 /* set stream on register */
1065 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1066 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING);
1067 if (ret)
1068 goto err_rpm_put;
1069
1070 /* vflip and hflip cannot change during streaming */
1071 __v4l2_ctrl_grab(imx219->vflip, true);
1072 __v4l2_ctrl_grab(imx219->hflip, true);
1073
1074 return 0;
1075
1076 err_rpm_put:
1077 pm_runtime_put(&client->dev);
1078 return ret;
1079 }
1080
imx219_stop_streaming(struct imx219 * imx219)1081 static void imx219_stop_streaming(struct imx219 *imx219)
1082 {
1083 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1084 int ret;
1085
1086 /* set stream off register */
1087 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1088 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY);
1089 if (ret)
1090 dev_err(&client->dev, "%s failed to set stream\n", __func__);
1091
1092 __v4l2_ctrl_grab(imx219->vflip, false);
1093 __v4l2_ctrl_grab(imx219->hflip, false);
1094
1095 pm_runtime_put(&client->dev);
1096 }
1097
imx219_set_stream(struct v4l2_subdev * sd,int enable)1098 static int imx219_set_stream(struct v4l2_subdev *sd, int enable)
1099 {
1100 struct imx219 *imx219 = to_imx219(sd);
1101 int ret = 0;
1102
1103 mutex_lock(&imx219->mutex);
1104 if (imx219->streaming == enable) {
1105 mutex_unlock(&imx219->mutex);
1106 return 0;
1107 }
1108
1109 if (enable) {
1110 /*
1111 * Apply default & customized values
1112 * and then start streaming.
1113 */
1114 ret = imx219_start_streaming(imx219);
1115 if (ret)
1116 goto err_unlock;
1117 } else {
1118 imx219_stop_streaming(imx219);
1119 }
1120
1121 imx219->streaming = enable;
1122
1123 mutex_unlock(&imx219->mutex);
1124
1125 return ret;
1126
1127 err_unlock:
1128 mutex_unlock(&imx219->mutex);
1129
1130 return ret;
1131 }
1132
1133 /* Power/clock management functions */
imx219_power_on(struct device * dev)1134 static int imx219_power_on(struct device *dev)
1135 {
1136 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1137 struct imx219 *imx219 = to_imx219(sd);
1138 int ret;
1139
1140 ret = regulator_bulk_enable(IMX219_NUM_SUPPLIES,
1141 imx219->supplies);
1142 if (ret) {
1143 dev_err(dev, "%s: failed to enable regulators\n",
1144 __func__);
1145 return ret;
1146 }
1147
1148 ret = clk_prepare_enable(imx219->xclk);
1149 if (ret) {
1150 dev_err(dev, "%s: failed to enable clock\n",
1151 __func__);
1152 goto reg_off;
1153 }
1154
1155 gpiod_set_value_cansleep(imx219->reset_gpio, 1);
1156 usleep_range(IMX219_XCLR_MIN_DELAY_US,
1157 IMX219_XCLR_MIN_DELAY_US + IMX219_XCLR_DELAY_RANGE_US);
1158
1159 return 0;
1160
1161 reg_off:
1162 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
1163
1164 return ret;
1165 }
1166
imx219_power_off(struct device * dev)1167 static int imx219_power_off(struct device *dev)
1168 {
1169 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1170 struct imx219 *imx219 = to_imx219(sd);
1171
1172 gpiod_set_value_cansleep(imx219->reset_gpio, 0);
1173 regulator_bulk_disable(IMX219_NUM_SUPPLIES, imx219->supplies);
1174 clk_disable_unprepare(imx219->xclk);
1175
1176 return 0;
1177 }
1178
imx219_suspend(struct device * dev)1179 static int __maybe_unused imx219_suspend(struct device *dev)
1180 {
1181 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1182 struct imx219 *imx219 = to_imx219(sd);
1183
1184 if (imx219->streaming)
1185 imx219_stop_streaming(imx219);
1186
1187 return 0;
1188 }
1189
imx219_resume(struct device * dev)1190 static int __maybe_unused imx219_resume(struct device *dev)
1191 {
1192 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1193 struct imx219 *imx219 = to_imx219(sd);
1194 int ret;
1195
1196 if (imx219->streaming) {
1197 ret = imx219_start_streaming(imx219);
1198 if (ret)
1199 goto error;
1200 }
1201
1202 return 0;
1203
1204 error:
1205 imx219_stop_streaming(imx219);
1206 imx219->streaming = false;
1207
1208 return ret;
1209 }
1210
imx219_get_regulators(struct imx219 * imx219)1211 static int imx219_get_regulators(struct imx219 *imx219)
1212 {
1213 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1214 unsigned int i;
1215
1216 for (i = 0; i < IMX219_NUM_SUPPLIES; i++)
1217 imx219->supplies[i].supply = imx219_supply_name[i];
1218
1219 return devm_regulator_bulk_get(&client->dev,
1220 IMX219_NUM_SUPPLIES,
1221 imx219->supplies);
1222 }
1223
1224 /* Verify chip ID */
imx219_identify_module(struct imx219 * imx219)1225 static int imx219_identify_module(struct imx219 *imx219)
1226 {
1227 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1228 int ret;
1229 u32 val;
1230
1231 ret = imx219_read_reg(imx219, IMX219_REG_CHIP_ID,
1232 IMX219_REG_VALUE_16BIT, &val);
1233 if (ret) {
1234 dev_err(&client->dev, "failed to read chip id %x\n",
1235 IMX219_CHIP_ID);
1236 return ret;
1237 }
1238
1239 if (val != IMX219_CHIP_ID) {
1240 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1241 IMX219_CHIP_ID, val);
1242 return -EIO;
1243 }
1244
1245 return 0;
1246 }
1247
1248 static const struct v4l2_subdev_core_ops imx219_core_ops = {
1249 .subscribe_event = v4l2_ctrl_subdev_subscribe_event,
1250 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
1251 };
1252
1253 static const struct v4l2_subdev_video_ops imx219_video_ops = {
1254 .s_stream = imx219_set_stream,
1255 };
1256
1257 static const struct v4l2_subdev_pad_ops imx219_pad_ops = {
1258 .enum_mbus_code = imx219_enum_mbus_code,
1259 .get_fmt = imx219_get_pad_format,
1260 .set_fmt = imx219_set_pad_format,
1261 .get_selection = imx219_get_selection,
1262 .enum_frame_size = imx219_enum_frame_size,
1263 };
1264
1265 static const struct v4l2_subdev_ops imx219_subdev_ops = {
1266 .core = &imx219_core_ops,
1267 .video = &imx219_video_ops,
1268 .pad = &imx219_pad_ops,
1269 };
1270
1271 static const struct v4l2_subdev_internal_ops imx219_internal_ops = {
1272 .open = imx219_open,
1273 };
1274
1275 /* Initialize control handlers */
imx219_init_controls(struct imx219 * imx219)1276 static int imx219_init_controls(struct imx219 *imx219)
1277 {
1278 struct i2c_client *client = v4l2_get_subdevdata(&imx219->sd);
1279 struct v4l2_ctrl_handler *ctrl_hdlr;
1280 unsigned int height = imx219->mode->height;
1281 struct v4l2_fwnode_device_properties props;
1282 int exposure_max, exposure_def, hblank;
1283 int i, ret;
1284
1285 ctrl_hdlr = &imx219->ctrl_handler;
1286 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 12);
1287 if (ret)
1288 return ret;
1289
1290 mutex_init(&imx219->mutex);
1291 ctrl_hdlr->lock = &imx219->mutex;
1292
1293 /* By default, PIXEL_RATE is read only */
1294 imx219->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1295 V4L2_CID_PIXEL_RATE,
1296 IMX219_PIXEL_RATE,
1297 IMX219_PIXEL_RATE, 1,
1298 IMX219_PIXEL_RATE);
1299
1300 imx219->link_freq =
1301 v4l2_ctrl_new_int_menu(ctrl_hdlr, &imx219_ctrl_ops,
1302 V4L2_CID_LINK_FREQ,
1303 ARRAY_SIZE(imx219_link_freq_menu) - 1, 0,
1304 imx219_link_freq_menu);
1305 if (imx219->link_freq)
1306 imx219->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1307
1308 /* Initial vblank/hblank/exposure parameters based on current mode */
1309 imx219->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1310 V4L2_CID_VBLANK, IMX219_VBLANK_MIN,
1311 IMX219_VTS_MAX - height, 1,
1312 imx219->mode->vts_def - height);
1313 hblank = IMX219_PPL_DEFAULT - imx219->mode->width;
1314 imx219->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1315 V4L2_CID_HBLANK, hblank, hblank,
1316 1, hblank);
1317 if (imx219->hblank)
1318 imx219->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1319 exposure_max = imx219->mode->vts_def - 4;
1320 exposure_def = (exposure_max < IMX219_EXPOSURE_DEFAULT) ?
1321 exposure_max : IMX219_EXPOSURE_DEFAULT;
1322 imx219->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1323 V4L2_CID_EXPOSURE,
1324 IMX219_EXPOSURE_MIN, exposure_max,
1325 IMX219_EXPOSURE_STEP,
1326 exposure_def);
1327
1328 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1329 IMX219_ANA_GAIN_MIN, IMX219_ANA_GAIN_MAX,
1330 IMX219_ANA_GAIN_STEP, IMX219_ANA_GAIN_DEFAULT);
1331
1332 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1333 IMX219_DGTL_GAIN_MIN, IMX219_DGTL_GAIN_MAX,
1334 IMX219_DGTL_GAIN_STEP, IMX219_DGTL_GAIN_DEFAULT);
1335
1336 imx219->hflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1337 V4L2_CID_HFLIP, 0, 1, 1, 0);
1338 if (imx219->hflip)
1339 imx219->hflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1340
1341 imx219->vflip = v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1342 V4L2_CID_VFLIP, 0, 1, 1, 0);
1343 if (imx219->vflip)
1344 imx219->vflip->flags |= V4L2_CTRL_FLAG_MODIFY_LAYOUT;
1345
1346 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &imx219_ctrl_ops,
1347 V4L2_CID_TEST_PATTERN,
1348 ARRAY_SIZE(imx219_test_pattern_menu) - 1,
1349 0, 0, imx219_test_pattern_menu);
1350 for (i = 0; i < 4; i++) {
1351 /*
1352 * The assumption is that
1353 * V4L2_CID_TEST_PATTERN_GREENR == V4L2_CID_TEST_PATTERN_RED + 1
1354 * V4L2_CID_TEST_PATTERN_BLUE == V4L2_CID_TEST_PATTERN_RED + 2
1355 * V4L2_CID_TEST_PATTERN_GREENB == V4L2_CID_TEST_PATTERN_RED + 3
1356 */
1357 v4l2_ctrl_new_std(ctrl_hdlr, &imx219_ctrl_ops,
1358 V4L2_CID_TEST_PATTERN_RED + i,
1359 IMX219_TESTP_COLOUR_MIN,
1360 IMX219_TESTP_COLOUR_MAX,
1361 IMX219_TESTP_COLOUR_STEP,
1362 IMX219_TESTP_COLOUR_MAX);
1363 /* The "Solid color" pattern is white by default */
1364 }
1365
1366 if (ctrl_hdlr->error) {
1367 ret = ctrl_hdlr->error;
1368 dev_err(&client->dev, "%s control init failed (%d)\n",
1369 __func__, ret);
1370 goto error;
1371 }
1372
1373 ret = v4l2_fwnode_device_parse(&client->dev, &props);
1374 if (ret)
1375 goto error;
1376
1377 ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &imx219_ctrl_ops,
1378 &props);
1379 if (ret)
1380 goto error;
1381
1382 imx219->sd.ctrl_handler = ctrl_hdlr;
1383
1384 return 0;
1385
1386 error:
1387 v4l2_ctrl_handler_free(ctrl_hdlr);
1388 mutex_destroy(&imx219->mutex);
1389
1390 return ret;
1391 }
1392
imx219_free_controls(struct imx219 * imx219)1393 static void imx219_free_controls(struct imx219 *imx219)
1394 {
1395 v4l2_ctrl_handler_free(imx219->sd.ctrl_handler);
1396 mutex_destroy(&imx219->mutex);
1397 }
1398
imx219_check_hwcfg(struct device * dev)1399 static int imx219_check_hwcfg(struct device *dev)
1400 {
1401 struct fwnode_handle *endpoint;
1402 struct v4l2_fwnode_endpoint ep_cfg = {
1403 .bus_type = V4L2_MBUS_CSI2_DPHY
1404 };
1405 int ret = -EINVAL;
1406
1407 endpoint = fwnode_graph_get_next_endpoint(dev_fwnode(dev), NULL);
1408 if (!endpoint) {
1409 dev_err(dev, "endpoint node not found\n");
1410 return -EINVAL;
1411 }
1412
1413 if (v4l2_fwnode_endpoint_alloc_parse(endpoint, &ep_cfg)) {
1414 dev_err(dev, "could not parse endpoint\n");
1415 goto error_out;
1416 }
1417
1418 /* Check the number of MIPI CSI2 data lanes */
1419 if (ep_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1420 dev_err(dev, "only 2 data lanes are currently supported\n");
1421 goto error_out;
1422 }
1423
1424 /* Check the link frequency set in device tree */
1425 if (!ep_cfg.nr_of_link_frequencies) {
1426 dev_err(dev, "link-frequency property not found in DT\n");
1427 goto error_out;
1428 }
1429
1430 if (ep_cfg.nr_of_link_frequencies != 1 ||
1431 ep_cfg.link_frequencies[0] != IMX219_DEFAULT_LINK_FREQ) {
1432 dev_err(dev, "Link frequency not supported: %lld\n",
1433 ep_cfg.link_frequencies[0]);
1434 goto error_out;
1435 }
1436
1437 ret = 0;
1438
1439 error_out:
1440 v4l2_fwnode_endpoint_free(&ep_cfg);
1441 fwnode_handle_put(endpoint);
1442
1443 return ret;
1444 }
1445
imx219_probe(struct i2c_client * client)1446 static int imx219_probe(struct i2c_client *client)
1447 {
1448 struct device *dev = &client->dev;
1449 struct imx219 *imx219;
1450 int ret;
1451
1452 imx219 = devm_kzalloc(&client->dev, sizeof(*imx219), GFP_KERNEL);
1453 if (!imx219)
1454 return -ENOMEM;
1455
1456 v4l2_i2c_subdev_init(&imx219->sd, client, &imx219_subdev_ops);
1457
1458 /* Check the hardware configuration in device tree */
1459 if (imx219_check_hwcfg(dev))
1460 return -EINVAL;
1461
1462 /* Get system clock (xclk) */
1463 imx219->xclk = devm_clk_get(dev, NULL);
1464 if (IS_ERR(imx219->xclk)) {
1465 dev_err(dev, "failed to get xclk\n");
1466 return PTR_ERR(imx219->xclk);
1467 }
1468
1469 imx219->xclk_freq = clk_get_rate(imx219->xclk);
1470 if (imx219->xclk_freq != IMX219_XCLK_FREQ) {
1471 dev_err(dev, "xclk frequency not supported: %d Hz\n",
1472 imx219->xclk_freq);
1473 return -EINVAL;
1474 }
1475
1476 ret = imx219_get_regulators(imx219);
1477 if (ret) {
1478 dev_err(dev, "failed to get regulators\n");
1479 return ret;
1480 }
1481
1482 /* Request optional enable pin */
1483 imx219->reset_gpio = devm_gpiod_get_optional(dev, "reset",
1484 GPIOD_OUT_HIGH);
1485
1486 /*
1487 * The sensor must be powered for imx219_identify_module()
1488 * to be able to read the CHIP_ID register
1489 */
1490 ret = imx219_power_on(dev);
1491 if (ret)
1492 return ret;
1493
1494 ret = imx219_identify_module(imx219);
1495 if (ret)
1496 goto error_power_off;
1497
1498 /* Set default mode to max resolution */
1499 imx219->mode = &supported_modes[0];
1500
1501 /* sensor doesn't enter LP-11 state upon power up until and unless
1502 * streaming is started, so upon power up switch the modes to:
1503 * streaming -> standby
1504 */
1505 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1506 IMX219_REG_VALUE_08BIT, IMX219_MODE_STREAMING);
1507 if (ret < 0)
1508 goto error_power_off;
1509 usleep_range(100, 110);
1510
1511 /* put sensor back to standby mode */
1512 ret = imx219_write_reg(imx219, IMX219_REG_MODE_SELECT,
1513 IMX219_REG_VALUE_08BIT, IMX219_MODE_STANDBY);
1514 if (ret < 0)
1515 goto error_power_off;
1516 usleep_range(100, 110);
1517
1518 ret = imx219_init_controls(imx219);
1519 if (ret)
1520 goto error_power_off;
1521
1522 /* Initialize subdev */
1523 imx219->sd.internal_ops = &imx219_internal_ops;
1524 imx219->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1525 V4L2_SUBDEV_FL_HAS_EVENTS;
1526 imx219->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1527
1528 /* Initialize source pad */
1529 imx219->pad.flags = MEDIA_PAD_FL_SOURCE;
1530
1531 /* Initialize default format */
1532 imx219_set_default_format(imx219);
1533
1534 ret = media_entity_pads_init(&imx219->sd.entity, 1, &imx219->pad);
1535 if (ret) {
1536 dev_err(dev, "failed to init entity pads: %d\n", ret);
1537 goto error_handler_free;
1538 }
1539
1540 ret = v4l2_async_register_subdev_sensor(&imx219->sd);
1541 if (ret < 0) {
1542 dev_err(dev, "failed to register sensor sub-device: %d\n", ret);
1543 goto error_media_entity;
1544 }
1545
1546 /* Enable runtime PM and turn off the device */
1547 pm_runtime_set_active(dev);
1548 pm_runtime_enable(dev);
1549 pm_runtime_idle(dev);
1550
1551 return 0;
1552
1553 error_media_entity:
1554 media_entity_cleanup(&imx219->sd.entity);
1555
1556 error_handler_free:
1557 imx219_free_controls(imx219);
1558
1559 error_power_off:
1560 imx219_power_off(dev);
1561
1562 return ret;
1563 }
1564
imx219_remove(struct i2c_client * client)1565 static void imx219_remove(struct i2c_client *client)
1566 {
1567 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1568 struct imx219 *imx219 = to_imx219(sd);
1569
1570 v4l2_async_unregister_subdev(sd);
1571 media_entity_cleanup(&sd->entity);
1572 imx219_free_controls(imx219);
1573
1574 pm_runtime_disable(&client->dev);
1575 if (!pm_runtime_status_suspended(&client->dev))
1576 imx219_power_off(&client->dev);
1577 pm_runtime_set_suspended(&client->dev);
1578 }
1579
1580 static const struct of_device_id imx219_dt_ids[] = {
1581 { .compatible = "sony,imx219" },
1582 { /* sentinel */ }
1583 };
1584 MODULE_DEVICE_TABLE(of, imx219_dt_ids);
1585
1586 static const struct dev_pm_ops imx219_pm_ops = {
1587 SET_SYSTEM_SLEEP_PM_OPS(imx219_suspend, imx219_resume)
1588 SET_RUNTIME_PM_OPS(imx219_power_off, imx219_power_on, NULL)
1589 };
1590
1591 static struct i2c_driver imx219_i2c_driver = {
1592 .driver = {
1593 .name = "imx219",
1594 .of_match_table = imx219_dt_ids,
1595 .pm = &imx219_pm_ops,
1596 },
1597 .probe_new = imx219_probe,
1598 .remove = imx219_remove,
1599 };
1600
1601 module_i2c_driver(imx219_i2c_driver);
1602
1603 MODULE_AUTHOR("Dave Stevenson <dave.stevenson@raspberrypi.com");
1604 MODULE_DESCRIPTION("Sony IMX219 sensor driver");
1605 MODULE_LICENSE("GPL v2");
1606
