1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2019 Intel Corporation.
3
4 #include <asm/unaligned.h>
5 #include <linux/acpi.h>
6 #include <linux/delay.h>
7 #include <linux/i2c.h>
8 #include <linux/module.h>
9 #include <linux/pm_runtime.h>
10 #include <media/v4l2-ctrls.h>
11 #include <media/v4l2-device.h>
12 #include <media/v4l2-fwnode.h>
13
14 #define HI556_REG_VALUE_08BIT 1
15 #define HI556_REG_VALUE_16BIT 2
16 #define HI556_REG_VALUE_24BIT 3
17
18 #define HI556_LINK_FREQ_437MHZ 437000000ULL
19 #define HI556_MCLK 19200000
20 #define HI556_DATA_LANES 2
21 #define HI556_RGB_DEPTH 10
22
23 #define HI556_REG_CHIP_ID 0x0f16
24 #define HI556_CHIP_ID 0x0556
25
26 #define HI556_REG_MODE_SELECT 0x0a00
27 #define HI556_MODE_STANDBY 0x0000
28 #define HI556_MODE_STREAMING 0x0100
29
30 /* vertical-timings from sensor */
31 #define HI556_REG_FLL 0x0006
32 #define HI556_FLL_30FPS 0x0814
33 #define HI556_FLL_30FPS_MIN 0x0814
34 #define HI556_FLL_MAX 0x7fff
35
36 /* horizontal-timings from sensor */
37 #define HI556_REG_LLP 0x0008
38
39 /* Exposure controls from sensor */
40 #define HI556_REG_EXPOSURE 0x0074
41 #define HI556_EXPOSURE_MIN 6
42 #define HI556_EXPOSURE_MAX_MARGIN 2
43 #define HI556_EXPOSURE_STEP 1
44
45 /* Analog gain controls from sensor */
46 #define HI556_REG_ANALOG_GAIN 0x0077
47 #define HI556_ANAL_GAIN_MIN 0
48 #define HI556_ANAL_GAIN_MAX 240
49 #define HI556_ANAL_GAIN_STEP 1
50
51 /* Digital gain controls from sensor */
52 #define HI556_REG_MWB_GR_GAIN 0x0078
53 #define HI556_REG_MWB_GB_GAIN 0x007a
54 #define HI556_REG_MWB_R_GAIN 0x007c
55 #define HI556_REG_MWB_B_GAIN 0x007e
56 #define HI556_DGTL_GAIN_MIN 0
57 #define HI556_DGTL_GAIN_MAX 2048
58 #define HI556_DGTL_GAIN_STEP 1
59 #define HI556_DGTL_GAIN_DEFAULT 256
60
61 /* Test Pattern Control */
62 #define HI556_REG_ISP 0X0a05
63 #define HI556_REG_ISP_TPG_EN 0x01
64 #define HI556_REG_TEST_PATTERN 0x0201
65
66 /* HI556 native and active pixel array size. */
67 #define HI556_NATIVE_WIDTH 2592U
68 #define HI556_NATIVE_HEIGHT 1944U
69 #define HI556_PIXEL_ARRAY_LEFT 0U
70 #define HI556_PIXEL_ARRAY_TOP 0U
71 #define HI556_PIXEL_ARRAY_WIDTH 2592U
72 #define HI556_PIXEL_ARRAY_HEIGHT 1944U
73
74 enum {
75 HI556_LINK_FREQ_437MHZ_INDEX,
76 };
77
78 struct hi556_reg {
79 u16 address;
80 u16 val;
81 };
82
83 struct hi556_reg_list {
84 u32 num_of_regs;
85 const struct hi556_reg *regs;
86 };
87
88 struct hi556_link_freq_config {
89 const struct hi556_reg_list reg_list;
90 };
91
92 struct hi556_mode {
93 /* Frame width in pixels */
94 u32 width;
95
96 /* Frame height in pixels */
97 u32 height;
98
99 /* Analog crop rectangle. */
100 struct v4l2_rect crop;
101
102 /* Horizontal timining size */
103 u32 llp;
104
105 /* Default vertical timining size */
106 u32 fll_def;
107
108 /* Min vertical timining size */
109 u32 fll_min;
110
111 /* Link frequency needed for this resolution */
112 u32 link_freq_index;
113
114 /* Sensor register settings for this resolution */
115 const struct hi556_reg_list reg_list;
116 };
117
118 #define to_hi556(_sd) container_of(_sd, struct hi556, sd)
119
120 //SENSOR_INITIALIZATION
121 static const struct hi556_reg mipi_data_rate_874mbps[] = {
122 {0x0e00, 0x0102},
123 {0x0e02, 0x0102},
124 {0x0e0c, 0x0100},
125 {0x2000, 0x7400},
126 {0x2002, 0x001c},
127 {0x2004, 0x0242},
128 {0x2006, 0x0942},
129 {0x2008, 0x7007},
130 {0x200a, 0x0fd9},
131 {0x200c, 0x0259},
132 {0x200e, 0x7008},
133 {0x2010, 0x160e},
134 {0x2012, 0x0047},
135 {0x2014, 0x2118},
136 {0x2016, 0x0041},
137 {0x2018, 0x00d8},
138 {0x201a, 0x0145},
139 {0x201c, 0x0006},
140 {0x201e, 0x0181},
141 {0x2020, 0x13cc},
142 {0x2022, 0x2057},
143 {0x2024, 0x7001},
144 {0x2026, 0x0fca},
145 {0x2028, 0x00cb},
146 {0x202a, 0x009f},
147 {0x202c, 0x7002},
148 {0x202e, 0x13cc},
149 {0x2030, 0x019b},
150 {0x2032, 0x014d},
151 {0x2034, 0x2987},
152 {0x2036, 0x2766},
153 {0x2038, 0x0020},
154 {0x203a, 0x2060},
155 {0x203c, 0x0e5d},
156 {0x203e, 0x181d},
157 {0x2040, 0x2066},
158 {0x2042, 0x20c4},
159 {0x2044, 0x5000},
160 {0x2046, 0x0005},
161 {0x2048, 0x0000},
162 {0x204a, 0x01db},
163 {0x204c, 0x025a},
164 {0x204e, 0x00c0},
165 {0x2050, 0x0005},
166 {0x2052, 0x0006},
167 {0x2054, 0x0ad9},
168 {0x2056, 0x0259},
169 {0x2058, 0x0618},
170 {0x205a, 0x0258},
171 {0x205c, 0x2266},
172 {0x205e, 0x20c8},
173 {0x2060, 0x2060},
174 {0x2062, 0x707b},
175 {0x2064, 0x0fdd},
176 {0x2066, 0x81b8},
177 {0x2068, 0x5040},
178 {0x206a, 0x0020},
179 {0x206c, 0x5060},
180 {0x206e, 0x3143},
181 {0x2070, 0x5081},
182 {0x2072, 0x025c},
183 {0x2074, 0x7800},
184 {0x2076, 0x7400},
185 {0x2078, 0x001c},
186 {0x207a, 0x0242},
187 {0x207c, 0x0942},
188 {0x207e, 0x0bd9},
189 {0x2080, 0x0259},
190 {0x2082, 0x7008},
191 {0x2084, 0x160e},
192 {0x2086, 0x0047},
193 {0x2088, 0x2118},
194 {0x208a, 0x0041},
195 {0x208c, 0x00d8},
196 {0x208e, 0x0145},
197 {0x2090, 0x0006},
198 {0x2092, 0x0181},
199 {0x2094, 0x13cc},
200 {0x2096, 0x2057},
201 {0x2098, 0x7001},
202 {0x209a, 0x0fca},
203 {0x209c, 0x00cb},
204 {0x209e, 0x009f},
205 {0x20a0, 0x7002},
206 {0x20a2, 0x13cc},
207 {0x20a4, 0x019b},
208 {0x20a6, 0x014d},
209 {0x20a8, 0x2987},
210 {0x20aa, 0x2766},
211 {0x20ac, 0x0020},
212 {0x20ae, 0x2060},
213 {0x20b0, 0x0e5d},
214 {0x20b2, 0x181d},
215 {0x20b4, 0x2066},
216 {0x20b6, 0x20c4},
217 {0x20b8, 0x50a0},
218 {0x20ba, 0x0005},
219 {0x20bc, 0x0000},
220 {0x20be, 0x01db},
221 {0x20c0, 0x025a},
222 {0x20c2, 0x00c0},
223 {0x20c4, 0x0005},
224 {0x20c6, 0x0006},
225 {0x20c8, 0x0ad9},
226 {0x20ca, 0x0259},
227 {0x20cc, 0x0618},
228 {0x20ce, 0x0258},
229 {0x20d0, 0x2266},
230 {0x20d2, 0x20c8},
231 {0x20d4, 0x2060},
232 {0x20d6, 0x707b},
233 {0x20d8, 0x0fdd},
234 {0x20da, 0x86b8},
235 {0x20dc, 0x50e0},
236 {0x20de, 0x0020},
237 {0x20e0, 0x5100},
238 {0x20e2, 0x3143},
239 {0x20e4, 0x5121},
240 {0x20e6, 0x7800},
241 {0x20e8, 0x3140},
242 {0x20ea, 0x01c4},
243 {0x20ec, 0x01c1},
244 {0x20ee, 0x01c0},
245 {0x20f0, 0x01c4},
246 {0x20f2, 0x2700},
247 {0x20f4, 0x3d40},
248 {0x20f6, 0x7800},
249 {0x20f8, 0xffff},
250 {0x27fe, 0xe000},
251 {0x3000, 0x60f8},
252 {0x3002, 0x187f},
253 {0x3004, 0x7060},
254 {0x3006, 0x0114},
255 {0x3008, 0x60b0},
256 {0x300a, 0x1473},
257 {0x300c, 0x0013},
258 {0x300e, 0x140f},
259 {0x3010, 0x0040},
260 {0x3012, 0x100f},
261 {0x3014, 0x60f8},
262 {0x3016, 0x187f},
263 {0x3018, 0x7060},
264 {0x301a, 0x0114},
265 {0x301c, 0x60b0},
266 {0x301e, 0x1473},
267 {0x3020, 0x0013},
268 {0x3022, 0x140f},
269 {0x3024, 0x0040},
270 {0x3026, 0x000f},
271
272 {0x0b00, 0x0000},
273 {0x0b02, 0x0045},
274 {0x0b04, 0xb405},
275 {0x0b06, 0xc403},
276 {0x0b08, 0x0081},
277 {0x0b0a, 0x8252},
278 {0x0b0c, 0xf814},
279 {0x0b0e, 0xc618},
280 {0x0b10, 0xa828},
281 {0x0b12, 0x004c},
282 {0x0b14, 0x4068},
283 {0x0b16, 0x0000},
284 {0x0f30, 0x5b15},
285 {0x0f32, 0x7067},
286 {0x0954, 0x0009},
287 {0x0956, 0x0000},
288 {0x0958, 0xbb80},
289 {0x095a, 0x5140},
290 {0x0c00, 0x1110},
291 {0x0c02, 0x0011},
292 {0x0c04, 0x0000},
293 {0x0c06, 0x0200},
294 {0x0c10, 0x0040},
295 {0x0c12, 0x0040},
296 {0x0c14, 0x0040},
297 {0x0c16, 0x0040},
298 {0x0a10, 0x4000},
299 {0x3068, 0xf800},
300 {0x306a, 0xf876},
301 {0x006c, 0x0000},
302 {0x005e, 0x0200},
303 {0x000e, 0x0100},
304 {0x0e0a, 0x0001},
305 {0x004a, 0x0100},
306 {0x004c, 0x0000},
307 {0x004e, 0x0100},
308 {0x000c, 0x0022},
309 {0x0008, 0x0b00},
310 {0x005a, 0x0202},
311 {0x0012, 0x000e},
312 {0x0018, 0x0a33},
313 {0x0022, 0x0008},
314 {0x0028, 0x0017},
315 {0x0024, 0x0028},
316 {0x002a, 0x002d},
317 {0x0026, 0x0030},
318 {0x002c, 0x07c9},
319 {0x002e, 0x1111},
320 {0x0030, 0x1111},
321 {0x0032, 0x1111},
322 {0x0006, 0x07bc},
323 {0x0a22, 0x0000},
324 {0x0a12, 0x0a20},
325 {0x0a14, 0x0798},
326 {0x003e, 0x0000},
327 {0x0074, 0x080e},
328 {0x0070, 0x0407},
329 {0x0002, 0x0000},
330 {0x0a02, 0x0100},
331 {0x0a24, 0x0100},
332 {0x0046, 0x0000},
333 {0x0076, 0x0000},
334 {0x0060, 0x0000},
335 {0x0062, 0x0530},
336 {0x0064, 0x0500},
337 {0x0066, 0x0530},
338 {0x0068, 0x0500},
339 {0x0122, 0x0300},
340 {0x015a, 0xff08},
341 {0x0804, 0x0300},
342 {0x0806, 0x0100},
343 {0x005c, 0x0102},
344 {0x0a1a, 0x0800},
345 };
346
347 static const struct hi556_reg mode_2592x1944_regs[] = {
348 {0x0a00, 0x0000},
349 {0x0b0a, 0x8252},
350 {0x0f30, 0x5b15},
351 {0x0f32, 0x7067},
352 {0x004a, 0x0100},
353 {0x004c, 0x0000},
354 {0x004e, 0x0100},
355 {0x000c, 0x0022},
356 {0x0008, 0x0b00},
357 {0x005a, 0x0202},
358 {0x0012, 0x000e},
359 {0x0018, 0x0a33},
360 {0x0022, 0x0008},
361 {0x0028, 0x0017},
362 {0x0024, 0x0028},
363 {0x002a, 0x002d},
364 {0x0026, 0x0030},
365 {0x002c, 0x07c9},
366 {0x002e, 0x1111},
367 {0x0030, 0x1111},
368 {0x0032, 0x1111},
369 {0x0006, 0x0814},
370 {0x0a22, 0x0000},
371 {0x0a12, 0x0a20},
372 {0x0a14, 0x0798},
373 {0x003e, 0x0000},
374 {0x0074, 0x0812},
375 {0x0070, 0x0409},
376 {0x0804, 0x0300},
377 {0x0806, 0x0100},
378 {0x0a04, 0x014a},
379 {0x090c, 0x0fdc},
380 {0x090e, 0x002d},
381
382 {0x0902, 0x4319},
383 {0x0914, 0xc10a},
384 {0x0916, 0x071f},
385 {0x0918, 0x0408},
386 {0x091a, 0x0c0d},
387 {0x091c, 0x0f09},
388 {0x091e, 0x0a00},
389 {0x0958, 0xbb80},
390 };
391
392 static const struct hi556_reg mode_2592x1444_regs[] = {
393 {0x0a00, 0x0000},
394 {0x0b0a, 0x8252},
395 {0x0f30, 0xe545},
396 {0x0f32, 0x7067},
397 {0x004a, 0x0100},
398 {0x004c, 0x0000},
399 {0x000c, 0x0022},
400 {0x0008, 0x0b00},
401 {0x005a, 0x0202},
402 {0x0012, 0x000e},
403 {0x0018, 0x0a33},
404 {0x0022, 0x0008},
405 {0x0028, 0x0017},
406 {0x0024, 0x0122},
407 {0x002a, 0x0127},
408 {0x0026, 0x012a},
409 {0x002c, 0x06cf},
410 {0x002e, 0x1111},
411 {0x0030, 0x1111},
412 {0x0032, 0x1111},
413 {0x0006, 0x0821},
414 {0x0a22, 0x0000},
415 {0x0a12, 0x0a20},
416 {0x0a14, 0x05a4},
417 {0x003e, 0x0000},
418 {0x0074, 0x081f},
419 {0x0070, 0x040f},
420 {0x0804, 0x0300},
421 {0x0806, 0x0100},
422 {0x0a04, 0x014a},
423 {0x090c, 0x0fdc},
424 {0x090e, 0x002d},
425 {0x0902, 0x4319},
426 {0x0914, 0xc10a},
427 {0x0916, 0x071f},
428 {0x0918, 0x0408},
429 {0x091a, 0x0c0d},
430 {0x091c, 0x0f09},
431 {0x091e, 0x0a00},
432 {0x0958, 0xbb80},
433 };
434
435 static const struct hi556_reg mode_1296x972_regs[] = {
436 {0x0a00, 0x0000},
437 {0x0b0a, 0x8259},
438 {0x0f30, 0x5b15},
439 {0x0f32, 0x7167},
440 {0x004a, 0x0100},
441 {0x004c, 0x0000},
442 {0x004e, 0x0100},
443 {0x000c, 0x0122},
444 {0x0008, 0x0b00},
445 {0x005a, 0x0404},
446 {0x0012, 0x000c},
447 {0x0018, 0x0a33},
448 {0x0022, 0x0008},
449 {0x0028, 0x0017},
450 {0x0024, 0x0022},
451 {0x002a, 0x002b},
452 {0x0026, 0x0030},
453 {0x002c, 0x07c9},
454 {0x002e, 0x3311},
455 {0x0030, 0x3311},
456 {0x0032, 0x3311},
457 {0x0006, 0x0814},
458 {0x0a22, 0x0000},
459 {0x0a12, 0x0510},
460 {0x0a14, 0x03cc},
461 {0x003e, 0x0000},
462 {0x0074, 0x0812},
463 {0x0070, 0x0409},
464 {0x0804, 0x0308},
465 {0x0806, 0x0100},
466 {0x0a04, 0x016a},
467 {0x090e, 0x0010},
468 {0x090c, 0x09c0},
469
470 {0x0902, 0x4319},
471 {0x0914, 0xc106},
472 {0x0916, 0x040e},
473 {0x0918, 0x0304},
474 {0x091a, 0x0708},
475 {0x091c, 0x0e06},
476 {0x091e, 0x0300},
477 {0x0958, 0xbb80},
478 };
479
480 static const char * const hi556_test_pattern_menu[] = {
481 "Disabled",
482 "Solid Colour",
483 "100% Colour Bars",
484 "Fade To Grey Colour Bars",
485 "PN9",
486 "Gradient Horizontal",
487 "Gradient Vertical",
488 "Check Board",
489 "Slant Pattern",
490 };
491
492 static const s64 link_freq_menu_items[] = {
493 HI556_LINK_FREQ_437MHZ,
494 };
495
496 static const struct hi556_link_freq_config link_freq_configs[] = {
497 [HI556_LINK_FREQ_437MHZ_INDEX] = {
498 .reg_list = {
499 .num_of_regs = ARRAY_SIZE(mipi_data_rate_874mbps),
500 .regs = mipi_data_rate_874mbps,
501 }
502 }
503 };
504
505 static const struct hi556_mode supported_modes[] = {
506 {
507 .width = HI556_PIXEL_ARRAY_WIDTH,
508 .height = HI556_PIXEL_ARRAY_HEIGHT,
509 .crop = {
510 .left = HI556_PIXEL_ARRAY_LEFT,
511 .top = HI556_PIXEL_ARRAY_TOP,
512 .width = HI556_PIXEL_ARRAY_WIDTH,
513 .height = HI556_PIXEL_ARRAY_HEIGHT
514 },
515 .fll_def = HI556_FLL_30FPS,
516 .fll_min = HI556_FLL_30FPS_MIN,
517 .llp = 0x0b00,
518 .reg_list = {
519 .num_of_regs = ARRAY_SIZE(mode_2592x1944_regs),
520 .regs = mode_2592x1944_regs,
521 },
522 .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
523 },
524 {
525 .width = HI556_PIXEL_ARRAY_WIDTH,
526 .height = 1444,
527 .crop = {
528 .left = HI556_PIXEL_ARRAY_LEFT,
529 .top = 250,
530 .width = HI556_PIXEL_ARRAY_WIDTH,
531 .height = 1444
532 },
533 .fll_def = 0x821,
534 .fll_min = 0x821,
535 .llp = 0x0b00,
536 .reg_list = {
537 .num_of_regs = ARRAY_SIZE(mode_2592x1444_regs),
538 .regs = mode_2592x1444_regs,
539 },
540 .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
541 },
542 {
543 .width = 1296,
544 .height = 972,
545 .crop = {
546 .left = HI556_PIXEL_ARRAY_LEFT,
547 .top = HI556_PIXEL_ARRAY_TOP,
548 .width = HI556_PIXEL_ARRAY_WIDTH,
549 .height = HI556_PIXEL_ARRAY_HEIGHT
550 },
551 .fll_def = HI556_FLL_30FPS,
552 .fll_min = HI556_FLL_30FPS_MIN,
553 .llp = 0x0b00,
554 .reg_list = {
555 .num_of_regs = ARRAY_SIZE(mode_1296x972_regs),
556 .regs = mode_1296x972_regs,
557 },
558 .link_freq_index = HI556_LINK_FREQ_437MHZ_INDEX,
559 }
560 };
561
562 struct hi556 {
563 struct v4l2_subdev sd;
564 struct media_pad pad;
565 struct v4l2_ctrl_handler ctrl_handler;
566
567 /* V4L2 Controls */
568 struct v4l2_ctrl *link_freq;
569 struct v4l2_ctrl *pixel_rate;
570 struct v4l2_ctrl *vblank;
571 struct v4l2_ctrl *hblank;
572 struct v4l2_ctrl *exposure;
573
574 /* Current mode */
575 const struct hi556_mode *cur_mode;
576
577 /* To serialize asynchronus callbacks */
578 struct mutex mutex;
579
580 /* Streaming on/off */
581 bool streaming;
582
583 /* True if the device has been identified */
584 bool identified;
585 };
586
to_pixel_rate(u32 f_index)587 static u64 to_pixel_rate(u32 f_index)
588 {
589 u64 pixel_rate = link_freq_menu_items[f_index] * 2 * HI556_DATA_LANES;
590
591 do_div(pixel_rate, HI556_RGB_DEPTH);
592
593 return pixel_rate;
594 }
595
hi556_read_reg(struct hi556 * hi556,u16 reg,u16 len,u32 * val)596 static int hi556_read_reg(struct hi556 *hi556, u16 reg, u16 len, u32 *val)
597 {
598 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
599 struct i2c_msg msgs[2];
600 u8 addr_buf[2];
601 u8 data_buf[4] = {0};
602 int ret;
603
604 if (len > 4)
605 return -EINVAL;
606
607 put_unaligned_be16(reg, addr_buf);
608 msgs[0].addr = client->addr;
609 msgs[0].flags = 0;
610 msgs[0].len = sizeof(addr_buf);
611 msgs[0].buf = addr_buf;
612 msgs[1].addr = client->addr;
613 msgs[1].flags = I2C_M_RD;
614 msgs[1].len = len;
615 msgs[1].buf = &data_buf[4 - len];
616
617 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
618 if (ret != ARRAY_SIZE(msgs))
619 return -EIO;
620
621 *val = get_unaligned_be32(data_buf);
622
623 return 0;
624 }
625
hi556_write_reg(struct hi556 * hi556,u16 reg,u16 len,u32 val)626 static int hi556_write_reg(struct hi556 *hi556, u16 reg, u16 len, u32 val)
627 {
628 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
629 u8 buf[6];
630
631 if (len > 4)
632 return -EINVAL;
633
634 put_unaligned_be16(reg, buf);
635 put_unaligned_be32(val << 8 * (4 - len), buf + 2);
636 if (i2c_master_send(client, buf, len + 2) != len + 2)
637 return -EIO;
638
639 return 0;
640 }
641
hi556_write_reg_list(struct hi556 * hi556,const struct hi556_reg_list * r_list)642 static int hi556_write_reg_list(struct hi556 *hi556,
643 const struct hi556_reg_list *r_list)
644 {
645 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
646 unsigned int i;
647 int ret;
648
649 for (i = 0; i < r_list->num_of_regs; i++) {
650 ret = hi556_write_reg(hi556, r_list->regs[i].address,
651 HI556_REG_VALUE_16BIT,
652 r_list->regs[i].val);
653 if (ret) {
654 dev_err_ratelimited(&client->dev,
655 "failed to write reg 0x%4.4x. error = %d",
656 r_list->regs[i].address, ret);
657 return ret;
658 }
659 }
660
661 return 0;
662 }
663
hi556_update_digital_gain(struct hi556 * hi556,u32 d_gain)664 static int hi556_update_digital_gain(struct hi556 *hi556, u32 d_gain)
665 {
666 int ret;
667
668 ret = hi556_write_reg(hi556, HI556_REG_MWB_GR_GAIN,
669 HI556_REG_VALUE_16BIT, d_gain);
670 if (ret)
671 return ret;
672
673 ret = hi556_write_reg(hi556, HI556_REG_MWB_GB_GAIN,
674 HI556_REG_VALUE_16BIT, d_gain);
675 if (ret)
676 return ret;
677
678 ret = hi556_write_reg(hi556, HI556_REG_MWB_R_GAIN,
679 HI556_REG_VALUE_16BIT, d_gain);
680 if (ret)
681 return ret;
682
683 return hi556_write_reg(hi556, HI556_REG_MWB_B_GAIN,
684 HI556_REG_VALUE_16BIT, d_gain);
685 }
686
hi556_test_pattern(struct hi556 * hi556,u32 pattern)687 static int hi556_test_pattern(struct hi556 *hi556, u32 pattern)
688 {
689 int ret;
690 u32 val;
691
692 if (pattern) {
693 ret = hi556_read_reg(hi556, HI556_REG_ISP,
694 HI556_REG_VALUE_08BIT, &val);
695 if (ret)
696 return ret;
697
698 ret = hi556_write_reg(hi556, HI556_REG_ISP,
699 HI556_REG_VALUE_08BIT,
700 val | HI556_REG_ISP_TPG_EN);
701 if (ret)
702 return ret;
703 }
704
705 return hi556_write_reg(hi556, HI556_REG_TEST_PATTERN,
706 HI556_REG_VALUE_08BIT, pattern);
707 }
708
hi556_set_ctrl(struct v4l2_ctrl * ctrl)709 static int hi556_set_ctrl(struct v4l2_ctrl *ctrl)
710 {
711 struct hi556 *hi556 = container_of(ctrl->handler,
712 struct hi556, ctrl_handler);
713 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
714 s64 exposure_max;
715 int ret = 0;
716
717 /* Propagate change of current control to all related controls */
718 if (ctrl->id == V4L2_CID_VBLANK) {
719 /* Update max exposure while meeting expected vblanking */
720 exposure_max = hi556->cur_mode->height + ctrl->val -
721 HI556_EXPOSURE_MAX_MARGIN;
722 __v4l2_ctrl_modify_range(hi556->exposure,
723 hi556->exposure->minimum,
724 exposure_max, hi556->exposure->step,
725 exposure_max);
726 }
727
728 /* V4L2 controls values will be applied only when power is already up */
729 if (!pm_runtime_get_if_in_use(&client->dev))
730 return 0;
731
732 switch (ctrl->id) {
733 case V4L2_CID_ANALOGUE_GAIN:
734 ret = hi556_write_reg(hi556, HI556_REG_ANALOG_GAIN,
735 HI556_REG_VALUE_16BIT, ctrl->val);
736 break;
737
738 case V4L2_CID_DIGITAL_GAIN:
739 ret = hi556_update_digital_gain(hi556, ctrl->val);
740 break;
741
742 case V4L2_CID_EXPOSURE:
743 ret = hi556_write_reg(hi556, HI556_REG_EXPOSURE,
744 HI556_REG_VALUE_16BIT, ctrl->val);
745 break;
746
747 case V4L2_CID_VBLANK:
748 /* Update FLL that meets expected vertical blanking */
749 ret = hi556_write_reg(hi556, HI556_REG_FLL,
750 HI556_REG_VALUE_16BIT,
751 hi556->cur_mode->height + ctrl->val);
752 break;
753
754 case V4L2_CID_TEST_PATTERN:
755 ret = hi556_test_pattern(hi556, ctrl->val);
756 break;
757
758 default:
759 ret = -EINVAL;
760 break;
761 }
762
763 pm_runtime_put(&client->dev);
764
765 return ret;
766 }
767
768 static const struct v4l2_ctrl_ops hi556_ctrl_ops = {
769 .s_ctrl = hi556_set_ctrl,
770 };
771
hi556_init_controls(struct hi556 * hi556)772 static int hi556_init_controls(struct hi556 *hi556)
773 {
774 struct v4l2_ctrl_handler *ctrl_hdlr;
775 s64 exposure_max, h_blank;
776 int ret;
777
778 ctrl_hdlr = &hi556->ctrl_handler;
779 ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
780 if (ret)
781 return ret;
782
783 ctrl_hdlr->lock = &hi556->mutex;
784 hi556->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr, &hi556_ctrl_ops,
785 V4L2_CID_LINK_FREQ,
786 ARRAY_SIZE(link_freq_menu_items) - 1,
787 0, link_freq_menu_items);
788 if (hi556->link_freq)
789 hi556->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
790
791 hi556->pixel_rate = v4l2_ctrl_new_std
792 (ctrl_hdlr, &hi556_ctrl_ops,
793 V4L2_CID_PIXEL_RATE, 0,
794 to_pixel_rate(HI556_LINK_FREQ_437MHZ_INDEX),
795 1,
796 to_pixel_rate(HI556_LINK_FREQ_437MHZ_INDEX));
797 hi556->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
798 V4L2_CID_VBLANK,
799 hi556->cur_mode->fll_min -
800 hi556->cur_mode->height,
801 HI556_FLL_MAX -
802 hi556->cur_mode->height, 1,
803 hi556->cur_mode->fll_def -
804 hi556->cur_mode->height);
805
806 h_blank = hi556->cur_mode->llp - hi556->cur_mode->width;
807
808 hi556->hblank = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
809 V4L2_CID_HBLANK, h_blank, h_blank, 1,
810 h_blank);
811 if (hi556->hblank)
812 hi556->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
813
814 v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
815 HI556_ANAL_GAIN_MIN, HI556_ANAL_GAIN_MAX,
816 HI556_ANAL_GAIN_STEP, HI556_ANAL_GAIN_MIN);
817 v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
818 HI556_DGTL_GAIN_MIN, HI556_DGTL_GAIN_MAX,
819 HI556_DGTL_GAIN_STEP, HI556_DGTL_GAIN_DEFAULT);
820 exposure_max = hi556->cur_mode->fll_def - HI556_EXPOSURE_MAX_MARGIN;
821 hi556->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &hi556_ctrl_ops,
822 V4L2_CID_EXPOSURE,
823 HI556_EXPOSURE_MIN, exposure_max,
824 HI556_EXPOSURE_STEP,
825 exposure_max);
826 v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &hi556_ctrl_ops,
827 V4L2_CID_TEST_PATTERN,
828 ARRAY_SIZE(hi556_test_pattern_menu) - 1,
829 0, 0, hi556_test_pattern_menu);
830 if (ctrl_hdlr->error)
831 return ctrl_hdlr->error;
832
833 hi556->sd.ctrl_handler = ctrl_hdlr;
834
835 return 0;
836 }
837
hi556_assign_pad_format(const struct hi556_mode * mode,struct v4l2_mbus_framefmt * fmt)838 static void hi556_assign_pad_format(const struct hi556_mode *mode,
839 struct v4l2_mbus_framefmt *fmt)
840 {
841 fmt->width = mode->width;
842 fmt->height = mode->height;
843 fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
844 fmt->field = V4L2_FIELD_NONE;
845 }
846
hi556_identify_module(struct hi556 * hi556)847 static int hi556_identify_module(struct hi556 *hi556)
848 {
849 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
850 int ret;
851 u32 val;
852
853 if (hi556->identified)
854 return 0;
855
856 ret = hi556_read_reg(hi556, HI556_REG_CHIP_ID,
857 HI556_REG_VALUE_16BIT, &val);
858 if (ret)
859 return ret;
860
861 if (val != HI556_CHIP_ID) {
862 dev_err(&client->dev, "chip id mismatch: %x!=%x",
863 HI556_CHIP_ID, val);
864 return -ENXIO;
865 }
866
867 hi556->identified = true;
868
869 return 0;
870 }
871
872 static const struct v4l2_rect *
__hi556_get_pad_crop(struct hi556 * hi556,struct v4l2_subdev_state * sd_state,unsigned int pad,enum v4l2_subdev_format_whence which)873 __hi556_get_pad_crop(struct hi556 *hi556,
874 struct v4l2_subdev_state *sd_state,
875 unsigned int pad, enum v4l2_subdev_format_whence which)
876 {
877 switch (which) {
878 case V4L2_SUBDEV_FORMAT_TRY:
879 return v4l2_subdev_get_try_crop(&hi556->sd, sd_state, pad);
880 case V4L2_SUBDEV_FORMAT_ACTIVE:
881 return &hi556->cur_mode->crop;
882 }
883
884 return NULL;
885 }
886
hi556_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_selection * sel)887 static int hi556_get_selection(struct v4l2_subdev *sd,
888 struct v4l2_subdev_state *sd_state,
889 struct v4l2_subdev_selection *sel)
890 {
891 switch (sel->target) {
892 case V4L2_SEL_TGT_CROP: {
893 struct hi556 *hi556 = to_hi556(sd);
894
895 mutex_lock(&hi556->mutex);
896 sel->r = *__hi556_get_pad_crop(hi556, sd_state, sel->pad,
897 sel->which);
898 mutex_unlock(&hi556->mutex);
899
900 return 0;
901 }
902
903 case V4L2_SEL_TGT_NATIVE_SIZE:
904 sel->r.top = 0;
905 sel->r.left = 0;
906 sel->r.width = HI556_NATIVE_WIDTH;
907 sel->r.height = HI556_NATIVE_HEIGHT;
908
909 return 0;
910
911 case V4L2_SEL_TGT_CROP_DEFAULT:
912 case V4L2_SEL_TGT_CROP_BOUNDS:
913 sel->r.top = HI556_PIXEL_ARRAY_TOP;
914 sel->r.left = HI556_PIXEL_ARRAY_LEFT;
915 sel->r.width = HI556_PIXEL_ARRAY_WIDTH;
916 sel->r.height = HI556_PIXEL_ARRAY_HEIGHT;
917
918 return 0;
919 }
920
921 return -EINVAL;
922 }
923
hi556_start_streaming(struct hi556 * hi556)924 static int hi556_start_streaming(struct hi556 *hi556)
925 {
926 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
927 const struct hi556_reg_list *reg_list;
928 int link_freq_index, ret;
929
930 ret = hi556_identify_module(hi556);
931 if (ret)
932 return ret;
933
934 link_freq_index = hi556->cur_mode->link_freq_index;
935 reg_list = &link_freq_configs[link_freq_index].reg_list;
936 ret = hi556_write_reg_list(hi556, reg_list);
937 if (ret) {
938 dev_err(&client->dev, "failed to set plls");
939 return ret;
940 }
941
942 reg_list = &hi556->cur_mode->reg_list;
943 ret = hi556_write_reg_list(hi556, reg_list);
944 if (ret) {
945 dev_err(&client->dev, "failed to set mode");
946 return ret;
947 }
948
949 ret = __v4l2_ctrl_handler_setup(hi556->sd.ctrl_handler);
950 if (ret)
951 return ret;
952
953 ret = hi556_write_reg(hi556, HI556_REG_MODE_SELECT,
954 HI556_REG_VALUE_16BIT, HI556_MODE_STREAMING);
955
956 if (ret) {
957 dev_err(&client->dev, "failed to set stream");
958 return ret;
959 }
960
961 return 0;
962 }
963
hi556_stop_streaming(struct hi556 * hi556)964 static void hi556_stop_streaming(struct hi556 *hi556)
965 {
966 struct i2c_client *client = v4l2_get_subdevdata(&hi556->sd);
967
968 if (hi556_write_reg(hi556, HI556_REG_MODE_SELECT,
969 HI556_REG_VALUE_16BIT, HI556_MODE_STANDBY))
970 dev_err(&client->dev, "failed to set stream");
971 }
972
hi556_set_stream(struct v4l2_subdev * sd,int enable)973 static int hi556_set_stream(struct v4l2_subdev *sd, int enable)
974 {
975 struct hi556 *hi556 = to_hi556(sd);
976 struct i2c_client *client = v4l2_get_subdevdata(sd);
977 int ret = 0;
978
979 if (hi556->streaming == enable)
980 return 0;
981
982 mutex_lock(&hi556->mutex);
983 if (enable) {
984 ret = pm_runtime_resume_and_get(&client->dev);
985 if (ret < 0) {
986 mutex_unlock(&hi556->mutex);
987 return ret;
988 }
989
990 ret = hi556_start_streaming(hi556);
991 if (ret) {
992 enable = 0;
993 hi556_stop_streaming(hi556);
994 pm_runtime_put(&client->dev);
995 }
996 } else {
997 hi556_stop_streaming(hi556);
998 pm_runtime_put(&client->dev);
999 }
1000
1001 hi556->streaming = enable;
1002 mutex_unlock(&hi556->mutex);
1003
1004 return ret;
1005 }
1006
hi556_suspend(struct device * dev)1007 static int __maybe_unused hi556_suspend(struct device *dev)
1008 {
1009 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1010 struct hi556 *hi556 = to_hi556(sd);
1011
1012 mutex_lock(&hi556->mutex);
1013 if (hi556->streaming)
1014 hi556_stop_streaming(hi556);
1015
1016 mutex_unlock(&hi556->mutex);
1017
1018 return 0;
1019 }
1020
hi556_resume(struct device * dev)1021 static int __maybe_unused hi556_resume(struct device *dev)
1022 {
1023 struct v4l2_subdev *sd = dev_get_drvdata(dev);
1024 struct hi556 *hi556 = to_hi556(sd);
1025 int ret;
1026
1027 mutex_lock(&hi556->mutex);
1028 if (hi556->streaming) {
1029 ret = hi556_start_streaming(hi556);
1030 if (ret)
1031 goto error;
1032 }
1033
1034 mutex_unlock(&hi556->mutex);
1035
1036 return 0;
1037
1038 error:
1039 hi556_stop_streaming(hi556);
1040 hi556->streaming = 0;
1041 mutex_unlock(&hi556->mutex);
1042 return ret;
1043 }
1044
hi556_set_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)1045 static int hi556_set_format(struct v4l2_subdev *sd,
1046 struct v4l2_subdev_state *sd_state,
1047 struct v4l2_subdev_format *fmt)
1048 {
1049 struct hi556 *hi556 = to_hi556(sd);
1050 const struct hi556_mode *mode;
1051 s32 vblank_def, h_blank;
1052
1053 mode = v4l2_find_nearest_size(supported_modes,
1054 ARRAY_SIZE(supported_modes), width,
1055 height, fmt->format.width,
1056 fmt->format.height);
1057
1058 mutex_lock(&hi556->mutex);
1059 hi556_assign_pad_format(mode, &fmt->format);
1060 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1061 *v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
1062 } else {
1063 hi556->cur_mode = mode;
1064 __v4l2_ctrl_s_ctrl(hi556->link_freq, mode->link_freq_index);
1065 __v4l2_ctrl_s_ctrl_int64(hi556->pixel_rate,
1066 to_pixel_rate(mode->link_freq_index));
1067
1068 /* Update limits and set FPS to default */
1069 vblank_def = mode->fll_def - mode->height;
1070 __v4l2_ctrl_modify_range(hi556->vblank,
1071 mode->fll_min - mode->height,
1072 HI556_FLL_MAX - mode->height, 1,
1073 vblank_def);
1074 __v4l2_ctrl_s_ctrl(hi556->vblank, vblank_def);
1075
1076 h_blank = hi556->cur_mode->llp - hi556->cur_mode->width;
1077
1078 __v4l2_ctrl_modify_range(hi556->hblank, h_blank, h_blank, 1,
1079 h_blank);
1080 }
1081
1082 mutex_unlock(&hi556->mutex);
1083
1084 return 0;
1085 }
1086
hi556_get_format(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * fmt)1087 static int hi556_get_format(struct v4l2_subdev *sd,
1088 struct v4l2_subdev_state *sd_state,
1089 struct v4l2_subdev_format *fmt)
1090 {
1091 struct hi556 *hi556 = to_hi556(sd);
1092
1093 mutex_lock(&hi556->mutex);
1094 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
1095 fmt->format = *v4l2_subdev_get_try_format(&hi556->sd,
1096 sd_state,
1097 fmt->pad);
1098 else
1099 hi556_assign_pad_format(hi556->cur_mode, &fmt->format);
1100
1101 mutex_unlock(&hi556->mutex);
1102
1103 return 0;
1104 }
1105
hi556_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)1106 static int hi556_enum_mbus_code(struct v4l2_subdev *sd,
1107 struct v4l2_subdev_state *sd_state,
1108 struct v4l2_subdev_mbus_code_enum *code)
1109 {
1110 if (code->index > 0)
1111 return -EINVAL;
1112
1113 code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1114
1115 return 0;
1116 }
1117
hi556_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_size_enum * fse)1118 static int hi556_enum_frame_size(struct v4l2_subdev *sd,
1119 struct v4l2_subdev_state *sd_state,
1120 struct v4l2_subdev_frame_size_enum *fse)
1121 {
1122 if (fse->index >= ARRAY_SIZE(supported_modes))
1123 return -EINVAL;
1124
1125 if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
1126 return -EINVAL;
1127
1128 fse->min_width = supported_modes[fse->index].width;
1129 fse->max_width = fse->min_width;
1130 fse->min_height = supported_modes[fse->index].height;
1131 fse->max_height = fse->min_height;
1132
1133 return 0;
1134 }
1135
hi556_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1136 static int hi556_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1137 {
1138 struct hi556 *hi556 = to_hi556(sd);
1139 struct v4l2_rect *try_crop;
1140
1141 mutex_lock(&hi556->mutex);
1142 hi556_assign_pad_format(&supported_modes[0],
1143 v4l2_subdev_get_try_format(sd, fh->state, 0));
1144
1145 /* Initialize try_crop rectangle. */
1146 try_crop = v4l2_subdev_get_try_crop(sd, fh->state, 0);
1147 try_crop->top = HI556_PIXEL_ARRAY_TOP;
1148 try_crop->left = HI556_PIXEL_ARRAY_LEFT;
1149 try_crop->width = HI556_PIXEL_ARRAY_WIDTH;
1150 try_crop->height = HI556_PIXEL_ARRAY_HEIGHT;
1151
1152 mutex_unlock(&hi556->mutex);
1153
1154 return 0;
1155 }
1156
1157 static const struct v4l2_subdev_video_ops hi556_video_ops = {
1158 .s_stream = hi556_set_stream,
1159 };
1160
1161 static const struct v4l2_subdev_pad_ops hi556_pad_ops = {
1162 .set_fmt = hi556_set_format,
1163 .get_fmt = hi556_get_format,
1164 .get_selection = hi556_get_selection,
1165 .enum_mbus_code = hi556_enum_mbus_code,
1166 .enum_frame_size = hi556_enum_frame_size,
1167 };
1168
1169 static const struct v4l2_subdev_ops hi556_subdev_ops = {
1170 .video = &hi556_video_ops,
1171 .pad = &hi556_pad_ops,
1172 };
1173
1174 static const struct media_entity_operations hi556_subdev_entity_ops = {
1175 .link_validate = v4l2_subdev_link_validate,
1176 };
1177
1178 static const struct v4l2_subdev_internal_ops hi556_internal_ops = {
1179 .open = hi556_open,
1180 };
1181
hi556_check_hwcfg(struct device * dev)1182 static int hi556_check_hwcfg(struct device *dev)
1183 {
1184 struct fwnode_handle *ep;
1185 struct fwnode_handle *fwnode = dev_fwnode(dev);
1186 struct v4l2_fwnode_endpoint bus_cfg = {
1187 .bus_type = V4L2_MBUS_CSI2_DPHY
1188 };
1189 u32 mclk;
1190 int ret = 0;
1191 unsigned int i, j;
1192
1193 if (!fwnode)
1194 return -ENXIO;
1195
1196 ret = fwnode_property_read_u32(fwnode, "clock-frequency", &mclk);
1197 if (ret) {
1198 dev_err(dev, "can't get clock frequency");
1199 return ret;
1200 }
1201
1202 if (mclk != HI556_MCLK) {
1203 dev_err(dev, "external clock %d is not supported", mclk);
1204 return -EINVAL;
1205 }
1206
1207 ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
1208 if (!ep)
1209 return -ENXIO;
1210
1211 ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
1212 fwnode_handle_put(ep);
1213 if (ret)
1214 return ret;
1215
1216 if (bus_cfg.bus.mipi_csi2.num_data_lanes != 2) {
1217 dev_err(dev, "number of CSI2 data lanes %d is not supported",
1218 bus_cfg.bus.mipi_csi2.num_data_lanes);
1219 ret = -EINVAL;
1220 goto check_hwcfg_error;
1221 }
1222
1223 if (!bus_cfg.nr_of_link_frequencies) {
1224 dev_err(dev, "no link frequencies defined");
1225 ret = -EINVAL;
1226 goto check_hwcfg_error;
1227 }
1228
1229 for (i = 0; i < ARRAY_SIZE(link_freq_menu_items); i++) {
1230 for (j = 0; j < bus_cfg.nr_of_link_frequencies; j++) {
1231 if (link_freq_menu_items[i] ==
1232 bus_cfg.link_frequencies[j])
1233 break;
1234 }
1235
1236 if (j == bus_cfg.nr_of_link_frequencies) {
1237 dev_err(dev, "no link frequency %lld supported",
1238 link_freq_menu_items[i]);
1239 ret = -EINVAL;
1240 goto check_hwcfg_error;
1241 }
1242 }
1243
1244 check_hwcfg_error:
1245 v4l2_fwnode_endpoint_free(&bus_cfg);
1246
1247 return ret;
1248 }
1249
hi556_remove(struct i2c_client * client)1250 static void hi556_remove(struct i2c_client *client)
1251 {
1252 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1253 struct hi556 *hi556 = to_hi556(sd);
1254
1255 v4l2_async_unregister_subdev(sd);
1256 media_entity_cleanup(&sd->entity);
1257 v4l2_ctrl_handler_free(sd->ctrl_handler);
1258 pm_runtime_disable(&client->dev);
1259 mutex_destroy(&hi556->mutex);
1260 }
1261
hi556_probe(struct i2c_client * client)1262 static int hi556_probe(struct i2c_client *client)
1263 {
1264 struct hi556 *hi556;
1265 bool full_power;
1266 int ret;
1267
1268 ret = hi556_check_hwcfg(&client->dev);
1269 if (ret) {
1270 dev_err(&client->dev, "failed to check HW configuration: %d",
1271 ret);
1272 return ret;
1273 }
1274
1275 hi556 = devm_kzalloc(&client->dev, sizeof(*hi556), GFP_KERNEL);
1276 if (!hi556)
1277 return -ENOMEM;
1278
1279 v4l2_i2c_subdev_init(&hi556->sd, client, &hi556_subdev_ops);
1280
1281 full_power = acpi_dev_state_d0(&client->dev);
1282 if (full_power) {
1283 ret = hi556_identify_module(hi556);
1284 if (ret) {
1285 dev_err(&client->dev, "failed to find sensor: %d", ret);
1286 return ret;
1287 }
1288 }
1289
1290 mutex_init(&hi556->mutex);
1291 hi556->cur_mode = &supported_modes[0];
1292 ret = hi556_init_controls(hi556);
1293 if (ret) {
1294 dev_err(&client->dev, "failed to init controls: %d", ret);
1295 goto probe_error_v4l2_ctrl_handler_free;
1296 }
1297
1298 hi556->sd.internal_ops = &hi556_internal_ops;
1299 hi556->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1300 hi556->sd.entity.ops = &hi556_subdev_entity_ops;
1301 hi556->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1302 hi556->pad.flags = MEDIA_PAD_FL_SOURCE;
1303 ret = media_entity_pads_init(&hi556->sd.entity, 1, &hi556->pad);
1304 if (ret) {
1305 dev_err(&client->dev, "failed to init entity pads: %d", ret);
1306 goto probe_error_v4l2_ctrl_handler_free;
1307 }
1308
1309 ret = v4l2_async_register_subdev_sensor(&hi556->sd);
1310 if (ret < 0) {
1311 dev_err(&client->dev, "failed to register V4L2 subdev: %d",
1312 ret);
1313 goto probe_error_media_entity_cleanup;
1314 }
1315
1316 /* Set the device's state to active if it's in D0 state. */
1317 if (full_power)
1318 pm_runtime_set_active(&client->dev);
1319 pm_runtime_enable(&client->dev);
1320 pm_runtime_idle(&client->dev);
1321
1322 return 0;
1323
1324 probe_error_media_entity_cleanup:
1325 media_entity_cleanup(&hi556->sd.entity);
1326
1327 probe_error_v4l2_ctrl_handler_free:
1328 v4l2_ctrl_handler_free(hi556->sd.ctrl_handler);
1329 mutex_destroy(&hi556->mutex);
1330
1331 return ret;
1332 }
1333
1334 static const struct dev_pm_ops hi556_pm_ops = {
1335 SET_SYSTEM_SLEEP_PM_OPS(hi556_suspend, hi556_resume)
1336 };
1337
1338 #ifdef CONFIG_ACPI
1339 static const struct acpi_device_id hi556_acpi_ids[] = {
1340 {"INT3537"},
1341 {}
1342 };
1343
1344 MODULE_DEVICE_TABLE(acpi, hi556_acpi_ids);
1345 #endif
1346
1347 static struct i2c_driver hi556_i2c_driver = {
1348 .driver = {
1349 .name = "hi556",
1350 .pm = &hi556_pm_ops,
1351 .acpi_match_table = ACPI_PTR(hi556_acpi_ids),
1352 },
1353 .probe = hi556_probe,
1354 .remove = hi556_remove,
1355 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
1356 };
1357
1358 module_i2c_driver(hi556_i2c_driver);
1359
1360 MODULE_AUTHOR("Shawn Tu");
1361 MODULE_DESCRIPTION("Hynix HI556 sensor driver");
1362 MODULE_LICENSE("GPL v2");
1363
