1 /*
2 * Driver for SMM665 Power Controller / Monitor
3 *
4 * Copyright (C) 2010 Ericsson AB.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This driver should also work for SMM465, SMM764, and SMM766, but is untested
11 * for those chips. Only monitoring functionality is implemented.
12 *
13 * Datasheets:
14 * http://www.summitmicro.com/prod_select/summary/SMM665/SMM665B_2089_20.pdf
15 * http://www.summitmicro.com/prod_select/summary/SMM766B/SMM766B_2122.pdf
16 */
17
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/err.h>
22 #include <linux/slab.h>
23 #include <linux/i2c.h>
24 #include <linux/hwmon.h>
25 #include <linux/hwmon-sysfs.h>
26 #include <linux/delay.h>
27 #include <linux/jiffies.h>
28
29 /* Internal reference voltage (VREF, x 1000 */
30 #define SMM665_VREF_ADC_X1000 1250
31
32 /* module parameters */
33 static int vref = SMM665_VREF_ADC_X1000;
34 module_param(vref, int, 0);
35 MODULE_PARM_DESC(vref, "Reference voltage in mV");
36
37 enum chips { smm465, smm665, smm665c, smm764, smm766 };
38
39 /*
40 * ADC channel addresses
41 */
42 #define SMM665_MISC16_ADC_DATA_A 0x00
43 #define SMM665_MISC16_ADC_DATA_B 0x01
44 #define SMM665_MISC16_ADC_DATA_C 0x02
45 #define SMM665_MISC16_ADC_DATA_D 0x03
46 #define SMM665_MISC16_ADC_DATA_E 0x04
47 #define SMM665_MISC16_ADC_DATA_F 0x05
48 #define SMM665_MISC16_ADC_DATA_VDD 0x06
49 #define SMM665_MISC16_ADC_DATA_12V 0x07
50 #define SMM665_MISC16_ADC_DATA_INT_TEMP 0x08
51 #define SMM665_MISC16_ADC_DATA_AIN1 0x09
52 #define SMM665_MISC16_ADC_DATA_AIN2 0x0a
53
54 /*
55 * Command registers
56 */
57 #define SMM665_MISC8_CMD_STS 0x80
58 #define SMM665_MISC8_STATUS1 0x81
59 #define SMM665_MISC8_STATUSS2 0x82
60 #define SMM665_MISC8_IO_POLARITY 0x83
61 #define SMM665_MISC8_PUP_POLARITY 0x84
62 #define SMM665_MISC8_ADOC_STATUS1 0x85
63 #define SMM665_MISC8_ADOC_STATUS2 0x86
64 #define SMM665_MISC8_WRITE_PROT 0x87
65 #define SMM665_MISC8_STS_TRACK 0x88
66
67 /*
68 * Configuration registers and register groups
69 */
70 #define SMM665_ADOC_ENABLE 0x0d
71 #define SMM665_LIMIT_BASE 0x80 /* First limit register */
72
73 /*
74 * Limit register bit masks
75 */
76 #define SMM665_TRIGGER_RST 0x8000
77 #define SMM665_TRIGGER_HEALTHY 0x4000
78 #define SMM665_TRIGGER_POWEROFF 0x2000
79 #define SMM665_TRIGGER_SHUTDOWN 0x1000
80 #define SMM665_ADC_MASK 0x03ff
81
82 #define smm665_is_critical(lim) ((lim) & (SMM665_TRIGGER_RST \
83 | SMM665_TRIGGER_POWEROFF \
84 | SMM665_TRIGGER_SHUTDOWN))
85 /*
86 * Fault register bit definitions
87 * Values are merged from status registers 1/2,
88 * with status register 1 providing the upper 8 bits.
89 */
90 #define SMM665_FAULT_A 0x0001
91 #define SMM665_FAULT_B 0x0002
92 #define SMM665_FAULT_C 0x0004
93 #define SMM665_FAULT_D 0x0008
94 #define SMM665_FAULT_E 0x0010
95 #define SMM665_FAULT_F 0x0020
96 #define SMM665_FAULT_VDD 0x0040
97 #define SMM665_FAULT_12V 0x0080
98 #define SMM665_FAULT_TEMP 0x0100
99 #define SMM665_FAULT_AIN1 0x0200
100 #define SMM665_FAULT_AIN2 0x0400
101
102 /*
103 * I2C Register addresses
104 *
105 * The configuration register needs to be the configured base register.
106 * The command/status register address is derived from it.
107 */
108 #define SMM665_REGMASK 0x78
109 #define SMM665_CMDREG_BASE 0x48
110 #define SMM665_CONFREG_BASE 0x50
111
112 /*
113 * Equations given by chip manufacturer to calculate voltage/temperature values
114 * vref = Reference voltage on VREF_ADC pin (module parameter)
115 * adc = 10bit ADC value read back from registers
116 */
117
118 /* Voltage A-F and VDD */
119 #define SMM665_VMON_ADC_TO_VOLTS(adc) ((adc) * vref / 256)
120
121 /* Voltage 12VIN */
122 #define SMM665_12VIN_ADC_TO_VOLTS(adc) ((adc) * vref * 3 / 256)
123
124 /* Voltage AIN1, AIN2 */
125 #define SMM665_AIN_ADC_TO_VOLTS(adc) ((adc) * vref / 512)
126
127 /* Temp Sensor */
128 #define SMM665_TEMP_ADC_TO_CELSIUS(adc) (((adc) <= 511) ? \
129 ((int)(adc) * 1000 / 4) : \
130 (((int)(adc) - 0x400) * 1000 / 4))
131
132 #define SMM665_NUM_ADC 11
133
134 /*
135 * Chip dependent ADC conversion time, in uS
136 */
137 #define SMM665_ADC_WAIT_SMM665 70
138 #define SMM665_ADC_WAIT_SMM766 185
139
140 struct smm665_data {
141 enum chips type;
142 int conversion_time; /* ADC conversion time */
143 struct i2c_client *client;
144 struct mutex update_lock;
145 bool valid;
146 unsigned long last_updated; /* in jiffies */
147 u16 adc[SMM665_NUM_ADC]; /* adc values (raw) */
148 u16 faults; /* fault status */
149 /* The following values are in mV */
150 int critical_min_limit[SMM665_NUM_ADC];
151 int alarm_min_limit[SMM665_NUM_ADC];
152 int critical_max_limit[SMM665_NUM_ADC];
153 int alarm_max_limit[SMM665_NUM_ADC];
154 struct i2c_client *cmdreg;
155 };
156
157 /*
158 * smm665_read16()
159 *
160 * Read 16 bit value from <reg>, <reg+1>. Upper 8 bits are in <reg>.
161 */
smm665_read16(struct i2c_client * client,int reg)162 static int smm665_read16(struct i2c_client *client, int reg)
163 {
164 int rv, val;
165
166 rv = i2c_smbus_read_byte_data(client, reg);
167 if (rv < 0)
168 return rv;
169 val = rv << 8;
170 rv = i2c_smbus_read_byte_data(client, reg + 1);
171 if (rv < 0)
172 return rv;
173 val |= rv;
174 return val;
175 }
176
177 /*
178 * Read adc value.
179 */
smm665_read_adc(struct smm665_data * data,int adc)180 static int smm665_read_adc(struct smm665_data *data, int adc)
181 {
182 struct i2c_client *client = data->cmdreg;
183 int rv;
184 int radc;
185
186 /*
187 * Algorithm for reading ADC, per SMM665 datasheet
188 *
189 * {[S][addr][W][Ack]} {[offset][Ack]} {[S][addr][R][Nack]}
190 * [wait conversion time]
191 * {[S][addr][R][Ack]} {[datahi][Ack]} {[datalo][Ack][P]}
192 *
193 * To implement the first part of this exchange,
194 * do a full read transaction and expect a failure/Nack.
195 * This sets up the address pointer on the SMM665
196 * and starts the ADC conversion.
197 * Then do a two-byte read transaction.
198 */
199 rv = i2c_smbus_read_byte_data(client, adc << 3);
200 if (rv != -ENXIO) {
201 /*
202 * We expect ENXIO to reflect NACK
203 * (per Documentation/i2c/fault-codes).
204 * Everything else is an error.
205 */
206 dev_dbg(&client->dev,
207 "Unexpected return code %d when setting ADC index", rv);
208 return (rv < 0) ? rv : -EIO;
209 }
210
211 udelay(data->conversion_time);
212
213 /*
214 * Now read two bytes.
215 *
216 * Neither i2c_smbus_read_byte() nor
217 * i2c_smbus_read_block_data() worked here,
218 * so use i2c_smbus_read_word_swapped() instead.
219 * We could also try to use i2c_master_recv(),
220 * but that is not always supported.
221 */
222 rv = i2c_smbus_read_word_swapped(client, 0);
223 if (rv < 0) {
224 dev_dbg(&client->dev, "Failed to read ADC value: error %d", rv);
225 return rv;
226 }
227 /*
228 * Validate/verify readback adc channel (in bit 11..14).
229 */
230 radc = (rv >> 11) & 0x0f;
231 if (radc != adc) {
232 dev_dbg(&client->dev, "Unexpected RADC: Expected %d got %d",
233 adc, radc);
234 return -EIO;
235 }
236
237 return rv & SMM665_ADC_MASK;
238 }
239
smm665_update_device(struct device * dev)240 static struct smm665_data *smm665_update_device(struct device *dev)
241 {
242 struct smm665_data *data = dev_get_drvdata(dev);
243 struct i2c_client *client = data->client;
244 struct smm665_data *ret = data;
245
246 mutex_lock(&data->update_lock);
247
248 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
249 int i, val;
250
251 /*
252 * read status registers
253 */
254 val = smm665_read16(client, SMM665_MISC8_STATUS1);
255 if (unlikely(val < 0)) {
256 ret = ERR_PTR(val);
257 goto abort;
258 }
259 data->faults = val;
260
261 /* Read adc registers */
262 for (i = 0; i < SMM665_NUM_ADC; i++) {
263 val = smm665_read_adc(data, i);
264 if (unlikely(val < 0)) {
265 ret = ERR_PTR(val);
266 goto abort;
267 }
268 data->adc[i] = val;
269 }
270 data->last_updated = jiffies;
271 data->valid = 1;
272 }
273 abort:
274 mutex_unlock(&data->update_lock);
275 return ret;
276 }
277
278 /* Return converted value from given adc */
smm665_convert(u16 adcval,int index)279 static int smm665_convert(u16 adcval, int index)
280 {
281 int val = 0;
282
283 switch (index) {
284 case SMM665_MISC16_ADC_DATA_12V:
285 val = SMM665_12VIN_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK);
286 break;
287
288 case SMM665_MISC16_ADC_DATA_VDD:
289 case SMM665_MISC16_ADC_DATA_A:
290 case SMM665_MISC16_ADC_DATA_B:
291 case SMM665_MISC16_ADC_DATA_C:
292 case SMM665_MISC16_ADC_DATA_D:
293 case SMM665_MISC16_ADC_DATA_E:
294 case SMM665_MISC16_ADC_DATA_F:
295 val = SMM665_VMON_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK);
296 break;
297
298 case SMM665_MISC16_ADC_DATA_AIN1:
299 case SMM665_MISC16_ADC_DATA_AIN2:
300 val = SMM665_AIN_ADC_TO_VOLTS(adcval & SMM665_ADC_MASK);
301 break;
302
303 case SMM665_MISC16_ADC_DATA_INT_TEMP:
304 val = SMM665_TEMP_ADC_TO_CELSIUS(adcval & SMM665_ADC_MASK);
305 break;
306
307 default:
308 /* If we get here, the developer messed up */
309 WARN_ON_ONCE(1);
310 break;
311 }
312
313 return val;
314 }
315
smm665_get_min(struct device * dev,int index)316 static int smm665_get_min(struct device *dev, int index)
317 {
318 struct smm665_data *data = dev_get_drvdata(dev);
319
320 return data->alarm_min_limit[index];
321 }
322
smm665_get_max(struct device * dev,int index)323 static int smm665_get_max(struct device *dev, int index)
324 {
325 struct smm665_data *data = dev_get_drvdata(dev);
326
327 return data->alarm_max_limit[index];
328 }
329
smm665_get_lcrit(struct device * dev,int index)330 static int smm665_get_lcrit(struct device *dev, int index)
331 {
332 struct smm665_data *data = dev_get_drvdata(dev);
333
334 return data->critical_min_limit[index];
335 }
336
smm665_get_crit(struct device * dev,int index)337 static int smm665_get_crit(struct device *dev, int index)
338 {
339 struct smm665_data *data = dev_get_drvdata(dev);
340
341 return data->critical_max_limit[index];
342 }
343
smm665_show_crit_alarm(struct device * dev,struct device_attribute * da,char * buf)344 static ssize_t smm665_show_crit_alarm(struct device *dev,
345 struct device_attribute *da, char *buf)
346 {
347 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
348 struct smm665_data *data = smm665_update_device(dev);
349 int val = 0;
350
351 if (IS_ERR(data))
352 return PTR_ERR(data);
353
354 if (data->faults & (1 << attr->index))
355 val = 1;
356
357 return snprintf(buf, PAGE_SIZE, "%d\n", val);
358 }
359
smm665_show_input(struct device * dev,struct device_attribute * da,char * buf)360 static ssize_t smm665_show_input(struct device *dev,
361 struct device_attribute *da, char *buf)
362 {
363 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
364 struct smm665_data *data = smm665_update_device(dev);
365 int adc = attr->index;
366 int val;
367
368 if (IS_ERR(data))
369 return PTR_ERR(data);
370
371 val = smm665_convert(data->adc[adc], adc);
372 return snprintf(buf, PAGE_SIZE, "%d\n", val);
373 }
374
375 #define SMM665_SHOW(what) \
376 static ssize_t smm665_show_##what(struct device *dev, \
377 struct device_attribute *da, char *buf) \
378 { \
379 struct sensor_device_attribute *attr = to_sensor_dev_attr(da); \
380 const int val = smm665_get_##what(dev, attr->index); \
381 return snprintf(buf, PAGE_SIZE, "%d\n", val); \
382 }
383
384 SMM665_SHOW(min);
385 SMM665_SHOW(max);
386 SMM665_SHOW(lcrit);
387 SMM665_SHOW(crit);
388
389 /*
390 * These macros are used below in constructing device attribute objects
391 * for use with sysfs_create_group() to make a sysfs device file
392 * for each register.
393 */
394
395 #define SMM665_ATTR(name, type, cmd_idx) \
396 static SENSOR_DEVICE_ATTR(name##_##type, S_IRUGO, \
397 smm665_show_##type, NULL, cmd_idx)
398
399 /* Construct a sensor_device_attribute structure for each register */
400
401 /* Input voltages */
402 SMM665_ATTR(in1, input, SMM665_MISC16_ADC_DATA_12V);
403 SMM665_ATTR(in2, input, SMM665_MISC16_ADC_DATA_VDD);
404 SMM665_ATTR(in3, input, SMM665_MISC16_ADC_DATA_A);
405 SMM665_ATTR(in4, input, SMM665_MISC16_ADC_DATA_B);
406 SMM665_ATTR(in5, input, SMM665_MISC16_ADC_DATA_C);
407 SMM665_ATTR(in6, input, SMM665_MISC16_ADC_DATA_D);
408 SMM665_ATTR(in7, input, SMM665_MISC16_ADC_DATA_E);
409 SMM665_ATTR(in8, input, SMM665_MISC16_ADC_DATA_F);
410 SMM665_ATTR(in9, input, SMM665_MISC16_ADC_DATA_AIN1);
411 SMM665_ATTR(in10, input, SMM665_MISC16_ADC_DATA_AIN2);
412
413 /* Input voltages min */
414 SMM665_ATTR(in1, min, SMM665_MISC16_ADC_DATA_12V);
415 SMM665_ATTR(in2, min, SMM665_MISC16_ADC_DATA_VDD);
416 SMM665_ATTR(in3, min, SMM665_MISC16_ADC_DATA_A);
417 SMM665_ATTR(in4, min, SMM665_MISC16_ADC_DATA_B);
418 SMM665_ATTR(in5, min, SMM665_MISC16_ADC_DATA_C);
419 SMM665_ATTR(in6, min, SMM665_MISC16_ADC_DATA_D);
420 SMM665_ATTR(in7, min, SMM665_MISC16_ADC_DATA_E);
421 SMM665_ATTR(in8, min, SMM665_MISC16_ADC_DATA_F);
422 SMM665_ATTR(in9, min, SMM665_MISC16_ADC_DATA_AIN1);
423 SMM665_ATTR(in10, min, SMM665_MISC16_ADC_DATA_AIN2);
424
425 /* Input voltages max */
426 SMM665_ATTR(in1, max, SMM665_MISC16_ADC_DATA_12V);
427 SMM665_ATTR(in2, max, SMM665_MISC16_ADC_DATA_VDD);
428 SMM665_ATTR(in3, max, SMM665_MISC16_ADC_DATA_A);
429 SMM665_ATTR(in4, max, SMM665_MISC16_ADC_DATA_B);
430 SMM665_ATTR(in5, max, SMM665_MISC16_ADC_DATA_C);
431 SMM665_ATTR(in6, max, SMM665_MISC16_ADC_DATA_D);
432 SMM665_ATTR(in7, max, SMM665_MISC16_ADC_DATA_E);
433 SMM665_ATTR(in8, max, SMM665_MISC16_ADC_DATA_F);
434 SMM665_ATTR(in9, max, SMM665_MISC16_ADC_DATA_AIN1);
435 SMM665_ATTR(in10, max, SMM665_MISC16_ADC_DATA_AIN2);
436
437 /* Input voltages lcrit */
438 SMM665_ATTR(in1, lcrit, SMM665_MISC16_ADC_DATA_12V);
439 SMM665_ATTR(in2, lcrit, SMM665_MISC16_ADC_DATA_VDD);
440 SMM665_ATTR(in3, lcrit, SMM665_MISC16_ADC_DATA_A);
441 SMM665_ATTR(in4, lcrit, SMM665_MISC16_ADC_DATA_B);
442 SMM665_ATTR(in5, lcrit, SMM665_MISC16_ADC_DATA_C);
443 SMM665_ATTR(in6, lcrit, SMM665_MISC16_ADC_DATA_D);
444 SMM665_ATTR(in7, lcrit, SMM665_MISC16_ADC_DATA_E);
445 SMM665_ATTR(in8, lcrit, SMM665_MISC16_ADC_DATA_F);
446 SMM665_ATTR(in9, lcrit, SMM665_MISC16_ADC_DATA_AIN1);
447 SMM665_ATTR(in10, lcrit, SMM665_MISC16_ADC_DATA_AIN2);
448
449 /* Input voltages crit */
450 SMM665_ATTR(in1, crit, SMM665_MISC16_ADC_DATA_12V);
451 SMM665_ATTR(in2, crit, SMM665_MISC16_ADC_DATA_VDD);
452 SMM665_ATTR(in3, crit, SMM665_MISC16_ADC_DATA_A);
453 SMM665_ATTR(in4, crit, SMM665_MISC16_ADC_DATA_B);
454 SMM665_ATTR(in5, crit, SMM665_MISC16_ADC_DATA_C);
455 SMM665_ATTR(in6, crit, SMM665_MISC16_ADC_DATA_D);
456 SMM665_ATTR(in7, crit, SMM665_MISC16_ADC_DATA_E);
457 SMM665_ATTR(in8, crit, SMM665_MISC16_ADC_DATA_F);
458 SMM665_ATTR(in9, crit, SMM665_MISC16_ADC_DATA_AIN1);
459 SMM665_ATTR(in10, crit, SMM665_MISC16_ADC_DATA_AIN2);
460
461 /* critical alarms */
462 SMM665_ATTR(in1, crit_alarm, SMM665_FAULT_12V);
463 SMM665_ATTR(in2, crit_alarm, SMM665_FAULT_VDD);
464 SMM665_ATTR(in3, crit_alarm, SMM665_FAULT_A);
465 SMM665_ATTR(in4, crit_alarm, SMM665_FAULT_B);
466 SMM665_ATTR(in5, crit_alarm, SMM665_FAULT_C);
467 SMM665_ATTR(in6, crit_alarm, SMM665_FAULT_D);
468 SMM665_ATTR(in7, crit_alarm, SMM665_FAULT_E);
469 SMM665_ATTR(in8, crit_alarm, SMM665_FAULT_F);
470 SMM665_ATTR(in9, crit_alarm, SMM665_FAULT_AIN1);
471 SMM665_ATTR(in10, crit_alarm, SMM665_FAULT_AIN2);
472
473 /* Temperature */
474 SMM665_ATTR(temp1, input, SMM665_MISC16_ADC_DATA_INT_TEMP);
475 SMM665_ATTR(temp1, min, SMM665_MISC16_ADC_DATA_INT_TEMP);
476 SMM665_ATTR(temp1, max, SMM665_MISC16_ADC_DATA_INT_TEMP);
477 SMM665_ATTR(temp1, lcrit, SMM665_MISC16_ADC_DATA_INT_TEMP);
478 SMM665_ATTR(temp1, crit, SMM665_MISC16_ADC_DATA_INT_TEMP);
479 SMM665_ATTR(temp1, crit_alarm, SMM665_FAULT_TEMP);
480
481 /*
482 * Finally, construct an array of pointers to members of the above objects,
483 * as required for sysfs_create_group()
484 */
485 static struct attribute *smm665_attrs[] = {
486 &sensor_dev_attr_in1_input.dev_attr.attr,
487 &sensor_dev_attr_in1_min.dev_attr.attr,
488 &sensor_dev_attr_in1_max.dev_attr.attr,
489 &sensor_dev_attr_in1_lcrit.dev_attr.attr,
490 &sensor_dev_attr_in1_crit.dev_attr.attr,
491 &sensor_dev_attr_in1_crit_alarm.dev_attr.attr,
492
493 &sensor_dev_attr_in2_input.dev_attr.attr,
494 &sensor_dev_attr_in2_min.dev_attr.attr,
495 &sensor_dev_attr_in2_max.dev_attr.attr,
496 &sensor_dev_attr_in2_lcrit.dev_attr.attr,
497 &sensor_dev_attr_in2_crit.dev_attr.attr,
498 &sensor_dev_attr_in2_crit_alarm.dev_attr.attr,
499
500 &sensor_dev_attr_in3_input.dev_attr.attr,
501 &sensor_dev_attr_in3_min.dev_attr.attr,
502 &sensor_dev_attr_in3_max.dev_attr.attr,
503 &sensor_dev_attr_in3_lcrit.dev_attr.attr,
504 &sensor_dev_attr_in3_crit.dev_attr.attr,
505 &sensor_dev_attr_in3_crit_alarm.dev_attr.attr,
506
507 &sensor_dev_attr_in4_input.dev_attr.attr,
508 &sensor_dev_attr_in4_min.dev_attr.attr,
509 &sensor_dev_attr_in4_max.dev_attr.attr,
510 &sensor_dev_attr_in4_lcrit.dev_attr.attr,
511 &sensor_dev_attr_in4_crit.dev_attr.attr,
512 &sensor_dev_attr_in4_crit_alarm.dev_attr.attr,
513
514 &sensor_dev_attr_in5_input.dev_attr.attr,
515 &sensor_dev_attr_in5_min.dev_attr.attr,
516 &sensor_dev_attr_in5_max.dev_attr.attr,
517 &sensor_dev_attr_in5_lcrit.dev_attr.attr,
518 &sensor_dev_attr_in5_crit.dev_attr.attr,
519 &sensor_dev_attr_in5_crit_alarm.dev_attr.attr,
520
521 &sensor_dev_attr_in6_input.dev_attr.attr,
522 &sensor_dev_attr_in6_min.dev_attr.attr,
523 &sensor_dev_attr_in6_max.dev_attr.attr,
524 &sensor_dev_attr_in6_lcrit.dev_attr.attr,
525 &sensor_dev_attr_in6_crit.dev_attr.attr,
526 &sensor_dev_attr_in6_crit_alarm.dev_attr.attr,
527
528 &sensor_dev_attr_in7_input.dev_attr.attr,
529 &sensor_dev_attr_in7_min.dev_attr.attr,
530 &sensor_dev_attr_in7_max.dev_attr.attr,
531 &sensor_dev_attr_in7_lcrit.dev_attr.attr,
532 &sensor_dev_attr_in7_crit.dev_attr.attr,
533 &sensor_dev_attr_in7_crit_alarm.dev_attr.attr,
534
535 &sensor_dev_attr_in8_input.dev_attr.attr,
536 &sensor_dev_attr_in8_min.dev_attr.attr,
537 &sensor_dev_attr_in8_max.dev_attr.attr,
538 &sensor_dev_attr_in8_lcrit.dev_attr.attr,
539 &sensor_dev_attr_in8_crit.dev_attr.attr,
540 &sensor_dev_attr_in8_crit_alarm.dev_attr.attr,
541
542 &sensor_dev_attr_in9_input.dev_attr.attr,
543 &sensor_dev_attr_in9_min.dev_attr.attr,
544 &sensor_dev_attr_in9_max.dev_attr.attr,
545 &sensor_dev_attr_in9_lcrit.dev_attr.attr,
546 &sensor_dev_attr_in9_crit.dev_attr.attr,
547 &sensor_dev_attr_in9_crit_alarm.dev_attr.attr,
548
549 &sensor_dev_attr_in10_input.dev_attr.attr,
550 &sensor_dev_attr_in10_min.dev_attr.attr,
551 &sensor_dev_attr_in10_max.dev_attr.attr,
552 &sensor_dev_attr_in10_lcrit.dev_attr.attr,
553 &sensor_dev_attr_in10_crit.dev_attr.attr,
554 &sensor_dev_attr_in10_crit_alarm.dev_attr.attr,
555
556 &sensor_dev_attr_temp1_input.dev_attr.attr,
557 &sensor_dev_attr_temp1_min.dev_attr.attr,
558 &sensor_dev_attr_temp1_max.dev_attr.attr,
559 &sensor_dev_attr_temp1_lcrit.dev_attr.attr,
560 &sensor_dev_attr_temp1_crit.dev_attr.attr,
561 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
562
563 NULL,
564 };
565
566 ATTRIBUTE_GROUPS(smm665);
567
smm665_probe(struct i2c_client * client,const struct i2c_device_id * id)568 static int smm665_probe(struct i2c_client *client,
569 const struct i2c_device_id *id)
570 {
571 struct i2c_adapter *adapter = client->adapter;
572 struct smm665_data *data;
573 struct device *hwmon_dev;
574 int i, ret;
575
576 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA
577 | I2C_FUNC_SMBUS_WORD_DATA))
578 return -ENODEV;
579
580 if (i2c_smbus_read_byte_data(client, SMM665_ADOC_ENABLE) < 0)
581 return -ENODEV;
582
583 data = devm_kzalloc(&client->dev, sizeof(*data), GFP_KERNEL);
584 if (!data)
585 return -ENOMEM;
586
587 i2c_set_clientdata(client, data);
588 mutex_init(&data->update_lock);
589
590 data->client = client;
591 data->type = id->driver_data;
592 data->cmdreg = i2c_new_dummy(adapter, (client->addr & ~SMM665_REGMASK)
593 | SMM665_CMDREG_BASE);
594 if (!data->cmdreg)
595 return -ENOMEM;
596
597 switch (data->type) {
598 case smm465:
599 case smm665:
600 data->conversion_time = SMM665_ADC_WAIT_SMM665;
601 break;
602 case smm665c:
603 case smm764:
604 case smm766:
605 data->conversion_time = SMM665_ADC_WAIT_SMM766;
606 break;
607 }
608
609 ret = -ENODEV;
610 if (i2c_smbus_read_byte_data(data->cmdreg, SMM665_MISC8_CMD_STS) < 0)
611 goto out_unregister;
612
613 /*
614 * Read limits.
615 *
616 * Limit registers start with register SMM665_LIMIT_BASE.
617 * Each channel uses 8 registers, providing four limit values
618 * per channel. Each limit value requires two registers, with the
619 * high byte in the first register and the low byte in the second
620 * register. The first two limits are under limit values, followed
621 * by two over limit values.
622 *
623 * Limit register order matches the ADC register order, so we use
624 * ADC register defines throughout the code to index limit registers.
625 *
626 * We save the first retrieved value both as "critical" and "alarm"
627 * value. The second value overwrites either the critical or the
628 * alarm value, depending on its configuration. This ensures that both
629 * critical and alarm values are initialized, even if both registers are
630 * configured as critical or non-critical.
631 */
632 for (i = 0; i < SMM665_NUM_ADC; i++) {
633 int val;
634
635 val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8);
636 if (unlikely(val < 0))
637 goto out_unregister;
638 data->critical_min_limit[i] = data->alarm_min_limit[i]
639 = smm665_convert(val, i);
640 val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 2);
641 if (unlikely(val < 0))
642 goto out_unregister;
643 if (smm665_is_critical(val))
644 data->critical_min_limit[i] = smm665_convert(val, i);
645 else
646 data->alarm_min_limit[i] = smm665_convert(val, i);
647 val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 4);
648 if (unlikely(val < 0))
649 goto out_unregister;
650 data->critical_max_limit[i] = data->alarm_max_limit[i]
651 = smm665_convert(val, i);
652 val = smm665_read16(client, SMM665_LIMIT_BASE + i * 8 + 6);
653 if (unlikely(val < 0))
654 goto out_unregister;
655 if (smm665_is_critical(val))
656 data->critical_max_limit[i] = smm665_convert(val, i);
657 else
658 data->alarm_max_limit[i] = smm665_convert(val, i);
659 }
660
661 hwmon_dev = devm_hwmon_device_register_with_groups(&client->dev,
662 client->name, data,
663 smm665_groups);
664 if (IS_ERR(hwmon_dev)) {
665 ret = PTR_ERR(hwmon_dev);
666 goto out_unregister;
667 }
668
669 return 0;
670
671 out_unregister:
672 i2c_unregister_device(data->cmdreg);
673 return ret;
674 }
675
smm665_remove(struct i2c_client * client)676 static int smm665_remove(struct i2c_client *client)
677 {
678 struct smm665_data *data = i2c_get_clientdata(client);
679
680 i2c_unregister_device(data->cmdreg);
681 return 0;
682 }
683
684 static const struct i2c_device_id smm665_id[] = {
685 {"smm465", smm465},
686 {"smm665", smm665},
687 {"smm665c", smm665c},
688 {"smm764", smm764},
689 {"smm766", smm766},
690 {}
691 };
692
693 MODULE_DEVICE_TABLE(i2c, smm665_id);
694
695 /* This is the driver that will be inserted */
696 static struct i2c_driver smm665_driver = {
697 .driver = {
698 .name = "smm665",
699 },
700 .probe = smm665_probe,
701 .remove = smm665_remove,
702 .id_table = smm665_id,
703 };
704
705 module_i2c_driver(smm665_driver);
706
707 MODULE_AUTHOR("Guenter Roeck");
708 MODULE_DESCRIPTION("SMM665 driver");
709 MODULE_LICENSE("GPL");
710
