1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Fan Control HDL CORE driver
4 *
5 * Copyright 2019 Analog Devices Inc.
6 */
7 #include <linux/bits.h>
8 #include <linux/clk.h>
9 #include <linux/fpga/adi-axi-common.h>
10 #include <linux/hwmon.h>
11 #include <linux/hwmon-sysfs.h>
12 #include <linux/interrupt.h>
13 #include <linux/io.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/platform_device.h>
18
19 /* register map */
20 #define ADI_REG_RSTN 0x0080
21 #define ADI_REG_PWM_WIDTH 0x0084
22 #define ADI_REG_TACH_PERIOD 0x0088
23 #define ADI_REG_TACH_TOLERANCE 0x008c
24 #define ADI_REG_PWM_PERIOD 0x00c0
25 #define ADI_REG_TACH_MEASUR 0x00c4
26 #define ADI_REG_TEMPERATURE 0x00c8
27 #define ADI_REG_TEMP_00_H 0x0100
28 #define ADI_REG_TEMP_25_L 0x0104
29 #define ADI_REG_TEMP_25_H 0x0108
30 #define ADI_REG_TEMP_50_L 0x010c
31 #define ADI_REG_TEMP_50_H 0x0110
32 #define ADI_REG_TEMP_75_L 0x0114
33 #define ADI_REG_TEMP_75_H 0x0118
34 #define ADI_REG_TEMP_100_L 0x011c
35
36 #define ADI_REG_IRQ_MASK 0x0040
37 #define ADI_REG_IRQ_PENDING 0x0044
38 #define ADI_REG_IRQ_SRC 0x0048
39
40 /* IRQ sources */
41 #define ADI_IRQ_SRC_PWM_CHANGED BIT(0)
42 #define ADI_IRQ_SRC_TACH_ERR BIT(1)
43 #define ADI_IRQ_SRC_TEMP_INCREASE BIT(2)
44 #define ADI_IRQ_SRC_NEW_MEASUR BIT(3)
45 #define ADI_IRQ_SRC_MASK GENMASK(3, 0)
46 #define ADI_IRQ_MASK_OUT_ALL 0xFFFFFFFFU
47
48 #define SYSFS_PWM_MAX 255
49
50 struct axi_fan_control_data {
51 void __iomem *base;
52 struct device *hdev;
53 unsigned long clk_rate;
54 int irq;
55 /* pulses per revolution */
56 u32 ppr;
57 bool hw_pwm_req;
58 bool update_tacho_params;
59 u8 fan_fault;
60 };
61
axi_iowrite(const u32 val,const u32 reg,const struct axi_fan_control_data * ctl)62 static inline void axi_iowrite(const u32 val, const u32 reg,
63 const struct axi_fan_control_data *ctl)
64 {
65 iowrite32(val, ctl->base + reg);
66 }
67
axi_ioread(const u32 reg,const struct axi_fan_control_data * ctl)68 static inline u32 axi_ioread(const u32 reg,
69 const struct axi_fan_control_data *ctl)
70 {
71 return ioread32(ctl->base + reg);
72 }
73
74 /*
75 * The core calculates the temperature as:
76 * T = /raw * 509.3140064 / 65535) - 280.2308787
77 */
axi_fan_control_show(struct device * dev,struct device_attribute * da,char * buf)78 static ssize_t axi_fan_control_show(struct device *dev, struct device_attribute *da, char *buf)
79 {
80 struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
81 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
82 u32 temp = axi_ioread(attr->index, ctl);
83
84 temp = DIV_ROUND_CLOSEST_ULL(temp * 509314ULL, 65535) - 280230;
85
86 return sprintf(buf, "%u\n", temp);
87 }
88
axi_fan_control_store(struct device * dev,struct device_attribute * da,const char * buf,size_t count)89 static ssize_t axi_fan_control_store(struct device *dev, struct device_attribute *da,
90 const char *buf, size_t count)
91 {
92 struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
93 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
94 u32 temp;
95 int ret;
96
97 ret = kstrtou32(buf, 10, &temp);
98 if (ret)
99 return ret;
100
101 temp = DIV_ROUND_CLOSEST_ULL((temp + 280230) * 65535ULL, 509314);
102 axi_iowrite(temp, attr->index, ctl);
103
104 return count;
105 }
106
axi_fan_control_get_pwm_duty(const struct axi_fan_control_data * ctl)107 static long axi_fan_control_get_pwm_duty(const struct axi_fan_control_data *ctl)
108 {
109 u32 pwm_width = axi_ioread(ADI_REG_PWM_WIDTH, ctl);
110 u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl);
111 /*
112 * PWM_PERIOD is a RO register set by the core. It should never be 0.
113 * For now we are trusting the HW...
114 */
115 return DIV_ROUND_CLOSEST(pwm_width * SYSFS_PWM_MAX, pwm_period);
116 }
117
axi_fan_control_set_pwm_duty(const long val,struct axi_fan_control_data * ctl)118 static int axi_fan_control_set_pwm_duty(const long val,
119 struct axi_fan_control_data *ctl)
120 {
121 u32 pwm_period = axi_ioread(ADI_REG_PWM_PERIOD, ctl);
122 u32 new_width;
123 long __val = clamp_val(val, 0, SYSFS_PWM_MAX);
124
125 new_width = DIV_ROUND_CLOSEST(__val * pwm_period, SYSFS_PWM_MAX);
126
127 axi_iowrite(new_width, ADI_REG_PWM_WIDTH, ctl);
128
129 return 0;
130 }
131
axi_fan_control_get_fan_rpm(const struct axi_fan_control_data * ctl)132 static long axi_fan_control_get_fan_rpm(const struct axi_fan_control_data *ctl)
133 {
134 const u32 tach = axi_ioread(ADI_REG_TACH_MEASUR, ctl);
135
136 if (tach == 0)
137 /* should we return error, EAGAIN maybe? */
138 return 0;
139 /*
140 * The tacho period should be:
141 * TACH = 60/(ppr * rpm), where rpm is revolutions per second
142 * and ppr is pulses per revolution.
143 * Given the tacho period, we can multiply it by the input clock
144 * so that we know how many clocks we need to have this period.
145 * From this, we can derive the RPM value.
146 */
147 return DIV_ROUND_CLOSEST(60 * ctl->clk_rate, ctl->ppr * tach);
148 }
149
axi_fan_control_read_temp(struct device * dev,u32 attr,long * val)150 static int axi_fan_control_read_temp(struct device *dev, u32 attr, long *val)
151 {
152 struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
153 long raw_temp;
154
155 switch (attr) {
156 case hwmon_temp_input:
157 raw_temp = axi_ioread(ADI_REG_TEMPERATURE, ctl);
158 /*
159 * The formula for the temperature is:
160 * T = (ADC * 501.3743 / 2^bits) - 273.6777
161 * It's multiplied by 1000 to have millidegrees as
162 * specified by the hwmon sysfs interface.
163 */
164 *val = ((raw_temp * 501374) >> 16) - 273677;
165 return 0;
166 default:
167 return -ENOTSUPP;
168 }
169 }
170
axi_fan_control_read_fan(struct device * dev,u32 attr,long * val)171 static int axi_fan_control_read_fan(struct device *dev, u32 attr, long *val)
172 {
173 struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
174
175 switch (attr) {
176 case hwmon_fan_fault:
177 *val = ctl->fan_fault;
178 /* clear it now */
179 ctl->fan_fault = 0;
180 return 0;
181 case hwmon_fan_input:
182 *val = axi_fan_control_get_fan_rpm(ctl);
183 return 0;
184 default:
185 return -ENOTSUPP;
186 }
187 }
188
axi_fan_control_read_pwm(struct device * dev,u32 attr,long * val)189 static int axi_fan_control_read_pwm(struct device *dev, u32 attr, long *val)
190 {
191 struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
192
193 switch (attr) {
194 case hwmon_pwm_input:
195 *val = axi_fan_control_get_pwm_duty(ctl);
196 return 0;
197 default:
198 return -ENOTSUPP;
199 }
200 }
201
axi_fan_control_write_pwm(struct device * dev,u32 attr,long val)202 static int axi_fan_control_write_pwm(struct device *dev, u32 attr, long val)
203 {
204 struct axi_fan_control_data *ctl = dev_get_drvdata(dev);
205
206 switch (attr) {
207 case hwmon_pwm_input:
208 return axi_fan_control_set_pwm_duty(val, ctl);
209 default:
210 return -ENOTSUPP;
211 }
212 }
213
axi_fan_control_read_labels(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,const char ** str)214 static int axi_fan_control_read_labels(struct device *dev,
215 enum hwmon_sensor_types type,
216 u32 attr, int channel, const char **str)
217 {
218 switch (type) {
219 case hwmon_fan:
220 *str = "FAN";
221 return 0;
222 case hwmon_temp:
223 *str = "SYSMON4";
224 return 0;
225 default:
226 return -ENOTSUPP;
227 }
228 }
229
axi_fan_control_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)230 static int axi_fan_control_read(struct device *dev,
231 enum hwmon_sensor_types type,
232 u32 attr, int channel, long *val)
233 {
234 switch (type) {
235 case hwmon_fan:
236 return axi_fan_control_read_fan(dev, attr, val);
237 case hwmon_pwm:
238 return axi_fan_control_read_pwm(dev, attr, val);
239 case hwmon_temp:
240 return axi_fan_control_read_temp(dev, attr, val);
241 default:
242 return -ENOTSUPP;
243 }
244 }
245
axi_fan_control_write(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long val)246 static int axi_fan_control_write(struct device *dev,
247 enum hwmon_sensor_types type,
248 u32 attr, int channel, long val)
249 {
250 switch (type) {
251 case hwmon_pwm:
252 return axi_fan_control_write_pwm(dev, attr, val);
253 default:
254 return -ENOTSUPP;
255 }
256 }
257
axi_fan_control_fan_is_visible(const u32 attr)258 static umode_t axi_fan_control_fan_is_visible(const u32 attr)
259 {
260 switch (attr) {
261 case hwmon_fan_input:
262 case hwmon_fan_fault:
263 case hwmon_fan_label:
264 return 0444;
265 default:
266 return 0;
267 }
268 }
269
axi_fan_control_pwm_is_visible(const u32 attr)270 static umode_t axi_fan_control_pwm_is_visible(const u32 attr)
271 {
272 switch (attr) {
273 case hwmon_pwm_input:
274 return 0644;
275 default:
276 return 0;
277 }
278 }
279
axi_fan_control_temp_is_visible(const u32 attr)280 static umode_t axi_fan_control_temp_is_visible(const u32 attr)
281 {
282 switch (attr) {
283 case hwmon_temp_input:
284 case hwmon_temp_label:
285 return 0444;
286 default:
287 return 0;
288 }
289 }
290
axi_fan_control_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)291 static umode_t axi_fan_control_is_visible(const void *data,
292 enum hwmon_sensor_types type,
293 u32 attr, int channel)
294 {
295 switch (type) {
296 case hwmon_fan:
297 return axi_fan_control_fan_is_visible(attr);
298 case hwmon_pwm:
299 return axi_fan_control_pwm_is_visible(attr);
300 case hwmon_temp:
301 return axi_fan_control_temp_is_visible(attr);
302 default:
303 return 0;
304 }
305 }
306
307 /*
308 * This core has two main ways of changing the PWM duty cycle. It is done,
309 * either by a request from userspace (writing on pwm1_input) or by the
310 * core itself. When the change is done by the core, it will use predefined
311 * parameters to evaluate the tach signal and, on that case we cannot set them.
312 * On the other hand, when the request is done by the user, with some arbitrary
313 * value that the core does not now about, we have to provide the tach
314 * parameters so that, the core can evaluate the signal. On the IRQ handler we
315 * distinguish this by using the ADI_IRQ_SRC_TEMP_INCREASE interrupt. This tell
316 * us that the CORE requested a new duty cycle. After this, there is 5s delay
317 * on which the core waits for the fan rotation speed to stabilize. After this
318 * we get ADI_IRQ_SRC_PWM_CHANGED irq where we will decide if we need to set
319 * the tach parameters or not on the next tach measurement cycle (corresponding
320 * already to the ney duty cycle) based on the %ctl->hw_pwm_req flag.
321 */
axi_fan_control_irq_handler(int irq,void * data)322 static irqreturn_t axi_fan_control_irq_handler(int irq, void *data)
323 {
324 struct axi_fan_control_data *ctl = (struct axi_fan_control_data *)data;
325 u32 irq_pending = axi_ioread(ADI_REG_IRQ_PENDING, ctl);
326 u32 clear_mask;
327
328 if (irq_pending & ADI_IRQ_SRC_TEMP_INCREASE)
329 /* hardware requested a new pwm */
330 ctl->hw_pwm_req = true;
331
332 if (irq_pending & ADI_IRQ_SRC_PWM_CHANGED) {
333 /*
334 * if the pwm changes on behalf of software,
335 * we need to provide new tacho parameters to the core.
336 * Wait for the next measurement for that...
337 */
338 if (!ctl->hw_pwm_req) {
339 ctl->update_tacho_params = true;
340 } else {
341 ctl->hw_pwm_req = false;
342 hwmon_notify_event(ctl->hdev, hwmon_pwm,
343 hwmon_pwm_input, 0);
344 }
345 }
346
347 if (irq_pending & ADI_IRQ_SRC_NEW_MEASUR) {
348 if (ctl->update_tacho_params) {
349 u32 new_tach = axi_ioread(ADI_REG_TACH_MEASUR, ctl);
350 /* get 25% tolerance */
351 u32 tach_tol = DIV_ROUND_CLOSEST(new_tach * 25, 100);
352
353 /* set new tacho parameters */
354 axi_iowrite(new_tach, ADI_REG_TACH_PERIOD, ctl);
355 axi_iowrite(tach_tol, ADI_REG_TACH_TOLERANCE, ctl);
356 ctl->update_tacho_params = false;
357 }
358 }
359
360 if (irq_pending & ADI_IRQ_SRC_TACH_ERR)
361 ctl->fan_fault = 1;
362
363 /* clear all interrupts */
364 clear_mask = irq_pending & ADI_IRQ_SRC_MASK;
365 axi_iowrite(clear_mask, ADI_REG_IRQ_PENDING, ctl);
366
367 return IRQ_HANDLED;
368 }
369
axi_fan_control_init(struct axi_fan_control_data * ctl,const struct device_node * np)370 static int axi_fan_control_init(struct axi_fan_control_data *ctl,
371 const struct device_node *np)
372 {
373 int ret;
374
375 /* get fan pulses per revolution */
376 ret = of_property_read_u32(np, "pulses-per-revolution", &ctl->ppr);
377 if (ret)
378 return ret;
379
380 /* 1, 2 and 4 are the typical and accepted values */
381 if (ctl->ppr != 1 && ctl->ppr != 2 && ctl->ppr != 4)
382 return -EINVAL;
383 /*
384 * Enable all IRQs
385 */
386 axi_iowrite(ADI_IRQ_MASK_OUT_ALL &
387 ~(ADI_IRQ_SRC_NEW_MEASUR | ADI_IRQ_SRC_TACH_ERR |
388 ADI_IRQ_SRC_PWM_CHANGED | ADI_IRQ_SRC_TEMP_INCREASE),
389 ADI_REG_IRQ_MASK, ctl);
390
391 /* bring the device out of reset */
392 axi_iowrite(0x01, ADI_REG_RSTN, ctl);
393
394 return ret;
395 }
396
397 static const struct hwmon_channel_info * const axi_fan_control_info[] = {
398 HWMON_CHANNEL_INFO(pwm, HWMON_PWM_INPUT),
399 HWMON_CHANNEL_INFO(fan, HWMON_F_INPUT | HWMON_F_FAULT | HWMON_F_LABEL),
400 HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_LABEL),
401 NULL
402 };
403
404 static const struct hwmon_ops axi_fan_control_hwmon_ops = {
405 .is_visible = axi_fan_control_is_visible,
406 .read = axi_fan_control_read,
407 .write = axi_fan_control_write,
408 .read_string = axi_fan_control_read_labels,
409 };
410
411 static const struct hwmon_chip_info axi_chip_info = {
412 .ops = &axi_fan_control_hwmon_ops,
413 .info = axi_fan_control_info,
414 };
415
416 /* temperature threshold below which PWM should be 0% */
417 static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_temp_hyst, axi_fan_control, ADI_REG_TEMP_00_H);
418 /* temperature threshold above which PWM should be 25% */
419 static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point1_temp, axi_fan_control, ADI_REG_TEMP_25_L);
420 /* temperature threshold below which PWM should be 25% */
421 static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_temp_hyst, axi_fan_control, ADI_REG_TEMP_25_H);
422 /* temperature threshold above which PWM should be 50% */
423 static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point2_temp, axi_fan_control, ADI_REG_TEMP_50_L);
424 /* temperature threshold below which PWM should be 50% */
425 static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point3_temp_hyst, axi_fan_control, ADI_REG_TEMP_50_H);
426 /* temperature threshold above which PWM should be 75% */
427 static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point3_temp, axi_fan_control, ADI_REG_TEMP_75_L);
428 /* temperature threshold below which PWM should be 75% */
429 static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point4_temp_hyst, axi_fan_control, ADI_REG_TEMP_75_H);
430 /* temperature threshold above which PWM should be 100% */
431 static SENSOR_DEVICE_ATTR_RW(pwm1_auto_point4_temp, axi_fan_control, ADI_REG_TEMP_100_L);
432
433 static struct attribute *axi_fan_control_attrs[] = {
434 &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
435 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
436 &sensor_dev_attr_pwm1_auto_point2_temp_hyst.dev_attr.attr,
437 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
438 &sensor_dev_attr_pwm1_auto_point3_temp_hyst.dev_attr.attr,
439 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
440 &sensor_dev_attr_pwm1_auto_point4_temp_hyst.dev_attr.attr,
441 &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
442 NULL,
443 };
444 ATTRIBUTE_GROUPS(axi_fan_control);
445
446 static const u32 version_1_0_0 = ADI_AXI_PCORE_VER(1, 0, 'a');
447
448 static const struct of_device_id axi_fan_control_of_match[] = {
449 { .compatible = "adi,axi-fan-control-1.00.a",
450 .data = (void *)&version_1_0_0},
451 {},
452 };
453 MODULE_DEVICE_TABLE(of, axi_fan_control_of_match);
454
axi_fan_control_probe(struct platform_device * pdev)455 static int axi_fan_control_probe(struct platform_device *pdev)
456 {
457 struct axi_fan_control_data *ctl;
458 struct clk *clk;
459 const struct of_device_id *id;
460 const char *name = "axi_fan_control";
461 u32 version;
462 int ret;
463
464 id = of_match_node(axi_fan_control_of_match, pdev->dev.of_node);
465 if (!id)
466 return -EINVAL;
467
468 ctl = devm_kzalloc(&pdev->dev, sizeof(*ctl), GFP_KERNEL);
469 if (!ctl)
470 return -ENOMEM;
471
472 ctl->base = devm_platform_ioremap_resource(pdev, 0);
473 if (IS_ERR(ctl->base))
474 return PTR_ERR(ctl->base);
475
476 clk = devm_clk_get_enabled(&pdev->dev, NULL);
477 if (IS_ERR(clk)) {
478 dev_err(&pdev->dev, "clk_get failed with %ld\n", PTR_ERR(clk));
479 return PTR_ERR(clk);
480 }
481
482 ctl->clk_rate = clk_get_rate(clk);
483 if (!ctl->clk_rate)
484 return -EINVAL;
485
486 version = axi_ioread(ADI_AXI_REG_VERSION, ctl);
487 if (ADI_AXI_PCORE_VER_MAJOR(version) !=
488 ADI_AXI_PCORE_VER_MAJOR((*(u32 *)id->data))) {
489 dev_err(&pdev->dev, "Major version mismatch. Expected %d.%.2d.%c, Reported %d.%.2d.%c\n",
490 ADI_AXI_PCORE_VER_MAJOR((*(u32 *)id->data)),
491 ADI_AXI_PCORE_VER_MINOR((*(u32 *)id->data)),
492 ADI_AXI_PCORE_VER_PATCH((*(u32 *)id->data)),
493 ADI_AXI_PCORE_VER_MAJOR(version),
494 ADI_AXI_PCORE_VER_MINOR(version),
495 ADI_AXI_PCORE_VER_PATCH(version));
496 return -ENODEV;
497 }
498
499 ctl->irq = platform_get_irq(pdev, 0);
500 if (ctl->irq < 0)
501 return ctl->irq;
502
503 ret = devm_request_threaded_irq(&pdev->dev, ctl->irq, NULL,
504 axi_fan_control_irq_handler,
505 IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
506 pdev->driver_override, ctl);
507 if (ret) {
508 dev_err(&pdev->dev, "failed to request an irq, %d", ret);
509 return ret;
510 }
511
512 ret = axi_fan_control_init(ctl, pdev->dev.of_node);
513 if (ret) {
514 dev_err(&pdev->dev, "Failed to initialize device\n");
515 return ret;
516 }
517
518 ctl->hdev = devm_hwmon_device_register_with_info(&pdev->dev,
519 name,
520 ctl,
521 &axi_chip_info,
522 axi_fan_control_groups);
523
524 return PTR_ERR_OR_ZERO(ctl->hdev);
525 }
526
527 static struct platform_driver axi_fan_control_driver = {
528 .driver = {
529 .name = "axi_fan_control_driver",
530 .of_match_table = axi_fan_control_of_match,
531 },
532 .probe = axi_fan_control_probe,
533 };
534 module_platform_driver(axi_fan_control_driver);
535
536 MODULE_AUTHOR("Nuno Sa <nuno.sa@analog.com>");
537 MODULE_DESCRIPTION("Analog Devices Fan Control HDL CORE driver");
538 MODULE_LICENSE("GPL");
539
