1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (C) 2016 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 * Copyright (C) 2014 Endless Mobile
6 *
7 * Written by:
8 * Jasper St. Pierre <jstpierre@mecheye.net>
9 */
10
11 #include <linux/component.h>
12 #include <linux/module.h>
13 #include <linux/of_graph.h>
14 #include <linux/sys_soc.h>
15 #include <linux/platform_device.h>
16 #include <linux/soc/amlogic/meson-canvas.h>
17
18 #include <drm/drm_aperture.h>
19 #include <drm/drm_atomic_helper.h>
20 #include <drm/drm_drv.h>
21 #include <drm/drm_fb_helper.h>
22 #include <drm/drm_gem_cma_helper.h>
23 #include <drm/drm_gem_framebuffer_helper.h>
24 #include <drm/drm_modeset_helper_vtables.h>
25 #include <drm/drm_probe_helper.h>
26 #include <drm/drm_vblank.h>
27
28 #include "meson_crtc.h"
29 #include "meson_drv.h"
30 #include "meson_overlay.h"
31 #include "meson_plane.h"
32 #include "meson_osd_afbcd.h"
33 #include "meson_registers.h"
34 #include "meson_venc_cvbs.h"
35 #include "meson_viu.h"
36 #include "meson_vpp.h"
37 #include "meson_rdma.h"
38
39 #define DRIVER_NAME "meson"
40 #define DRIVER_DESC "Amlogic Meson DRM driver"
41
42 /**
43 * DOC: Video Processing Unit
44 *
45 * VPU Handles the Global Video Processing, it includes management of the
46 * clocks gates, blocks reset lines and power domains.
47 *
48 * What is missing :
49 *
50 * - Full reset of entire video processing HW blocks
51 * - Scaling and setup of the VPU clock
52 * - Bus clock gates
53 * - Powering up video processing HW blocks
54 * - Powering Up HDMI controller and PHY
55 */
56
57 static const struct drm_mode_config_funcs meson_mode_config_funcs = {
58 .atomic_check = drm_atomic_helper_check,
59 .atomic_commit = drm_atomic_helper_commit,
60 .fb_create = drm_gem_fb_create,
61 };
62
63 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
64 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
65 };
66
meson_irq(int irq,void * arg)67 static irqreturn_t meson_irq(int irq, void *arg)
68 {
69 struct drm_device *dev = arg;
70 struct meson_drm *priv = dev->dev_private;
71
72 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
73
74 meson_crtc_irq(priv);
75
76 return IRQ_HANDLED;
77 }
78
meson_dumb_create(struct drm_file * file,struct drm_device * dev,struct drm_mode_create_dumb * args)79 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
80 struct drm_mode_create_dumb *args)
81 {
82 /*
83 * We need 64bytes aligned stride, and PAGE aligned size
84 */
85 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
86 args->size = PAGE_ALIGN(args->pitch * args->height);
87
88 return drm_gem_cma_dumb_create_internal(file, dev, args);
89 }
90
91 DEFINE_DRM_GEM_CMA_FOPS(fops);
92
93 static const struct drm_driver meson_driver = {
94 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
95
96 /* CMA Ops */
97 DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(meson_dumb_create),
98
99 /* Misc */
100 .fops = &fops,
101 .name = DRIVER_NAME,
102 .desc = DRIVER_DESC,
103 .date = "20161109",
104 .major = 1,
105 .minor = 0,
106 };
107
meson_vpu_has_available_connectors(struct device * dev)108 static bool meson_vpu_has_available_connectors(struct device *dev)
109 {
110 struct device_node *ep, *remote;
111
112 /* Parses each endpoint and check if remote exists */
113 for_each_endpoint_of_node(dev->of_node, ep) {
114 /* If the endpoint node exists, consider it enabled */
115 remote = of_graph_get_remote_port(ep);
116 if (remote)
117 return true;
118 }
119
120 return false;
121 }
122
123 static struct regmap_config meson_regmap_config = {
124 .reg_bits = 32,
125 .val_bits = 32,
126 .reg_stride = 4,
127 .max_register = 0x1000,
128 };
129
meson_vpu_init(struct meson_drm * priv)130 static void meson_vpu_init(struct meson_drm *priv)
131 {
132 u32 value;
133
134 /*
135 * Slave dc0 and dc5 connected to master port 1.
136 * By default other slaves are connected to master port 0.
137 */
138 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
139 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
140 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
141
142 /* Slave dc0 connected to master port 1 */
143 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
144 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
145
146 /* Slave dc4 and dc7 connected to master port 1 */
147 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
148 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
149 writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
150
151 /* Slave dc1 connected to master port 1 */
152 value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
153 writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
154 }
155
156 struct meson_drm_soc_attr {
157 struct meson_drm_soc_limits limits;
158 const struct soc_device_attribute *attrs;
159 };
160
161 static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
162 /* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
163 {
164 .limits = {
165 .max_hdmi_phy_freq = 1650000,
166 },
167 .attrs = (const struct soc_device_attribute []) {
168 { .soc_id = "GXL (S805*)", },
169 { /* sentinel */ },
170 }
171 },
172 };
173
meson_drv_bind_master(struct device * dev,bool has_components)174 static int meson_drv_bind_master(struct device *dev, bool has_components)
175 {
176 struct platform_device *pdev = to_platform_device(dev);
177 const struct meson_drm_match_data *match;
178 struct meson_drm *priv;
179 struct drm_device *drm;
180 struct resource *res;
181 void __iomem *regs;
182 int ret, i;
183
184 /* Checks if an output connector is available */
185 if (!meson_vpu_has_available_connectors(dev)) {
186 dev_err(dev, "No output connector available\n");
187 return -ENODEV;
188 }
189
190 match = of_device_get_match_data(dev);
191 if (!match)
192 return -ENODEV;
193
194 drm = drm_dev_alloc(&meson_driver, dev);
195 if (IS_ERR(drm))
196 return PTR_ERR(drm);
197
198 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
199 if (!priv) {
200 ret = -ENOMEM;
201 goto free_drm;
202 }
203 drm->dev_private = priv;
204 priv->drm = drm;
205 priv->dev = dev;
206 priv->compat = match->compat;
207 priv->afbcd.ops = match->afbcd_ops;
208
209 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
210 regs = devm_ioremap_resource(dev, res);
211 if (IS_ERR(regs)) {
212 ret = PTR_ERR(regs);
213 goto free_drm;
214 }
215
216 priv->io_base = regs;
217
218 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
219 if (!res) {
220 ret = -EINVAL;
221 goto free_drm;
222 }
223 /* Simply ioremap since it may be a shared register zone */
224 regs = devm_ioremap(dev, res->start, resource_size(res));
225 if (!regs) {
226 ret = -EADDRNOTAVAIL;
227 goto free_drm;
228 }
229
230 priv->hhi = devm_regmap_init_mmio(dev, regs,
231 &meson_regmap_config);
232 if (IS_ERR(priv->hhi)) {
233 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
234 ret = PTR_ERR(priv->hhi);
235 goto free_drm;
236 }
237
238 priv->canvas = meson_canvas_get(dev);
239 if (IS_ERR(priv->canvas)) {
240 ret = PTR_ERR(priv->canvas);
241 goto free_drm;
242 }
243
244 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
245 if (ret)
246 goto free_drm;
247 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
248 if (ret) {
249 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
250 goto free_drm;
251 }
252 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
253 if (ret) {
254 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
255 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
256 goto free_drm;
257 }
258 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
259 if (ret) {
260 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
261 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
262 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
263 goto free_drm;
264 }
265
266 priv->vsync_irq = platform_get_irq(pdev, 0);
267
268 ret = drm_vblank_init(drm, 1);
269 if (ret)
270 goto free_drm;
271
272 /* Assign limits per soc revision/package */
273 for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) {
274 if (soc_device_match(meson_drm_soc_attrs[i].attrs)) {
275 priv->limits = &meson_drm_soc_attrs[i].limits;
276 break;
277 }
278 }
279
280 /*
281 * Remove early framebuffers (ie. simplefb). The framebuffer can be
282 * located anywhere in RAM
283 */
284 ret = drm_aperture_remove_framebuffers(false, &meson_driver);
285 if (ret)
286 goto free_drm;
287
288 ret = drmm_mode_config_init(drm);
289 if (ret)
290 goto free_drm;
291 drm->mode_config.max_width = 3840;
292 drm->mode_config.max_height = 2160;
293 drm->mode_config.funcs = &meson_mode_config_funcs;
294 drm->mode_config.helper_private = &meson_mode_config_helpers;
295
296 /* Hardware Initialization */
297
298 meson_vpu_init(priv);
299 meson_venc_init(priv);
300 meson_vpp_init(priv);
301 meson_viu_init(priv);
302 if (priv->afbcd.ops) {
303 ret = priv->afbcd.ops->init(priv);
304 if (ret)
305 return ret;
306 }
307
308 /* Encoder Initialization */
309
310 ret = meson_venc_cvbs_create(priv);
311 if (ret)
312 goto free_drm;
313
314 if (has_components) {
315 ret = component_bind_all(drm->dev, drm);
316 if (ret) {
317 dev_err(drm->dev, "Couldn't bind all components\n");
318 goto free_drm;
319 }
320 }
321
322 ret = meson_plane_create(priv);
323 if (ret)
324 goto free_drm;
325
326 ret = meson_overlay_create(priv);
327 if (ret)
328 goto free_drm;
329
330 ret = meson_crtc_create(priv);
331 if (ret)
332 goto free_drm;
333
334 ret = request_irq(priv->vsync_irq, meson_irq, 0, drm->driver->name, drm);
335 if (ret)
336 goto free_drm;
337
338 drm_mode_config_reset(drm);
339
340 drm_kms_helper_poll_init(drm);
341
342 platform_set_drvdata(pdev, priv);
343
344 ret = drm_dev_register(drm, 0);
345 if (ret)
346 goto uninstall_irq;
347
348 drm_fbdev_generic_setup(drm, 32);
349
350 return 0;
351
352 uninstall_irq:
353 free_irq(priv->vsync_irq, drm);
354 free_drm:
355 drm_dev_put(drm);
356
357 return ret;
358 }
359
meson_drv_bind(struct device * dev)360 static int meson_drv_bind(struct device *dev)
361 {
362 return meson_drv_bind_master(dev, true);
363 }
364
meson_drv_unbind(struct device * dev)365 static void meson_drv_unbind(struct device *dev)
366 {
367 struct meson_drm *priv = dev_get_drvdata(dev);
368 struct drm_device *drm = priv->drm;
369
370 if (priv->canvas) {
371 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
372 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
373 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
374 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
375 }
376
377 drm_dev_unregister(drm);
378 drm_kms_helper_poll_fini(drm);
379 drm_atomic_helper_shutdown(drm);
380 component_unbind_all(dev, drm);
381 free_irq(priv->vsync_irq, drm);
382 drm_dev_put(drm);
383
384 if (priv->afbcd.ops) {
385 priv->afbcd.ops->reset(priv);
386 meson_rdma_free(priv);
387 }
388 }
389
390 static const struct component_master_ops meson_drv_master_ops = {
391 .bind = meson_drv_bind,
392 .unbind = meson_drv_unbind,
393 };
394
meson_drv_pm_suspend(struct device * dev)395 static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
396 {
397 struct meson_drm *priv = dev_get_drvdata(dev);
398
399 if (!priv)
400 return 0;
401
402 return drm_mode_config_helper_suspend(priv->drm);
403 }
404
meson_drv_pm_resume(struct device * dev)405 static int __maybe_unused meson_drv_pm_resume(struct device *dev)
406 {
407 struct meson_drm *priv = dev_get_drvdata(dev);
408
409 if (!priv)
410 return 0;
411
412 meson_vpu_init(priv);
413 meson_venc_init(priv);
414 meson_vpp_init(priv);
415 meson_viu_init(priv);
416 if (priv->afbcd.ops)
417 priv->afbcd.ops->init(priv);
418
419 return drm_mode_config_helper_resume(priv->drm);
420 }
421
compare_of(struct device * dev,void * data)422 static int compare_of(struct device *dev, void *data)
423 {
424 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
425 dev->of_node, data);
426
427 return dev->of_node == data;
428 }
429
430 /* Possible connectors nodes to ignore */
431 static const struct of_device_id connectors_match[] = {
432 { .compatible = "composite-video-connector" },
433 { .compatible = "svideo-connector" },
434 { .compatible = "hdmi-connector" },
435 { .compatible = "dvi-connector" },
436 {}
437 };
438
meson_probe_remote(struct platform_device * pdev,struct component_match ** match,struct device_node * parent,struct device_node * remote)439 static int meson_probe_remote(struct platform_device *pdev,
440 struct component_match **match,
441 struct device_node *parent,
442 struct device_node *remote)
443 {
444 struct device_node *ep, *remote_node;
445 int count = 1;
446
447 /* If node is a connector, return and do not add to match table */
448 if (of_match_node(connectors_match, remote))
449 return 1;
450
451 component_match_add(&pdev->dev, match, compare_of, remote);
452
453 for_each_endpoint_of_node(remote, ep) {
454 remote_node = of_graph_get_remote_port_parent(ep);
455 if (!remote_node ||
456 remote_node == parent || /* Ignore parent endpoint */
457 !of_device_is_available(remote_node)) {
458 of_node_put(remote_node);
459 continue;
460 }
461
462 count += meson_probe_remote(pdev, match, remote, remote_node);
463
464 of_node_put(remote_node);
465 }
466
467 return count;
468 }
469
meson_drv_shutdown(struct platform_device * pdev)470 static void meson_drv_shutdown(struct platform_device *pdev)
471 {
472 struct meson_drm *priv = dev_get_drvdata(&pdev->dev);
473
474 if (!priv)
475 return;
476
477 drm_kms_helper_poll_fini(priv->drm);
478 drm_atomic_helper_shutdown(priv->drm);
479 }
480
meson_drv_probe(struct platform_device * pdev)481 static int meson_drv_probe(struct platform_device *pdev)
482 {
483 struct component_match *match = NULL;
484 struct device_node *np = pdev->dev.of_node;
485 struct device_node *ep, *remote;
486 int count = 0;
487
488 for_each_endpoint_of_node(np, ep) {
489 remote = of_graph_get_remote_port_parent(ep);
490 if (!remote || !of_device_is_available(remote)) {
491 of_node_put(remote);
492 continue;
493 }
494
495 count += meson_probe_remote(pdev, &match, np, remote);
496 of_node_put(remote);
497 }
498
499 if (count && !match)
500 return meson_drv_bind_master(&pdev->dev, false);
501
502 /* If some endpoints were found, initialize the nodes */
503 if (count) {
504 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
505
506 return component_master_add_with_match(&pdev->dev,
507 &meson_drv_master_ops,
508 match);
509 }
510
511 /* If no output endpoints were available, simply bail out */
512 return 0;
513 };
514
515 static struct meson_drm_match_data meson_drm_gxbb_data = {
516 .compat = VPU_COMPATIBLE_GXBB,
517 };
518
519 static struct meson_drm_match_data meson_drm_gxl_data = {
520 .compat = VPU_COMPATIBLE_GXL,
521 };
522
523 static struct meson_drm_match_data meson_drm_gxm_data = {
524 .compat = VPU_COMPATIBLE_GXM,
525 .afbcd_ops = &meson_afbcd_gxm_ops,
526 };
527
528 static struct meson_drm_match_data meson_drm_g12a_data = {
529 .compat = VPU_COMPATIBLE_G12A,
530 .afbcd_ops = &meson_afbcd_g12a_ops,
531 };
532
533 static const struct of_device_id dt_match[] = {
534 { .compatible = "amlogic,meson-gxbb-vpu",
535 .data = (void *)&meson_drm_gxbb_data },
536 { .compatible = "amlogic,meson-gxl-vpu",
537 .data = (void *)&meson_drm_gxl_data },
538 { .compatible = "amlogic,meson-gxm-vpu",
539 .data = (void *)&meson_drm_gxm_data },
540 { .compatible = "amlogic,meson-g12a-vpu",
541 .data = (void *)&meson_drm_g12a_data },
542 {}
543 };
544 MODULE_DEVICE_TABLE(of, dt_match);
545
546 static const struct dev_pm_ops meson_drv_pm_ops = {
547 SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume)
548 };
549
550 static struct platform_driver meson_drm_platform_driver = {
551 .probe = meson_drv_probe,
552 .shutdown = meson_drv_shutdown,
553 .driver = {
554 .name = "meson-drm",
555 .of_match_table = dt_match,
556 .pm = &meson_drv_pm_ops,
557 },
558 };
559
560 module_platform_driver(meson_drm_platform_driver);
561
562 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
563 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
564 MODULE_DESCRIPTION(DRIVER_DESC);
565 MODULE_LICENSE("GPL");
566
