1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/ 4 */ 5 6#include <dt-bindings/gpio/gpio.h> 7#include <dt-bindings/clk/ti-dra7-atl.h> 8#include <dt-bindings/input/input.h> 9 10/ { 11 chosen { 12 stdout-path = &uart1; 13 }; 14 15 extcon_usb1: extcon_usb1 { 16 compatible = "linux,extcon-usb-gpio"; 17 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; 18 }; 19 20 extcon_usb2: extcon_usb2 { 21 compatible = "linux,extcon-usb-gpio"; 22 id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>; 23 }; 24 25 sound0: sound0 { 26 compatible = "simple-audio-card"; 27 simple-audio-card,name = "DRA7xx-EVM"; 28 simple-audio-card,widgets = 29 "Headphone", "Headphone Jack", 30 "Line", "Line Out", 31 "Microphone", "Mic Jack", 32 "Line", "Line In"; 33 simple-audio-card,routing = 34 "Headphone Jack", "HPLOUT", 35 "Headphone Jack", "HPROUT", 36 "Line Out", "LLOUT", 37 "Line Out", "RLOUT", 38 "MIC3L", "Mic Jack", 39 "MIC3R", "Mic Jack", 40 "Mic Jack", "Mic Bias", 41 "LINE1L", "Line In", 42 "LINE1R", "Line In"; 43 simple-audio-card,format = "dsp_b"; 44 simple-audio-card,bitclock-master = <&sound0_master>; 45 simple-audio-card,frame-master = <&sound0_master>; 46 simple-audio-card,bitclock-inversion; 47 48 sound0_master: simple-audio-card,cpu { 49 sound-dai = <&mcasp3>; 50 system-clock-frequency = <5644800>; 51 }; 52 53 simple-audio-card,codec { 54 sound-dai = <&tlv320aic3106>; 55 clocks = <&atl_clkin2_ck>; 56 }; 57 }; 58 59 leds { 60 compatible = "gpio-leds"; 61 led0 { 62 label = "dra7:usr1"; 63 gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>; 64 default-state = "off"; 65 }; 66 67 led1 { 68 label = "dra7:usr2"; 69 gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>; 70 default-state = "off"; 71 }; 72 73 led2 { 74 label = "dra7:usr3"; 75 gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>; 76 default-state = "off"; 77 }; 78 79 led3 { 80 label = "dra7:usr4"; 81 gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>; 82 default-state = "off"; 83 }; 84 }; 85 86 gpio_keys { 87 compatible = "gpio-keys"; 88 #address-cells = <1>; 89 #size-cells = <0>; 90 autorepeat; 91 92 USER1 { 93 label = "btnUser1"; 94 linux,code = <BTN_0>; 95 gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>; 96 }; 97 98 USER2 { 99 label = "btnUser2"; 100 linux,code = <BTN_1>; 101 gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>; 102 }; 103 }; 104}; 105 106&i2c3 { 107 status = "okay"; 108 clock-frequency = <400000>; 109}; 110 111&mcspi1 { 112 status = "okay"; 113}; 114 115&mcspi2 { 116 status = "okay"; 117}; 118 119&uart1 { 120 status = "okay"; 121 interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 122 <&dra7_pmx_core 0x3e0>; 123}; 124 125&uart2 { 126 status = "okay"; 127}; 128 129&uart3 { 130 status = "okay"; 131}; 132 133&qspi { 134 status = "okay"; 135 136 spi-max-frequency = <76800000>; 137 m25p80@0 { 138 compatible = "s25fl256s1"; 139 spi-max-frequency = <76800000>; 140 reg = <0>; 141 spi-tx-bus-width = <1>; 142 spi-rx-bus-width = <4>; 143 #address-cells = <1>; 144 #size-cells = <1>; 145 146 /* MTD partition table. 147 * The ROM checks the first four physical blocks 148 * for a valid file to boot and the flash here is 149 * 64KiB block size. 150 */ 151 partition@0 { 152 label = "QSPI.SPL"; 153 reg = <0x00000000 0x000010000>; 154 }; 155 partition@1 { 156 label = "QSPI.SPL.backup1"; 157 reg = <0x00010000 0x00010000>; 158 }; 159 partition@2 { 160 label = "QSPI.SPL.backup2"; 161 reg = <0x00020000 0x00010000>; 162 }; 163 partition@3 { 164 label = "QSPI.SPL.backup3"; 165 reg = <0x00030000 0x00010000>; 166 }; 167 partition@4 { 168 label = "QSPI.u-boot"; 169 reg = <0x00040000 0x00100000>; 170 }; 171 partition@5 { 172 label = "QSPI.u-boot-spl-os"; 173 reg = <0x00140000 0x00080000>; 174 }; 175 partition@6 { 176 label = "QSPI.u-boot-env"; 177 reg = <0x001c0000 0x00010000>; 178 }; 179 partition@7 { 180 label = "QSPI.u-boot-env.backup1"; 181 reg = <0x001d0000 0x0010000>; 182 }; 183 partition@8 { 184 label = "QSPI.kernel"; 185 reg = <0x001e0000 0x0800000>; 186 }; 187 partition@9 { 188 label = "QSPI.file-system"; 189 reg = <0x009e0000 0x01620000>; 190 }; 191 }; 192}; 193 194&omap_dwc3_1 { 195 extcon = <&extcon_usb1>; 196}; 197 198&usb1 { 199 dr_mode = "otg"; 200 extcon = <&extcon_usb1>; 201}; 202 203&omap_dwc3_2 { 204 extcon = <&extcon_usb2>; 205}; 206 207&usb2 { 208 dr_mode = "host"; 209 extcon = <&extcon_usb2>; 210}; 211 212&atl { 213 assigned-clocks = <&abe_dpll_sys_clk_mux>, 214 <&atl_clkctrl DRA7_ATL_ATL_CLKCTRL 26>, 215 <&dpll_abe_ck>, 216 <&dpll_abe_m2x2_ck>, 217 <&atl_clkin2_ck>; 218 assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>; 219 assigned-clock-rates = <0>, <0>, <180633600>, <361267200>, <5644800>; 220 221 status = "okay"; 222 223 atl2 { 224 bws = <DRA7_ATL_WS_MCASP2_FSX>; 225 aws = <DRA7_ATL_WS_MCASP3_FSX>; 226 }; 227}; 228 229&mcasp3 { 230 #sound-dai-cells = <0>; 231 232 assigned-clocks = <&l4per2_clkctrl DRA7_L4PER2_MCASP3_CLKCTRL 24>; 233 assigned-clock-parents = <&atl_clkin2_ck>; 234 235 status = "okay"; 236 237 op-mode = <0>; /* MCASP_IIS_MODE */ 238 tdm-slots = <2>; 239 /* 4 serializer */ 240 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 241 1 2 0 0 242 >; 243 tx-num-evt = <32>; 244 rx-num-evt = <32>; 245}; 246 247&mailbox5 { 248 status = "okay"; 249 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { 250 status = "okay"; 251 }; 252 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { 253 status = "okay"; 254 }; 255}; 256 257&mailbox6 { 258 status = "okay"; 259 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { 260 status = "okay"; 261 }; 262 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { 263 status = "okay"; 264 }; 265}; 266 267&pcie1_rc { 268 status = "okay"; 269}; 270 271&mmc4 { 272 bus-width = <4>; 273 cap-power-off-card; 274 keep-power-in-suspend; 275 non-removable; 276 #address-cells = <1>; 277 #size-cells = <0>; 278 wifi@2 { 279 compatible = "ti,wl1835"; 280 reg = <2>; 281 interrupt-parent = <&gpio5>; 282 interrupts = <7 IRQ_TYPE_EDGE_RISING>; 283 }; 284}; 285