1 /* 2 * Copyright 2016 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DC_HWSS_DCN10_H__ 27 #define __DC_HWSS_DCN10_H__ 28 29 #include "core_types.h" 30 31 struct dc; 32 33 void dcn10_hw_sequencer_construct(struct dc *dc); 34 extern void fill_display_configs( 35 const struct dc_state *context, 36 struct dm_pp_display_configuration *pp_display_cfg); 37 38 bool is_rgb_cspace(enum dc_color_space output_color_space); 39 40 void hwss1_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx); 41 42 void dcn10_verify_allow_pstate_change_high(struct dc *dc); 43 44 void dcn10_program_pipe( 45 struct dc *dc, 46 struct pipe_ctx *pipe_ctx, 47 struct dc_state *context); 48 49 void dcn10_get_hw_state( 50 struct dc *dc, 51 char *pBuf, unsigned int bufSize, 52 unsigned int mask); 53 54 void dcn10_clear_status_bits(struct dc *dc, unsigned int mask); 55 56 bool is_lower_pipe_tree_visible(struct pipe_ctx *pipe_ctx); 57 58 bool is_upper_pipe_tree_visible(struct pipe_ctx *pipe_ctx); 59 60 bool is_pipe_tree_visible(struct pipe_ctx *pipe_ctx); 61 62 void dcn10_program_pte_vm(struct dce_hwseq *hws, struct hubp *hubp); 63 64 void set_hdr_multiplier(struct pipe_ctx *pipe_ctx); 65 66 void dcn10_get_surface_visual_confirm_color( 67 const struct pipe_ctx *pipe_ctx, 68 struct tg_color *color); 69 70 void dcn10_get_hdr_visual_confirm_color( 71 struct pipe_ctx *pipe_ctx, 72 struct tg_color *color); 73 74 bool dcn10_did_underflow_occur(struct dc *dc, struct pipe_ctx *pipe_ctx); 75 76 void update_dchubp_dpp( 77 struct dc *dc, 78 struct pipe_ctx *pipe_ctx, 79 struct dc_state *context); 80 81 struct pipe_ctx *find_top_pipe_for_stream( 82 struct dc *dc, 83 struct dc_state *context, 84 const struct dc_stream_state *stream); 85 86 int get_vupdate_offset_from_vsync(struct pipe_ctx *pipe_ctx); 87 88 void dcn10_build_prescale_params(struct dc_bias_and_scale *bias_and_scale, 89 const struct dc_plane_state *plane_state); 90 void lock_all_pipes(struct dc *dc, 91 struct dc_state *context, 92 bool lock); 93 94 #endif /* __DC_HWSS_DCN10_H__ */ 95
