1AMD64 specific boot options
2
3There are many others (usually documented in driver documentation), but
4only the AMD64 specific ones are listed here.
5
6Machine check
7
8   Please see Documentation/x86/x86_64/machinecheck for sysfs runtime tunables.
9
10   mce=off
11		Disable machine check
12   mce=no_cmci
13		Disable CMCI(Corrected Machine Check Interrupt) that
14		Intel processor supports.  Usually this disablement is
15		not recommended, but it might be handy if your hardware
16		is misbehaving.
17		Note that you'll get more problems without CMCI than with
18		due to the shared banks, i.e. you might get duplicated
19		error logs.
20   mce=dont_log_ce
21		Don't make logs for corrected errors.  All events reported
22		as corrected are silently cleared by OS.
23		This option will be useful if you have no interest in any
24		of corrected errors.
25   mce=ignore_ce
26		Disable features for corrected errors, e.g. polling timer
27		and CMCI.  All events reported as corrected are not cleared
28		by OS and remained in its error banks.
29		Usually this disablement is not recommended, however if
30		there is an agent checking/clearing corrected errors
31		(e.g. BIOS or hardware monitoring applications), conflicting
32		with OS's error handling, and you cannot deactivate the agent,
33		then this option will be a help.
34   mce=no_lmce
35		Do not opt-in to Local MCE delivery. Use legacy method
36		to broadcast MCEs.
37   mce=bootlog
38		Enable logging of machine checks left over from booting.
39		Disabled by default on AMD Fam10h and older because some BIOS
40		leave bogus ones.
41		If your BIOS doesn't do that it's a good idea to enable though
42		to make sure you log even machine check events that result
43		in a reboot. On Intel systems it is enabled by default.
44   mce=nobootlog
45		Disable boot machine check logging.
46   mce=tolerancelevel[,monarchtimeout] (number,number)
47		tolerance levels:
48		0: always panic on uncorrected errors, log corrected errors
49		1: panic or SIGBUS on uncorrected errors, log corrected errors
50		2: SIGBUS or log uncorrected errors, log corrected errors
51		3: never panic or SIGBUS, log all errors (for testing only)
52		Default is 1
53		Can be also set using sysfs which is preferable.
54		monarchtimeout:
55		Sets the time in us to wait for other CPUs on machine checks. 0
56		to disable.
57   mce=bios_cmci_threshold
58		Don't overwrite the bios-set CMCI threshold. This boot option
59		prevents Linux from overwriting the CMCI threshold set by the
60		bios. Without this option, Linux always sets the CMCI
61		threshold to 1. Enabling this may make memory predictive failure
62		analysis less effective if the bios sets thresholds for memory
63		errors since we will not see details for all errors.
64   mce=recovery
65		Force-enable recoverable machine check code paths
66
67   nomce (for compatibility with i386): same as mce=off
68
69   Everything else is in sysfs now.
70
71APICs
72
73   apic		 Use IO-APIC. Default
74
75   noapic	 Don't use the IO-APIC.
76
77   disableapic	 Don't use the local APIC
78
79   nolapic	 Don't use the local APIC (alias for i386 compatibility)
80
81   pirq=...	 See Documentation/x86/i386/IO-APIC.txt
82
83   noapictimer	 Don't set up the APIC timer
84
85   no_timer_check Don't check the IO-APIC timer. This can work around
86		 problems with incorrect timer initialization on some boards.
87   apicpmtimer
88		 Do APIC timer calibration using the pmtimer. Implies
89		 apicmaintimer. Useful when your PIT timer is totally
90		 broken.
91
92Timing
93
94  notsc
95  Deprecated, use tsc=unstable instead.
96
97  nohpet
98  Don't use the HPET timer.
99
100Idle loop
101
102  idle=poll
103  Don't do power saving in the idle loop using HLT, but poll for rescheduling
104  event. This will make the CPUs eat a lot more power, but may be useful
105  to get slightly better performance in multiprocessor benchmarks. It also
106  makes some profiling using performance counters more accurate.
107  Please note that on systems with MONITOR/MWAIT support (like Intel EM64T
108  CPUs) this option has no performance advantage over the normal idle loop.
109  It may also interact badly with hyperthreading.
110
111Rebooting
112
113   reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] [, [w]arm | [c]old]
114   bios	  Use the CPU reboot vector for warm reset
115   warm   Don't set the cold reboot flag
116   cold   Set the cold reboot flag
117   triple Force a triple fault (init)
118   kbd    Use the keyboard controller. cold reset (default)
119   acpi   Use the ACPI RESET_REG in the FADT. If ACPI is not configured or the
120          ACPI reset does not work, the reboot path attempts the reset using
121          the keyboard controller.
122   efi    Use efi reset_system runtime service. If EFI is not configured or the
123          EFI reset does not work, the reboot path attempts the reset using
124          the keyboard controller.
125
126   Using warm reset will be much faster especially on big memory
127   systems because the BIOS will not go through the memory check.
128   Disadvantage is that not all hardware will be completely reinitialized
129   on reboot so there may be boot problems on some systems.
130
131   reboot=force
132
133   Don't stop other CPUs on reboot. This can make reboot more reliable
134   in some cases.
135
136Non Executable Mappings
137
138  noexec=on|off
139
140  on      Enable(default)
141  off     Disable
142
143NUMA
144
145  numa=off	Only set up a single NUMA node spanning all memory.
146
147  numa=noacpi   Don't parse the SRAT table for NUMA setup
148
149  numa=fake=<size>[MG]
150		If given as a memory unit, fills all system RAM with nodes of
151		size interleaved over physical nodes.
152
153  numa=fake=<N>
154		If given as an integer, fills all system RAM with N fake nodes
155		interleaved over physical nodes.
156
157  numa=fake=<N>U
158		If given as an integer followed by 'U', it will divide each
159		physical node into N emulated nodes.
160
161ACPI
162
163  acpi=off	Don't enable ACPI
164  acpi=ht	Use ACPI boot table parsing, but don't enable ACPI
165		interpreter
166  acpi=force	Force ACPI on (currently not needed)
167
168  acpi=strict   Disable out of spec ACPI workarounds.
169
170  acpi_sci={edge,level,high,low}  Set up ACPI SCI interrupt.
171
172  acpi=noirq	Don't route interrupts
173
174  acpi=nocmcff	Disable firmware first mode for corrected errors. This
175		disables parsing the HEST CMC error source to check if
176		firmware has set the FF flag. This may result in
177		duplicate corrected error reports.
178
179PCI
180
181  pci=off		Don't use PCI
182  pci=conf1		Use conf1 access.
183  pci=conf2		Use conf2 access.
184  pci=rom		Assign ROMs.
185  pci=assign-busses	Assign busses
186  pci=irqmask=MASK	Set PCI interrupt mask to MASK
187  pci=lastbus=NUMBER	Scan up to NUMBER busses, no matter what the mptable says.
188  pci=noacpi		Don't use ACPI to set up PCI interrupt routing.
189
190IOMMU (input/output memory management unit)
191
192 Multiple x86-64 PCI-DMA mapping implementations exist, for example:
193
194   1. <lib/dma-direct.c>: use no hardware/software IOMMU at all
195      (e.g. because you have < 3 GB memory).
196      Kernel boot message: "PCI-DMA: Disabling IOMMU"
197
198   2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU.
199      Kernel boot message: "PCI-DMA: using GART IOMMU"
200
201   3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used
202      e.g. if there is no hardware IOMMU in the system and it is need because
203      you have >3GB memory or told the kernel to us it (iommu=soft))
204      Kernel boot message: "PCI-DMA: Using software bounce buffering
205      for IO (SWIOTLB)"
206
207   4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM
208      pSeries and xSeries servers. This hardware IOMMU supports DMA address
209      mapping with memory protection, etc.
210      Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
211
212 iommu=[<size>][,noagp][,off][,force][,noforce][,leak[=<nr_of_leak_pages>]
213	[,memaper[=<order>]][,merge][,fullflush][,nomerge]
214	[,noaperture][,calgary]
215
216  General iommu options:
217    off                Don't initialize and use any kind of IOMMU.
218    noforce            Don't force hardware IOMMU usage when it is not needed.
219                       (default).
220    force              Force the use of the hardware IOMMU even when it is
221                       not actually needed (e.g. because < 3 GB memory).
222    soft               Use software bounce buffering (SWIOTLB) (default for
223                       Intel machines). This can be used to prevent the usage
224                       of an available hardware IOMMU.
225
226  iommu options only relevant to the AMD GART hardware IOMMU:
227    <size>             Set the size of the remapping area in bytes.
228    allowed            Overwrite iommu off workarounds for specific chipsets.
229    fullflush          Flush IOMMU on each allocation (default).
230    nofullflush        Don't use IOMMU fullflush.
231    leak               Turn on simple iommu leak tracing (only when
232                       CONFIG_IOMMU_LEAK is on). Default number of leak pages
233                       is 20.
234    memaper[=<order>]  Allocate an own aperture over RAM with size 32MB<<order.
235                       (default: order=1, i.e. 64MB)
236    merge              Do scatter-gather (SG) merging. Implies "force"
237                       (experimental).
238    nomerge            Don't do scatter-gather (SG) merging.
239    noaperture         Ask the IOMMU not to touch the aperture for AGP.
240    noagp              Don't initialize the AGP driver and use full aperture.
241    panic              Always panic when IOMMU overflows.
242    calgary            Use the Calgary IOMMU if it is available
243
244  iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
245  implementation:
246    swiotlb=<pages>[,force]
247    <pages>            Prereserve that many 128K pages for the software IO
248                       bounce buffering.
249    force              Force all IO through the software TLB.
250
251  Settings for the IBM Calgary hardware IOMMU currently found in IBM
252  pSeries and xSeries machines:
253
254    calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
255    calgary=[translate_empty_slots]
256    calgary=[disable=<PCI bus number>]
257    panic              Always panic when IOMMU overflows
258
259    64k,...,8M - Set the size of each PCI slot's translation table
260    when using the Calgary IOMMU. This is the size of the translation
261    table itself in main memory. The smallest table, 64k, covers an IO
262    space of 32MB; the largest, 8MB table, can cover an IO space of
263    4GB. Normally the kernel will make the right choice by itself.
264
265    translate_empty_slots - Enable translation even on slots that have
266    no devices attached to them, in case a device will be hotplugged
267    in the future.
268
269    disable=<PCI bus number> - Disable translation on a given PHB. For
270    example, the built-in graphics adapter resides on the first bridge
271    (PCI bus number 0); if translation (isolation) is enabled on this
272    bridge, X servers that access the hardware directly from user
273    space might stop working. Use this option if you have devices that
274    are accessed from userspace directly on some PCI host bridge.
275
276Miscellaneous
277
278	nogbpages
279		Do not use GB pages for kernel direct mappings.
280	gbpages
281		Use GB pages for kernel direct mappings.
282