1 /*
2 * TI DaVinci EVM board support
3 *
4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 */
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/dma-mapping.h>
14 #include <linux/platform_device.h>
15 #include <linux/gpio.h>
16 #include <linux/gpio/machine.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_data/pcf857x.h>
19 #include <linux/platform_data/at24.h>
20 #include <linux/platform_data/gpio-davinci.h>
21 #include <linux/mtd/mtd.h>
22 #include <linux/mtd/rawnand.h>
23 #include <linux/mtd/partitions.h>
24 #include <linux/mtd/physmap.h>
25 #include <linux/phy.h>
26 #include <linux/clk.h>
27 #include <linux/videodev2.h>
28 #include <linux/v4l2-dv-timings.h>
29 #include <linux/export.h>
30 #include <linux/leds.h>
31
32 #include <media/i2c/tvp514x.h>
33
34 #include <asm/mach-types.h>
35 #include <asm/mach/arch.h>
36
37 #include <mach/common.h>
38 #include <linux/platform_data/i2c-davinci.h>
39 #include <mach/serial.h>
40 #include <mach/mux.h>
41 #include <linux/platform_data/mtd-davinci.h>
42 #include <linux/platform_data/mmc-davinci.h>
43 #include <linux/platform_data/usb-davinci.h>
44 #include <linux/platform_data/mtd-davinci-aemif.h>
45 #include <linux/platform_data/ti-aemif.h>
46
47 #include "davinci.h"
48
49 #define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
50 #define LXT971_PHY_ID (0x001378e2)
51 #define LXT971_PHY_MASK (0xfffffff0)
52
53 static struct mtd_partition davinci_evm_norflash_partitions[] = {
54 /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
55 {
56 .name = "bootloader",
57 .offset = 0,
58 .size = 5 * SZ_64K,
59 .mask_flags = MTD_WRITEABLE, /* force read-only */
60 },
61 /* bootloader params in the next 1 sectors */
62 {
63 .name = "params",
64 .offset = MTDPART_OFS_APPEND,
65 .size = SZ_64K,
66 .mask_flags = 0,
67 },
68 /* kernel */
69 {
70 .name = "kernel",
71 .offset = MTDPART_OFS_APPEND,
72 .size = SZ_2M,
73 .mask_flags = 0
74 },
75 /* file system */
76 {
77 .name = "filesystem",
78 .offset = MTDPART_OFS_APPEND,
79 .size = MTDPART_SIZ_FULL,
80 .mask_flags = 0
81 }
82 };
83
84 static struct physmap_flash_data davinci_evm_norflash_data = {
85 .width = 2,
86 .parts = davinci_evm_norflash_partitions,
87 .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
88 };
89
90 /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
91 * limits addresses to 16M, so using addresses past 16M will wrap */
92 static struct resource davinci_evm_norflash_resource = {
93 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
94 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
95 .flags = IORESOURCE_MEM,
96 };
97
98 static struct platform_device davinci_evm_norflash_device = {
99 .name = "physmap-flash",
100 .id = 0,
101 .dev = {
102 .platform_data = &davinci_evm_norflash_data,
103 },
104 .num_resources = 1,
105 .resource = &davinci_evm_norflash_resource,
106 };
107
108 /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
109 * It may used instead of the (default) NOR chip to boot, using TI's
110 * tools to install the secondary boot loader (UBL) and U-Boot.
111 */
112 static struct mtd_partition davinci_evm_nandflash_partition[] = {
113 /* Bootloader layout depends on whose u-boot is installed, but we
114 * can hide all the details.
115 * - block 0 for u-boot environment ... in mainline u-boot
116 * - block 1 for UBL (plus up to four backup copies in blocks 2..5)
117 * - blocks 6...? for u-boot
118 * - blocks 16..23 for u-boot environment ... in TI's u-boot
119 */
120 {
121 .name = "bootloader",
122 .offset = 0,
123 .size = SZ_256K + SZ_128K,
124 .mask_flags = MTD_WRITEABLE, /* force read-only */
125 },
126 /* Kernel */
127 {
128 .name = "kernel",
129 .offset = MTDPART_OFS_APPEND,
130 .size = SZ_4M,
131 .mask_flags = 0,
132 },
133 /* File system (older GIT kernels started this on the 5MB mark) */
134 {
135 .name = "filesystem",
136 .offset = MTDPART_OFS_APPEND,
137 .size = MTDPART_SIZ_FULL,
138 .mask_flags = 0,
139 }
140 /* A few blocks at end hold a flash BBT ... created by TI's CCS
141 * using flashwriter_nand.out, but ignored by TI's versions of
142 * Linux and u-boot. We boot faster by using them.
143 */
144 };
145
146 static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
147 .wsetup = 20,
148 .wstrobe = 40,
149 .whold = 20,
150 .rsetup = 10,
151 .rstrobe = 40,
152 .rhold = 10,
153 .ta = 40,
154 };
155
156 static struct davinci_nand_pdata davinci_evm_nandflash_data = {
157 .core_chipsel = 0,
158 .parts = davinci_evm_nandflash_partition,
159 .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
160 .ecc_mode = NAND_ECC_HW,
161 .ecc_bits = 1,
162 .bbt_options = NAND_BBT_USE_FLASH,
163 .timing = &davinci_evm_nandflash_timing,
164 };
165
166 static struct resource davinci_evm_nandflash_resource[] = {
167 {
168 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
169 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
170 .flags = IORESOURCE_MEM,
171 }, {
172 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
173 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
174 .flags = IORESOURCE_MEM,
175 },
176 };
177
178 static struct resource davinci_evm_aemif_resource[] = {
179 {
180 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
181 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
182 .flags = IORESOURCE_MEM,
183 },
184 };
185
186 static struct aemif_abus_data davinci_evm_aemif_abus_data[] = {
187 {
188 .cs = 1,
189 },
190 };
191
192 static struct platform_device davinci_evm_nandflash_devices[] = {
193 {
194 .name = "davinci_nand",
195 .id = 0,
196 .dev = {
197 .platform_data = &davinci_evm_nandflash_data,
198 },
199 .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
200 .resource = davinci_evm_nandflash_resource,
201 },
202 };
203
204 static struct aemif_platform_data davinci_evm_aemif_pdata = {
205 .abus_data = davinci_evm_aemif_abus_data,
206 .num_abus_data = ARRAY_SIZE(davinci_evm_aemif_abus_data),
207 .sub_devices = davinci_evm_nandflash_devices,
208 .num_sub_devices = ARRAY_SIZE(davinci_evm_nandflash_devices),
209 };
210
211 static struct platform_device davinci_evm_aemif_device = {
212 .name = "ti-aemif",
213 .id = -1,
214 .dev = {
215 .platform_data = &davinci_evm_aemif_pdata,
216 },
217 .resource = davinci_evm_aemif_resource,
218 .num_resources = ARRAY_SIZE(davinci_evm_aemif_resource),
219 };
220
221 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
222
223 static struct platform_device davinci_fb_device = {
224 .name = "davincifb",
225 .id = -1,
226 .dev = {
227 .dma_mask = &davinci_fb_dma_mask,
228 .coherent_dma_mask = DMA_BIT_MASK(32),
229 },
230 .num_resources = 0,
231 };
232
233 static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
234 .clk_polarity = 0,
235 .hs_polarity = 1,
236 .vs_polarity = 1
237 };
238
239 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
240 /* Inputs available at the TVP5146 */
241 static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
242 {
243 .index = 0,
244 .name = "Composite",
245 .type = V4L2_INPUT_TYPE_CAMERA,
246 .std = TVP514X_STD_ALL,
247 },
248 {
249 .index = 1,
250 .name = "S-Video",
251 .type = V4L2_INPUT_TYPE_CAMERA,
252 .std = TVP514X_STD_ALL,
253 },
254 };
255
256 /*
257 * this is the route info for connecting each input to decoder
258 * ouput that goes to vpfe. There is a one to one correspondence
259 * with tvp5146_inputs
260 */
261 static struct vpfe_route dm644xevm_tvp5146_routes[] = {
262 {
263 .input = INPUT_CVBS_VI2B,
264 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
265 },
266 {
267 .input = INPUT_SVIDEO_VI2C_VI1C,
268 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
269 },
270 };
271
272 static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
273 {
274 .name = "tvp5146",
275 .grp_id = 0,
276 .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
277 .inputs = dm644xevm_tvp5146_inputs,
278 .routes = dm644xevm_tvp5146_routes,
279 .can_route = 1,
280 .ccdc_if_params = {
281 .if_type = VPFE_BT656,
282 .hdpol = VPFE_PINPOL_POSITIVE,
283 .vdpol = VPFE_PINPOL_POSITIVE,
284 },
285 .board_info = {
286 I2C_BOARD_INFO("tvp5146", 0x5d),
287 .platform_data = &dm644xevm_tvp5146_pdata,
288 },
289 },
290 };
291
292 static struct vpfe_config dm644xevm_capture_cfg = {
293 .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
294 .i2c_adapter_id = 1,
295 .sub_devs = dm644xevm_vpfe_sub_devs,
296 .card_name = "DM6446 EVM",
297 .ccdc = "DM6446 CCDC",
298 };
299
300 static struct platform_device rtc_dev = {
301 .name = "rtc_davinci_evm",
302 .id = -1,
303 };
304
305 /*----------------------------------------------------------------------*/
306 #ifdef CONFIG_I2C
307 /*
308 * I2C GPIO expanders
309 */
310
311 #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
312
313
314 /* U2 -- LEDs */
315
316 static struct gpio_led evm_leds[] = {
317 { .name = "DS8", .active_low = 1,
318 .default_trigger = "heartbeat", },
319 { .name = "DS7", .active_low = 1, },
320 { .name = "DS6", .active_low = 1, },
321 { .name = "DS5", .active_low = 1, },
322 { .name = "DS4", .active_low = 1, },
323 { .name = "DS3", .active_low = 1, },
324 { .name = "DS2", .active_low = 1,
325 .default_trigger = "mmc0", },
326 { .name = "DS1", .active_low = 1,
327 .default_trigger = "disk-activity", },
328 };
329
330 static const struct gpio_led_platform_data evm_led_data = {
331 .num_leds = ARRAY_SIZE(evm_leds),
332 .leds = evm_leds,
333 };
334
335 static struct platform_device *evm_led_dev;
336
337 static int
evm_led_setup(struct i2c_client * client,int gpio,unsigned ngpio,void * c)338 evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
339 {
340 struct gpio_led *leds = evm_leds;
341 int status;
342
343 while (ngpio--) {
344 leds->gpio = gpio++;
345 leds++;
346 }
347
348 /* what an extremely annoying way to be forced to handle
349 * device unregistration ...
350 */
351 evm_led_dev = platform_device_alloc("leds-gpio", 0);
352 platform_device_add_data(evm_led_dev,
353 &evm_led_data, sizeof evm_led_data);
354
355 evm_led_dev->dev.parent = &client->dev;
356 status = platform_device_add(evm_led_dev);
357 if (status < 0) {
358 platform_device_put(evm_led_dev);
359 evm_led_dev = NULL;
360 }
361 return status;
362 }
363
364 static int
evm_led_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)365 evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
366 {
367 if (evm_led_dev) {
368 platform_device_unregister(evm_led_dev);
369 evm_led_dev = NULL;
370 }
371 return 0;
372 }
373
374 static struct pcf857x_platform_data pcf_data_u2 = {
375 .gpio_base = PCF_Uxx_BASE(0),
376 .setup = evm_led_setup,
377 .teardown = evm_led_teardown,
378 };
379
380
381 /* U18 - A/V clock generator and user switch */
382
383 static int sw_gpio;
384
385 static ssize_t
sw_show(struct device * d,struct device_attribute * a,char * buf)386 sw_show(struct device *d, struct device_attribute *a, char *buf)
387 {
388 char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
389
390 strcpy(buf, s);
391 return strlen(s);
392 }
393
394 static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
395
396 static int
evm_u18_setup(struct i2c_client * client,int gpio,unsigned ngpio,void * c)397 evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
398 {
399 int status;
400
401 /* export dip switch option */
402 sw_gpio = gpio + 7;
403 status = gpio_request(sw_gpio, "user_sw");
404 if (status == 0)
405 status = gpio_direction_input(sw_gpio);
406 if (status == 0)
407 status = device_create_file(&client->dev, &dev_attr_user_sw);
408 else
409 gpio_free(sw_gpio);
410 if (status != 0)
411 sw_gpio = -EINVAL;
412
413 /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
414 gpio_request(gpio + 3, "pll_fs2");
415 gpio_direction_output(gpio + 3, 0);
416
417 gpio_request(gpio + 2, "pll_fs1");
418 gpio_direction_output(gpio + 2, 0);
419
420 gpio_request(gpio + 1, "pll_sr");
421 gpio_direction_output(gpio + 1, 0);
422
423 return 0;
424 }
425
426 static int
evm_u18_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)427 evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
428 {
429 gpio_free(gpio + 1);
430 gpio_free(gpio + 2);
431 gpio_free(gpio + 3);
432
433 if (sw_gpio > 0) {
434 device_remove_file(&client->dev, &dev_attr_user_sw);
435 gpio_free(sw_gpio);
436 }
437 return 0;
438 }
439
440 static struct pcf857x_platform_data pcf_data_u18 = {
441 .gpio_base = PCF_Uxx_BASE(1),
442 .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
443 .setup = evm_u18_setup,
444 .teardown = evm_u18_teardown,
445 };
446
447
448 /* U35 - various I/O signals used to manage USB, CF, ATA, etc */
449
450 static int
evm_u35_setup(struct i2c_client * client,int gpio,unsigned ngpio,void * c)451 evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
452 {
453 /* p0 = nDRV_VBUS (initial: don't supply it) */
454 gpio_request(gpio + 0, "nDRV_VBUS");
455 gpio_direction_output(gpio + 0, 1);
456
457 /* p1 = VDDIMX_EN */
458 gpio_request(gpio + 1, "VDDIMX_EN");
459 gpio_direction_output(gpio + 1, 1);
460
461 /* p2 = VLYNQ_EN */
462 gpio_request(gpio + 2, "VLYNQ_EN");
463 gpio_direction_output(gpio + 2, 1);
464
465 /* p3 = n3V3_CF_RESET (initial: stay in reset) */
466 gpio_request(gpio + 3, "nCF_RESET");
467 gpio_direction_output(gpio + 3, 0);
468
469 /* (p4 unused) */
470
471 /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
472 gpio_request(gpio + 5, "WLAN_RESET");
473 gpio_direction_output(gpio + 5, 1);
474
475 /* p6 = nATA_SEL (initial: select) */
476 gpio_request(gpio + 6, "nATA_SEL");
477 gpio_direction_output(gpio + 6, 0);
478
479 /* p7 = nCF_SEL (initial: deselect) */
480 gpio_request(gpio + 7, "nCF_SEL");
481 gpio_direction_output(gpio + 7, 1);
482
483 return 0;
484 }
485
486 static int
evm_u35_teardown(struct i2c_client * client,int gpio,unsigned ngpio,void * c)487 evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
488 {
489 gpio_free(gpio + 7);
490 gpio_free(gpio + 6);
491 gpio_free(gpio + 5);
492 gpio_free(gpio + 3);
493 gpio_free(gpio + 2);
494 gpio_free(gpio + 1);
495 gpio_free(gpio + 0);
496 return 0;
497 }
498
499 static struct pcf857x_platform_data pcf_data_u35 = {
500 .gpio_base = PCF_Uxx_BASE(2),
501 .setup = evm_u35_setup,
502 .teardown = evm_u35_teardown,
503 };
504
505 /*----------------------------------------------------------------------*/
506
507 /* Most of this EEPROM is unused, but U-Boot uses some data:
508 * - 0x7f00, 6 bytes Ethernet Address
509 * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
510 * - ... newer boards may have more
511 */
512
513 static struct at24_platform_data eeprom_info = {
514 .byte_len = (256*1024) / 8,
515 .page_size = 64,
516 .flags = AT24_FLAG_ADDR16,
517 .setup = davinci_get_mac_addr,
518 .context = (void *)0x7f00,
519 };
520
521 /*
522 * MSP430 supports RTC, card detection, input from IR remote, and
523 * a bit more. It triggers interrupts on GPIO(7) from pressing
524 * buttons on the IR remote, and for card detect switches.
525 */
526 static struct i2c_client *dm6446evm_msp;
527
dm6446evm_msp_probe(struct i2c_client * client,const struct i2c_device_id * id)528 static int dm6446evm_msp_probe(struct i2c_client *client,
529 const struct i2c_device_id *id)
530 {
531 dm6446evm_msp = client;
532 return 0;
533 }
534
dm6446evm_msp_remove(struct i2c_client * client)535 static int dm6446evm_msp_remove(struct i2c_client *client)
536 {
537 dm6446evm_msp = NULL;
538 return 0;
539 }
540
541 static const struct i2c_device_id dm6446evm_msp_ids[] = {
542 { "dm6446evm_msp", 0, },
543 { /* end of list */ },
544 };
545
546 static struct i2c_driver dm6446evm_msp_driver = {
547 .driver.name = "dm6446evm_msp",
548 .id_table = dm6446evm_msp_ids,
549 .probe = dm6446evm_msp_probe,
550 .remove = dm6446evm_msp_remove,
551 };
552
dm6444evm_msp430_get_pins(void)553 static int dm6444evm_msp430_get_pins(void)
554 {
555 static const char txbuf[2] = { 2, 4, };
556 char buf[4];
557 struct i2c_msg msg[2] = {
558 {
559 .flags = 0,
560 .len = 2,
561 .buf = (void __force *)txbuf,
562 },
563 {
564 .flags = I2C_M_RD,
565 .len = 4,
566 .buf = buf,
567 },
568 };
569 int status;
570
571 if (!dm6446evm_msp)
572 return -ENXIO;
573
574 msg[0].addr = dm6446evm_msp->addr;
575 msg[1].addr = dm6446evm_msp->addr;
576
577 /* Command 4 == get input state, returns port 2 and port3 data
578 * S Addr W [A] len=2 [A] cmd=4 [A]
579 * RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
580 */
581 status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
582 if (status < 0)
583 return status;
584
585 dev_dbg(&dm6446evm_msp->dev, "PINS: %4ph\n", buf);
586
587 return (buf[3] << 8) | buf[2];
588 }
589
dm6444evm_mmc_get_cd(int module)590 static int dm6444evm_mmc_get_cd(int module)
591 {
592 int status = dm6444evm_msp430_get_pins();
593
594 return (status < 0) ? status : !(status & BIT(1));
595 }
596
dm6444evm_mmc_get_ro(int module)597 static int dm6444evm_mmc_get_ro(int module)
598 {
599 int status = dm6444evm_msp430_get_pins();
600
601 return (status < 0) ? status : status & BIT(6 + 8);
602 }
603
604 static struct davinci_mmc_config dm6446evm_mmc_config = {
605 .get_cd = dm6444evm_mmc_get_cd,
606 .get_ro = dm6444evm_mmc_get_ro,
607 .wires = 4,
608 };
609
610 static struct i2c_board_info __initdata i2c_info[] = {
611 {
612 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
613 },
614 {
615 I2C_BOARD_INFO("pcf8574", 0x38),
616 .platform_data = &pcf_data_u2,
617 },
618 {
619 I2C_BOARD_INFO("pcf8574", 0x39),
620 .platform_data = &pcf_data_u18,
621 },
622 {
623 I2C_BOARD_INFO("pcf8574", 0x3a),
624 .platform_data = &pcf_data_u35,
625 },
626 {
627 I2C_BOARD_INFO("24c256", 0x50),
628 .platform_data = &eeprom_info,
629 },
630 {
631 I2C_BOARD_INFO("tlv320aic33", 0x1b),
632 },
633 };
634
635 #define DM644X_I2C_SDA_PIN GPIO_TO_PIN(2, 12)
636 #define DM644X_I2C_SCL_PIN GPIO_TO_PIN(2, 11)
637
638 static struct gpiod_lookup_table i2c_recovery_gpiod_table = {
639 .dev_id = "i2c_davinci.1",
640 .table = {
641 GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SDA_PIN, "sda",
642 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
643 GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SCL_PIN, "scl",
644 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
645 },
646 };
647
648 /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
649 * which requires 100 usec of idle bus after i2c writes sent to it.
650 */
651 static struct davinci_i2c_platform_data i2c_pdata = {
652 .bus_freq = 20 /* kHz */,
653 .bus_delay = 100 /* usec */,
654 .gpio_recovery = true,
655 };
656
evm_init_i2c(void)657 static void __init evm_init_i2c(void)
658 {
659 gpiod_add_lookup_table(&i2c_recovery_gpiod_table);
660 davinci_init_i2c(&i2c_pdata);
661 i2c_add_driver(&dm6446evm_msp_driver);
662 i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
663 }
664 #endif
665
666 #define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
667
668 /* venc standard timings */
669 static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
670 {
671 .name = "ntsc",
672 .timings_type = VPBE_ENC_STD,
673 .std_id = V4L2_STD_NTSC,
674 .interlaced = 1,
675 .xres = 720,
676 .yres = 480,
677 .aspect = {11, 10},
678 .fps = {30000, 1001},
679 .left_margin = 0x79,
680 .upper_margin = 0x10,
681 },
682 {
683 .name = "pal",
684 .timings_type = VPBE_ENC_STD,
685 .std_id = V4L2_STD_PAL,
686 .interlaced = 1,
687 .xres = 720,
688 .yres = 576,
689 .aspect = {54, 59},
690 .fps = {25, 1},
691 .left_margin = 0x7e,
692 .upper_margin = 0x16,
693 },
694 };
695
696 /* venc dv preset timings */
697 static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
698 {
699 .name = "480p59_94",
700 .timings_type = VPBE_ENC_DV_TIMINGS,
701 .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
702 .interlaced = 0,
703 .xres = 720,
704 .yres = 480,
705 .aspect = {1, 1},
706 .fps = {5994, 100},
707 .left_margin = 0x80,
708 .upper_margin = 0x20,
709 },
710 {
711 .name = "576p50",
712 .timings_type = VPBE_ENC_DV_TIMINGS,
713 .dv_timings = V4L2_DV_BT_CEA_720X576P50,
714 .interlaced = 0,
715 .xres = 720,
716 .yres = 576,
717 .aspect = {1, 1},
718 .fps = {50, 1},
719 .left_margin = 0x7e,
720 .upper_margin = 0x30,
721 },
722 };
723
724 /*
725 * The outputs available from VPBE + encoders. Keep the order same
726 * as that of encoders. First those from venc followed by that from
727 * encoders. Index in the output refers to index on a particular encoder.
728 * Driver uses this index to pass it to encoder when it supports more
729 * than one output. Userspace applications use index of the array to
730 * set an output.
731 */
732 static struct vpbe_output dm644xevm_vpbe_outputs[] = {
733 {
734 .output = {
735 .index = 0,
736 .name = "Composite",
737 .type = V4L2_OUTPUT_TYPE_ANALOG,
738 .std = VENC_STD_ALL,
739 .capabilities = V4L2_OUT_CAP_STD,
740 },
741 .subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
742 .default_mode = "ntsc",
743 .num_modes = ARRAY_SIZE(dm644xevm_enc_std_timing),
744 .modes = dm644xevm_enc_std_timing,
745 },
746 {
747 .output = {
748 .index = 1,
749 .name = "Component",
750 .type = V4L2_OUTPUT_TYPE_ANALOG,
751 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
752 },
753 .subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
754 .default_mode = "480p59_94",
755 .num_modes = ARRAY_SIZE(dm644xevm_enc_preset_timing),
756 .modes = dm644xevm_enc_preset_timing,
757 },
758 };
759
760 static struct vpbe_config dm644xevm_display_cfg = {
761 .module_name = "dm644x-vpbe-display",
762 .i2c_adapter_id = 1,
763 .osd = {
764 .module_name = DM644X_VPBE_OSD_SUBDEV_NAME,
765 },
766 .venc = {
767 .module_name = DM644X_VPBE_VENC_SUBDEV_NAME,
768 },
769 .num_outputs = ARRAY_SIZE(dm644xevm_vpbe_outputs),
770 .outputs = dm644xevm_vpbe_outputs,
771 };
772
773 static struct platform_device *davinci_evm_devices[] __initdata = {
774 &davinci_fb_device,
775 &rtc_dev,
776 };
777
778 static void __init
davinci_evm_map_io(void)779 davinci_evm_map_io(void)
780 {
781 dm644x_init();
782 }
783
davinci_phy_fixup(struct phy_device * phydev)784 static int davinci_phy_fixup(struct phy_device *phydev)
785 {
786 unsigned int control;
787 /* CRITICAL: Fix for increasing PHY signal drive strength for
788 * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
789 * signal strength was low causing TX to fail randomly. The
790 * fix is to Set bit 11 (Increased MII drive strength) of PHY
791 * register 26 (Digital Config register) on this phy. */
792 control = phy_read(phydev, 26);
793 phy_write(phydev, 26, (control | 0x800));
794 return 0;
795 }
796
797 #define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
798 IS_ENABLED(CONFIG_PATA_BK3710))
799
800 #define HAS_NOR IS_ENABLED(CONFIG_MTD_PHYSMAP)
801
802 #define HAS_NAND IS_ENABLED(CONFIG_MTD_NAND_DAVINCI)
803
davinci_evm_init(void)804 static __init void davinci_evm_init(void)
805 {
806 int ret;
807 struct clk *aemif_clk;
808 struct davinci_soc_info *soc_info = &davinci_soc_info;
809
810 dm644x_register_clocks();
811
812 dm644x_init_devices();
813
814 ret = dm644x_gpio_register();
815 if (ret)
816 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
817
818 aemif_clk = clk_get(NULL, "aemif");
819 clk_prepare_enable(aemif_clk);
820
821 if (HAS_ATA) {
822 if (HAS_NAND || HAS_NOR)
823 pr_warn("WARNING: both IDE and Flash are enabled, but they share AEMIF pins\n"
824 "\tDisable IDE for NAND/NOR support\n");
825 davinci_init_ide();
826 } else if (HAS_NAND || HAS_NOR) {
827 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
828 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
829
830 /* only one device will be jumpered and detected */
831 if (HAS_NAND) {
832 platform_device_register(&davinci_evm_aemif_device);
833 #ifdef CONFIG_I2C
834 evm_leds[7].default_trigger = "nand-disk";
835 #endif
836 if (HAS_NOR)
837 pr_warn("WARNING: both NAND and NOR flash are enabled; disable one of them.\n");
838 } else if (HAS_NOR)
839 platform_device_register(&davinci_evm_norflash_device);
840 }
841
842 platform_add_devices(davinci_evm_devices,
843 ARRAY_SIZE(davinci_evm_devices));
844 #ifdef CONFIG_I2C
845 evm_init_i2c();
846 davinci_setup_mmc(0, &dm6446evm_mmc_config);
847 #endif
848 dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
849
850 davinci_serial_init(dm644x_serial_device);
851 dm644x_init_asp();
852
853 /* irlml6401 switches over 1A, in under 8 msec */
854 davinci_setup_usb(1000, 8);
855
856 if (IS_BUILTIN(CONFIG_PHYLIB)) {
857 soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
858 /* Register the fixup for PHY on DaVinci */
859 phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
860 davinci_phy_fixup);
861 }
862 }
863
864 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
865 /* Maintainer: MontaVista Software <source@mvista.com> */
866 .atag_offset = 0x100,
867 .map_io = davinci_evm_map_io,
868 .init_irq = davinci_irq_init,
869 .init_time = dm644x_init_time,
870 .init_machine = davinci_evm_init,
871 .init_late = davinci_init_late,
872 .dma_zone_size = SZ_128M,
873 MACHINE_END
874
