1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC
4 *
5 *  Copyright (C) 2014 Microchip
6 *  Alexandre Belloni <alexandre.belloni@free-electrons.com>
7 */
8
9#include <dt-bindings/pinctrl/at91.h>
10#include <dt-bindings/clock/at91.h>
11#include <dt-bindings/interrupt-controller/irq.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/pwm/pwm.h>
14
15/ {
16	#address-cells = <1>;
17	#size-cells = <1>;
18	model = "Atmel AT91SAM9RL family SoC";
19	compatible = "atmel,at91sam9rl", "atmel,at91sam9";
20	interrupt-parent = <&aic>;
21
22	aliases {
23		serial0 = &dbgu;
24		serial1 = &usart0;
25		serial2 = &usart1;
26		serial3 = &usart2;
27		serial4 = &usart3;
28		gpio0 = &pioA;
29		gpio1 = &pioB;
30		gpio2 = &pioC;
31		gpio3 = &pioD;
32		tcb0 = &tcb0;
33		i2c0 = &i2c0;
34		i2c1 = &i2c1;
35		ssc0 = &ssc0;
36		ssc1 = &ssc1;
37		pwm0 = &pwm0;
38	};
39
40	cpus {
41		#address-cells = <1>;
42		#size-cells = <0>;
43
44		cpu@0 {
45			compatible = "arm,arm926ej-s";
46			device_type = "cpu";
47			reg = <0>;
48		};
49	};
50
51	memory@20000000 {
52		device_type = "memory";
53		reg = <0x20000000 0x04000000>;
54	};
55
56	clocks {
57		slow_xtal: slow_xtal {
58			compatible = "fixed-clock";
59			#clock-cells = <0>;
60			clock-frequency = <0>;
61		};
62
63		main_xtal: main_xtal {
64			compatible = "fixed-clock";
65			#clock-cells = <0>;
66			clock-frequency = <0>;
67		};
68
69		adc_op_clk: adc_op_clk{
70			compatible = "fixed-clock";
71			#clock-cells = <0>;
72			clock-frequency = <1000000>;
73		};
74	};
75
76	sram: sram@300000 {
77		compatible = "mmio-sram";
78		reg = <0x00300000 0x10000>;
79		#address-cells = <1>;
80		#size-cells = <1>;
81		ranges = <0 0x00300000 0x10000>;
82	};
83
84	ahb {
85		compatible = "simple-bus";
86		#address-cells = <1>;
87		#size-cells = <1>;
88		ranges;
89
90		fb0: fb@500000 {
91			compatible = "atmel,at91sam9rl-lcdc";
92			reg = <0x00500000 0x1000>;
93			interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;
94			pinctrl-names = "default";
95			pinctrl-0 = <&pinctrl_fb>;
96			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_PERIPHERAL 23>;
97			clock-names = "hclk", "lcdc_clk";
98			status = "disabled";
99		};
100
101		ebi: ebi@10000000 {
102			compatible = "atmel,at91sam9rl-ebi";
103			#address-cells = <2>;
104			#size-cells = <1>;
105			atmel,smc = <&smc>;
106			atmel,matrix = <&matrix>;
107			reg = <0x10000000 0x80000000>;
108			ranges = <0x0 0x0 0x10000000 0x10000000
109				  0x1 0x0 0x20000000 0x10000000
110				  0x2 0x0 0x30000000 0x10000000
111				  0x3 0x0 0x40000000 0x10000000
112				  0x4 0x0 0x50000000 0x10000000
113				  0x5 0x0 0x60000000 0x10000000>;
114			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
115			status = "disabled";
116
117			nand_controller: nand-controller {
118				compatible = "atmel,at91sam9g45-nand-controller";
119				#address-cells = <2>;
120				#size-cells = <1>;
121				ranges;
122				status = "disabled";
123			};
124		};
125
126		apb {
127			compatible = "simple-bus";
128			#address-cells = <1>;
129			#size-cells = <1>;
130			ranges;
131
132			tcb0: timer@fffa0000 {
133				compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
134				#address-cells = <1>;
135				#size-cells = <0>;
136				reg = <0xfffa0000 0x100>;
137				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>,
138					     <17 IRQ_TYPE_LEVEL_HIGH 0>,
139					     <18 IRQ_TYPE_LEVEL_HIGH 0>;
140				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>, <&pmc PMC_TYPE_PERIPHERAL 17>, <&pmc PMC_TYPE_PERIPHERAL 18>, <&clk32k>;
141				clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk";
142			};
143
144			mmc0: mmc@fffa4000 {
145				compatible = "atmel,hsmci";
146				reg = <0xfffa4000 0x600>;
147				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
148				#address-cells = <1>;
149				#size-cells = <0>;
150				pinctrl-names = "default";
151				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
152				clock-names = "mci_clk";
153				status = "disabled";
154			};
155
156			i2c0: i2c@fffa8000 {
157				compatible = "atmel,at91sam9260-i2c";
158				reg = <0xfffa8000 0x100>;
159				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
160				#address-cells = <1>;
161				#size-cells = <0>;
162				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
163				status = "disabled";
164			};
165
166			i2c1: i2c@fffac000 {
167				compatible = "atmel,at91sam9260-i2c";
168				reg = <0xfffac000 0x100>;
169				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
170				#address-cells = <1>;
171				#size-cells = <0>;
172				status = "disabled";
173			};
174
175			usart0: serial@fffb0000 {
176				compatible = "atmel,at91sam9260-usart";
177				reg = <0xfffb0000 0x200>;
178				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
179				atmel,use-dma-rx;
180				atmel,use-dma-tx;
181				pinctrl-names = "default";
182				pinctrl-0 = <&pinctrl_usart0>;
183				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
184				clock-names = "usart";
185				status = "disabled";
186			};
187
188			usart1: serial@fffb4000 {
189				compatible = "atmel,at91sam9260-usart";
190				reg = <0xfffb4000 0x200>;
191				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
192				atmel,use-dma-rx;
193				atmel,use-dma-tx;
194				pinctrl-names = "default";
195				pinctrl-0 = <&pinctrl_usart1>;
196				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
197				clock-names = "usart";
198				status = "disabled";
199			};
200
201			usart2: serial@fffb8000 {
202				compatible = "atmel,at91sam9260-usart";
203				reg = <0xfffb8000 0x200>;
204				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
205				atmel,use-dma-rx;
206				atmel,use-dma-tx;
207				pinctrl-names = "default";
208				pinctrl-0 = <&pinctrl_usart2>;
209				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
210				clock-names = "usart";
211				status = "disabled";
212			};
213
214			usart3: serial@fffbc000 {
215				compatible = "atmel,at91sam9260-usart";
216				reg = <0xfffbc000 0x200>;
217				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
218				atmel,use-dma-rx;
219				atmel,use-dma-tx;
220				pinctrl-names = "default";
221				pinctrl-0 = <&pinctrl_usart3>;
222				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
223				clock-names = "usart";
224				status = "disabled";
225			};
226
227			ssc0: ssc@fffc0000 {
228				compatible = "atmel,at91sam9rl-ssc";
229				reg = <0xfffc0000 0x4000>;
230				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
231				pinctrl-names = "default";
232				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
233				status = "disabled";
234			};
235
236			ssc1: ssc@fffc4000 {
237				compatible = "atmel,at91sam9rl-ssc";
238				reg = <0xfffc4000 0x4000>;
239				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
240				pinctrl-names = "default";
241				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
242				status = "disabled";
243			};
244
245			pwm0: pwm@fffc8000 {
246				compatible = "atmel,at91sam9rl-pwm";
247				reg = <0xfffc8000 0x300>;
248				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>;
249				#pwm-cells = <3>;
250				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
251				clock-names = "pwm_clk";
252				status = "disabled";
253			};
254
255			spi0: spi@fffcc000 {
256				#address-cells = <1>;
257				#size-cells = <0>;
258				compatible = "atmel,at91rm9200-spi";
259				reg = <0xfffcc000 0x200>;
260				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
261				pinctrl-names = "default";
262				pinctrl-0 = <&pinctrl_spi0>;
263				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
264				clock-names = "spi_clk";
265				status = "disabled";
266			};
267
268			adc0: adc@fffd0000 {
269				#address-cells = <1>;
270				#size-cells = <0>;
271				compatible = "atmel,at91sam9rl-adc";
272				reg = <0xfffd0000 0x100>;
273				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
274				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>, <&adc_op_clk>;
275				clock-names = "adc_clk", "adc_op_clk";
276				atmel,adc-use-external-triggers;
277				atmel,adc-channels-used = <0x3f>;
278				atmel,adc-vref = <3300>;
279				atmel,adc-startup-time = <40>;
280				atmel,adc-res = <8 10>;
281				atmel,adc-res-names = "lowres", "highres";
282				atmel,adc-use-res = "highres";
283
284				trigger0 {
285					trigger-name = "timer-counter-0";
286					trigger-value = <0x1>;
287				};
288				trigger1 {
289					trigger-name = "timer-counter-1";
290					trigger-value = <0x3>;
291				};
292
293				trigger2 {
294					trigger-name = "timer-counter-2";
295					trigger-value = <0x5>;
296				};
297
298				trigger3 {
299					trigger-name = "external";
300					trigger-value = <0x13>;
301					trigger-external;
302				};
303			};
304
305			usb0: gadget@fffd4000 {
306				compatible = "atmel,at91sam9rl-udc";
307				reg = <0x00600000 0x100000>,
308				      <0xfffd4000 0x4000>;
309				interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
310				clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
311				clock-names = "pclk", "hclk";
312				status = "disabled";
313			};
314
315			dma0: dma-controller@ffffe600 {
316				compatible = "atmel,at91sam9rl-dma";
317				reg = <0xffffe600 0x200>;
318				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
319				#dma-cells = <2>;
320				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
321				clock-names = "dma_clk";
322			};
323
324			ramc0: ramc@ffffea00 {
325				compatible = "atmel,at91sam9260-sdramc";
326				reg = <0xffffea00 0x200>;
327			};
328
329			smc: smc@ffffec00 {
330				compatible = "atmel,at91sam9260-smc", "syscon";
331				reg = <0xffffec00 0x200>;
332			};
333
334			matrix: matrix@ffffee00 {
335				compatible = "atmel,at91sam9rl-matrix", "syscon";
336				reg = <0xffffee00 0x200>;
337			};
338
339			aic: interrupt-controller@fffff000 {
340				#interrupt-cells = <3>;
341				compatible = "atmel,at91rm9200-aic";
342				interrupt-controller;
343				reg = <0xfffff000 0x200>;
344				atmel,external-irqs = <31>;
345			};
346
347			dbgu: serial@fffff200 {
348				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
349				reg = <0xfffff200 0x200>;
350				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
351				pinctrl-names = "default";
352				pinctrl-0 = <&pinctrl_dbgu>;
353				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
354				clock-names = "usart";
355				status = "disabled";
356			};
357
358			pinctrl@fffff400 {
359				#address-cells = <1>;
360				#size-cells = <1>;
361				compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
362				ranges = <0xfffff400 0xfffff400 0x800>;
363
364				atmel,mux-mask =
365					/*    A         B     */
366					<0xffffffff 0xe05c6738>,  /* pioA */
367					<0xffffffff 0x0000c780>,  /* pioB */
368					<0xffffffff 0xe3ffff0e>,  /* pioC */
369					<0x003fffff 0x0001ff3c>;  /* pioD */
370
371				/* shared pinctrl settings */
372				adc0 {
373					pinctrl_adc0_ts: adc0_ts-0 {
374						atmel,pins =
375							<AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>,
376							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>,
377							<AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>,
378							<AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
379					};
380
381					pinctrl_adc0_ad0: adc0_ad0-0 {
382						atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
383					};
384
385					pinctrl_adc0_ad1: adc0_ad1-0 {
386						atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
387					};
388
389					pinctrl_adc0_ad2: adc0_ad2-0 {
390						atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>;
391					};
392
393					pinctrl_adc0_ad3: adc0_ad3-0 {
394						atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>;
395					};
396
397					pinctrl_adc0_ad4: adc0_ad4-0 {
398						atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;
399					};
400
401					pinctrl_adc0_ad5: adc0_ad5-0 {
402						atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>;
403					};
404
405					pinctrl_adc0_adtrg: adc0_adtrg-0 {
406						atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
407					};
408				};
409
410				dbgu {
411					pinctrl_dbgu: dbgu-0 {
412						atmel,pins =
413							<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
414							<AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>;
415					};
416				};
417
418				ebi {
419					pinctrl_ebi_addr_nand: ebi-addr-0 {
420						atmel,pins =
421							<AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>,
422							<AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;
423					};
424				};
425
426				fb {
427					pinctrl_fb: fb-0 {
428						atmel,pins =
429							<AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>,
430							<AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>,
431							<AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>,
432							<AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>,
433							<AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>,
434							<AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
435							<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
436							<AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>,
437							<AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>,
438							<AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
439							<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>,
440							<AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>,
441							<AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>,
442							<AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>,
443							<AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>,
444							<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>,
445							<AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>,
446							<AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>,
447							<AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>,
448							<AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>,
449							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>;
450					};
451				};
452
453				i2c_gpio0 {
454					pinctrl_i2c_gpio0: i2c_gpio0-0 {
455						atmel,pins =
456							<AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
457							<AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
458					};
459				};
460
461				i2c_gpio1 {
462					pinctrl_i2c_gpio1: i2c_gpio1-0 {
463						atmel,pins =
464							<AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>,
465							<AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
466					};
467				};
468
469				mmc0 {
470					pinctrl_mmc0_clk: mmc0_clk-0 {
471						atmel,pins =
472							<AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>;
473					};
474
475					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
476						atmel,pins =
477							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
478							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
479					};
480
481					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
482						atmel,pins =
483							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
484							<AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
485							<AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
486					};
487				};
488
489				nand {
490					pinctrl_nand_rb: nand-rb-0 {
491						atmel,pins =
492							<AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
493					};
494
495					pinctrl_nand_cs: nand-cs-0 {
496						atmel,pins =
497							<AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
498					};
499
500					pinctrl_nand_oe_we: nand-oe-we-0 {
501						atmel,pins =
502							<AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>,
503							<AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>;
504					};
505				};
506
507				pwm0 {
508					pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 {
509						atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
510					};
511
512					pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 {
513						atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
514					};
515
516					pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 {
517						atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
518					};
519
520					pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 {
521						atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
522					};
523
524					pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 {
525						atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
526					};
527
528					pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 {
529						atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
530					};
531
532					pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 {
533						atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
534					};
535
536					pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 {
537						atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;
538					};
539
540					pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 {
541						atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>;
542					};
543
544					pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 {
545						atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
546					};
547
548					pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 {
549						atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>;
550					};
551				};
552
553				spi0 {
554					pinctrl_spi0: spi0-0 {
555						atmel,pins =
556							<AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>,
557							<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>,
558							<AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;
559					};
560				};
561
562				ssc0 {
563					pinctrl_ssc0_tx: ssc0_tx-0 {
564						atmel,pins =
565							<AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>,
566							<AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>,
567							<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
568					};
569
570					pinctrl_ssc0_rx: ssc0_rx-0 {
571						atmel,pins =
572							<AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>,
573							<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>,
574							<AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;
575					};
576				};
577
578				ssc1 {
579					pinctrl_ssc1_tx: ssc1_tx-0 {
580						atmel,pins =
581							<AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>,
582							<AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>,
583							<AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
584					};
585
586					pinctrl_ssc1_rx: ssc1_rx-0 {
587						atmel,pins =
588							<AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>,
589							<AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>,
590							<AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>;
591					};
592				};
593
594				tcb0 {
595					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
596						atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
597					};
598
599					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
600						atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>;
601					};
602
603					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
604						atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>;
605					};
606
607					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
608						atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
609					};
610
611					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
612						atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>;
613					};
614
615					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
616						atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
617					};
618
619					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
620						atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;
621					};
622
623					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
624						atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>;
625					};
626
627					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
628						atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>;
629					};
630				};
631
632				usart0 {
633					pinctrl_usart0: usart0-0 {
634						atmel,pins =
635							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
636							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
637					};
638
639					pinctrl_usart0_rts: usart0_rts-0 {
640						atmel,pins =
641							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
642					};
643
644					pinctrl_usart0_cts: usart0_cts-0 {
645						atmel,pins =
646							<AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>;
647					};
648
649					pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
650						atmel,pins =
651							<AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>,
652							<AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
653					};
654
655					pinctrl_usart0_dcd: usart0_dcd-0 {
656						atmel,pins =
657							<AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>;
658					};
659
660					pinctrl_usart0_ri: usart0_ri-0 {
661						atmel,pins =
662							<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>;
663					};
664
665					pinctrl_usart0_sck: usart0_sck-0 {
666						atmel,pins =
667							<AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;
668					};
669				};
670
671				usart1 {
672					pinctrl_usart1: usart1-0 {
673						atmel,pins =
674							<AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
675							<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
676					};
677
678					pinctrl_usart1_rts: usart1_rts-0 {
679						atmel,pins =
680							<AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
681					};
682
683					pinctrl_usart1_cts: usart1_cts-0 {
684						atmel,pins =
685							<AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
686					};
687
688					pinctrl_usart1_sck: usart1_sck-0 {
689						atmel,pins =
690							<AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;
691					};
692				};
693
694				usart2 {
695					pinctrl_usart2: usart2-0 {
696						atmel,pins =
697							<AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
698							<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
699					};
700
701					pinctrl_usart2_rts: usart2_rts-0 {
702						atmel,pins =
703							<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;
704					};
705
706					pinctrl_usart2_cts: usart2_cts-0 {
707						atmel,pins =
708							<AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;
709					};
710
711					pinctrl_usart2_sck: usart2_sck-0 {
712						atmel,pins =
713							<AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>;
714					};
715				};
716
717				usart3 {
718					pinctrl_usart3: usart3-0 {
719						atmel,pins =
720							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>,
721							<AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
722					};
723
724					pinctrl_usart3_rts: usart3_rts-0 {
725						atmel,pins =
726							<AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>;
727					};
728
729					pinctrl_usart3_cts: usart3_cts-0 {
730						atmel,pins =
731							<AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>;
732					};
733
734					pinctrl_usart3_sck: usart3_sck-0 {
735						atmel,pins =
736							<AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
737					};
738				};
739
740				pioA: gpio@fffff400 {
741					compatible = "atmel,at91rm9200-gpio";
742					reg = <0xfffff400 0x200>;
743					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
744					#gpio-cells = <2>;
745					gpio-controller;
746					interrupt-controller;
747					#interrupt-cells = <2>;
748					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
749				};
750
751				pioB: gpio@fffff600 {
752					compatible = "atmel,at91rm9200-gpio";
753					reg = <0xfffff600 0x200>;
754					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
755					#gpio-cells = <2>;
756					gpio-controller;
757					interrupt-controller;
758					#interrupt-cells = <2>;
759					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
760				};
761
762				pioC: gpio@fffff800 {
763					compatible = "atmel,at91rm9200-gpio";
764					reg = <0xfffff800 0x200>;
765					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
766					#gpio-cells = <2>;
767					gpio-controller;
768					interrupt-controller;
769					#interrupt-cells = <2>;
770					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
771				};
772
773				pioD: gpio@fffffa00 {
774					compatible = "atmel,at91rm9200-gpio";
775					reg = <0xfffffa00 0x200>;
776					interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
777					#gpio-cells = <2>;
778					gpio-controller;
779					interrupt-controller;
780					#interrupt-cells = <2>;
781					clocks = <&pmc PMC_TYPE_PERIPHERAL 5>;
782				};
783			};
784
785			pmc: pmc@fffffc00 {
786				compatible = "atmel,at91sam9rl-pmc", "syscon";
787				reg = <0xfffffc00 0x100>;
788				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
789				#clock-cells = <2>;
790				clocks = <&clk32k>, <&main_xtal>;
791				clock-names = "slow_clk", "main_xtal";
792			};
793
794			rstc@fffffd00 {
795				compatible = "atmel,at91sam9260-rstc";
796				reg = <0xfffffd00 0x10>;
797				clocks = <&clk32k>;
798			};
799
800			shdwc@fffffd10 {
801				compatible = "atmel,at91sam9260-shdwc";
802				reg = <0xfffffd10 0x10>;
803				clocks = <&clk32k>;
804			};
805
806			pit: timer@fffffd30 {
807				compatible = "atmel,at91sam9260-pit";
808				reg = <0xfffffd30 0xf>;
809				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
810				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
811			};
812
813			watchdog@fffffd40 {
814				compatible = "atmel,at91sam9260-wdt";
815				reg = <0xfffffd40 0x10>;
816				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
817				clocks = <&clk32k>;
818				status = "disabled";
819			};
820
821			clk32k: sckc@fffffd50 {
822				compatible = "atmel,at91sam9x5-sckc";
823				reg = <0xfffffd50 0x4>;
824				clocks = <&slow_xtal>;
825				#clock-cells = <0>;
826			};
827
828			rtc@fffffd20 {
829				compatible = "atmel,at91sam9260-rtt";
830				reg = <0xfffffd20 0x10>;
831				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
832				clocks = <&clk32k>;
833				status = "disabled";
834			};
835
836			gpbr: syscon@fffffd60 {
837				compatible = "atmel,at91sam9260-gpbr", "syscon";
838				reg = <0xfffffd60 0x10>;
839				status = "disabled";
840			};
841
842			rtc@fffffe00 {
843				compatible = "atmel,at91rm9200-rtc";
844				reg = <0xfffffe00 0x40>;
845				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
846				clocks = <&clk32k>;
847				status = "disabled";
848			};
849
850		};
851	};
852
853	i2c-gpio-0 {
854		compatible = "i2c-gpio";
855		gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */
856			<&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */
857		i2c-gpio,sda-open-drain;
858		i2c-gpio,scl-open-drain;
859		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
860		#address-cells = <1>;
861		#size-cells = <0>;
862		pinctrl-names = "default";
863		pinctrl-0 = <&pinctrl_i2c_gpio0>;
864		status = "disabled";
865	};
866
867	i2c-gpio-1 {
868		compatible = "i2c-gpio";
869		gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */
870			<&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */
871		i2c-gpio,sda-open-drain;
872		i2c-gpio,scl-open-drain;
873		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
874		#address-cells = <1>;
875		#size-cells = <0>;
876		pinctrl-names = "default";
877		pinctrl-0 = <&pinctrl_i2c_gpio1>;
878		status = "disabled";
879	};
880};
881