1// SPDX-License-Identifier: GPL-2.0-or-later 2// Copyright 2019 IBM Corp. 3 4#include <dt-bindings/interrupt-controller/arm-gic.h> 5#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> 6#include <dt-bindings/clock/ast2600-clock.h> 7 8/ { 9 model = "Aspeed BMC"; 10 compatible = "aspeed,ast2600"; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 interrupt-parent = <&gic>; 14 15 aliases { 16 i2c0 = &i2c0; 17 i2c1 = &i2c1; 18 i2c2 = &i2c2; 19 i2c3 = &i2c3; 20 i2c4 = &i2c4; 21 i2c5 = &i2c5; 22 i2c6 = &i2c6; 23 i2c7 = &i2c7; 24 i2c8 = &i2c8; 25 i2c9 = &i2c9; 26 i2c10 = &i2c10; 27 i2c11 = &i2c11; 28 i2c12 = &i2c12; 29 i2c13 = &i2c13; 30 i2c14 = &i2c14; 31 i2c15 = &i2c15; 32 serial0 = &uart1; 33 serial1 = &uart2; 34 serial2 = &uart3; 35 serial3 = &uart4; 36 serial4 = &uart5; 37 serial5 = &vuart1; 38 serial6 = &vuart2; 39 }; 40 41 42 cpus { 43 #address-cells = <1>; 44 #size-cells = <0>; 45 enable-method = "aspeed,ast2600-smp"; 46 47 cpu@f00 { 48 compatible = "arm,cortex-a7"; 49 device_type = "cpu"; 50 reg = <0xf00>; 51 }; 52 53 cpu@f01 { 54 compatible = "arm,cortex-a7"; 55 device_type = "cpu"; 56 reg = <0xf01>; 57 }; 58 }; 59 60 timer { 61 compatible = "arm,armv7-timer"; 62 interrupt-parent = <&gic>; 63 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 64 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 65 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 66 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 67 clocks = <&syscon ASPEED_CLK_HPLL>; 68 arm,cpu-registers-not-fw-configured; 69 always-on; 70 }; 71 72 edac: sdram@1e6e0000 { 73 compatible = "aspeed,ast2600-sdram-edac", "syscon"; 74 reg = <0x1e6e0000 0x174>; 75 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>; 76 }; 77 78 ahb { 79 compatible = "simple-bus"; 80 #address-cells = <1>; 81 #size-cells = <1>; 82 device_type = "soc"; 83 ranges; 84 85 gic: interrupt-controller@40461000 { 86 compatible = "arm,cortex-a7-gic"; 87 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 88 #interrupt-cells = <3>; 89 interrupt-controller; 90 interrupt-parent = <&gic>; 91 reg = <0x40461000 0x1000>, 92 <0x40462000 0x1000>, 93 <0x40464000 0x2000>, 94 <0x40466000 0x2000>; 95 }; 96 97 fmc: spi@1e620000 { 98 reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; 99 #address-cells = <1>; 100 #size-cells = <0>; 101 compatible = "aspeed,ast2600-fmc"; 102 clocks = <&syscon ASPEED_CLK_AHB>; 103 status = "disabled"; 104 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 105 flash@0 { 106 reg = < 0 >; 107 compatible = "jedec,spi-nor"; 108 spi-max-frequency = <50000000>; 109 spi-rx-bus-width = <2>; 110 status = "disabled"; 111 }; 112 flash@1 { 113 reg = < 1 >; 114 compatible = "jedec,spi-nor"; 115 spi-max-frequency = <50000000>; 116 spi-rx-bus-width = <2>; 117 status = "disabled"; 118 }; 119 flash@2 { 120 reg = < 2 >; 121 compatible = "jedec,spi-nor"; 122 spi-max-frequency = <50000000>; 123 spi-rx-bus-width = <2>; 124 status = "disabled"; 125 }; 126 }; 127 128 spi1: spi@1e630000 { 129 reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>; 130 #address-cells = <1>; 131 #size-cells = <0>; 132 compatible = "aspeed,ast2600-spi"; 133 clocks = <&syscon ASPEED_CLK_AHB>; 134 status = "disabled"; 135 flash@0 { 136 reg = < 0 >; 137 compatible = "jedec,spi-nor"; 138 spi-max-frequency = <50000000>; 139 spi-rx-bus-width = <2>; 140 status = "disabled"; 141 }; 142 flash@1 { 143 reg = < 1 >; 144 compatible = "jedec,spi-nor"; 145 spi-max-frequency = <50000000>; 146 spi-rx-bus-width = <2>; 147 status = "disabled"; 148 }; 149 }; 150 151 spi2: spi@1e631000 { 152 reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>; 153 #address-cells = <1>; 154 #size-cells = <0>; 155 compatible = "aspeed,ast2600-spi"; 156 clocks = <&syscon ASPEED_CLK_AHB>; 157 status = "disabled"; 158 flash@0 { 159 reg = < 0 >; 160 compatible = "jedec,spi-nor"; 161 spi-max-frequency = <50000000>; 162 spi-rx-bus-width = <2>; 163 status = "disabled"; 164 }; 165 flash@1 { 166 reg = < 1 >; 167 compatible = "jedec,spi-nor"; 168 spi-max-frequency = <50000000>; 169 spi-rx-bus-width = <2>; 170 status = "disabled"; 171 }; 172 flash@2 { 173 reg = < 2 >; 174 compatible = "jedec,spi-nor"; 175 spi-max-frequency = <50000000>; 176 spi-rx-bus-width = <2>; 177 status = "disabled"; 178 }; 179 }; 180 181 mdio0: mdio@1e650000 { 182 compatible = "aspeed,ast2600-mdio"; 183 reg = <0x1e650000 0x8>; 184 #address-cells = <1>; 185 #size-cells = <0>; 186 status = "disabled"; 187 pinctrl-names = "default"; 188 pinctrl-0 = <&pinctrl_mdio1_default>; 189 resets = <&syscon ASPEED_RESET_MII>; 190 }; 191 192 mdio1: mdio@1e650008 { 193 compatible = "aspeed,ast2600-mdio"; 194 reg = <0x1e650008 0x8>; 195 #address-cells = <1>; 196 #size-cells = <0>; 197 status = "disabled"; 198 pinctrl-names = "default"; 199 pinctrl-0 = <&pinctrl_mdio2_default>; 200 resets = <&syscon ASPEED_RESET_MII>; 201 }; 202 203 mdio2: mdio@1e650010 { 204 compatible = "aspeed,ast2600-mdio"; 205 reg = <0x1e650010 0x8>; 206 #address-cells = <1>; 207 #size-cells = <0>; 208 status = "disabled"; 209 pinctrl-names = "default"; 210 pinctrl-0 = <&pinctrl_mdio3_default>; 211 resets = <&syscon ASPEED_RESET_MII>; 212 }; 213 214 mdio3: mdio@1e650018 { 215 compatible = "aspeed,ast2600-mdio"; 216 reg = <0x1e650018 0x8>; 217 #address-cells = <1>; 218 #size-cells = <0>; 219 status = "disabled"; 220 pinctrl-names = "default"; 221 pinctrl-0 = <&pinctrl_mdio4_default>; 222 resets = <&syscon ASPEED_RESET_MII>; 223 }; 224 225 mac0: ftgmac@1e660000 { 226 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 227 reg = <0x1e660000 0x180>; 228 #address-cells = <1>; 229 #size-cells = <0>; 230 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; 231 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>; 232 status = "disabled"; 233 }; 234 235 mac1: ftgmac@1e680000 { 236 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 237 reg = <0x1e680000 0x180>; 238 #address-cells = <1>; 239 #size-cells = <0>; 240 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; 241 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>; 242 status = "disabled"; 243 }; 244 245 mac2: ftgmac@1e670000 { 246 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 247 reg = <0x1e670000 0x180>; 248 #address-cells = <1>; 249 #size-cells = <0>; 250 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 251 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>; 252 status = "disabled"; 253 }; 254 255 mac3: ftgmac@1e690000 { 256 compatible = "aspeed,ast2600-mac", "faraday,ftgmac100"; 257 reg = <0x1e690000 0x180>; 258 #address-cells = <1>; 259 #size-cells = <0>; 260 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 261 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>; 262 status = "disabled"; 263 }; 264 265 ehci0: usb@1e6a1000 { 266 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 267 reg = <0x1e6a1000 0x100>; 268 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 269 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 270 pinctrl-names = "default"; 271 pinctrl-0 = <&pinctrl_usb2ah_default>; 272 status = "disabled"; 273 }; 274 275 ehci1: usb@1e6a3000 { 276 compatible = "aspeed,ast2600-ehci", "generic-ehci"; 277 reg = <0x1e6a3000 0x100>; 278 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 279 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 280 pinctrl-names = "default"; 281 pinctrl-0 = <&pinctrl_usb2bh_default>; 282 status = "disabled"; 283 }; 284 285 uhci: usb@1e6b0000 { 286 compatible = "aspeed,ast2600-uhci", "generic-uhci"; 287 reg = <0x1e6b0000 0x100>; 288 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 289 #ports = <2>; 290 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>; 291 status = "disabled"; 292 /* 293 * No default pinmux, it will follow EHCI, use an 294 * explicit pinmux override if EHCI is not enabled. 295 */ 296 }; 297 298 vhub: usb-vhub@1e6a0000 { 299 compatible = "aspeed,ast2600-usb-vhub"; 300 reg = <0x1e6a0000 0x350>; 301 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 302 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>; 303 aspeed,vhub-downstream-ports = <7>; 304 aspeed,vhub-generic-endpoints = <21>; 305 pinctrl-names = "default"; 306 pinctrl-0 = <&pinctrl_usb2ad_default>; 307 status = "disabled"; 308 }; 309 310 udc: usb@1e6a2000 { 311 compatible = "aspeed,ast2600-udc"; 312 reg = <0x1e6a2000 0x300>; 313 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 314 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>; 315 pinctrl-names = "default"; 316 pinctrl-0 = <&pinctrl_usb2bd_default>; 317 status = "disabled"; 318 }; 319 320 apb { 321 compatible = "simple-bus"; 322 #address-cells = <1>; 323 #size-cells = <1>; 324 ranges; 325 326 hace: crypto@1e6d0000 { 327 compatible = "aspeed,ast2600-hace"; 328 reg = <0x1e6d0000 0x200>; 329 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 330 clocks = <&syscon ASPEED_CLK_GATE_YCLK>; 331 resets = <&syscon ASPEED_RESET_HACE>; 332 }; 333 334 syscon: syscon@1e6e2000 { 335 compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd"; 336 reg = <0x1e6e2000 0x1000>; 337 ranges = <0 0x1e6e2000 0x1000>; 338 #address-cells = <1>; 339 #size-cells = <1>; 340 #clock-cells = <1>; 341 #reset-cells = <1>; 342 343 pinctrl: pinctrl { 344 compatible = "aspeed,ast2600-pinctrl"; 345 }; 346 347 silicon-id@14 { 348 compatible = "aspeed,ast2600-silicon-id", "aspeed,silicon-id"; 349 reg = <0x14 0x4 0x5b0 0x8>; 350 }; 351 352 smp-memram@180 { 353 compatible = "aspeed,ast2600-smpmem"; 354 reg = <0x180 0x40>; 355 }; 356 357 scu_ic0: interrupt-controller@560 { 358 #interrupt-cells = <1>; 359 compatible = "aspeed,ast2600-scu-ic0"; 360 reg = <0x560 0x4>; 361 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 362 interrupt-controller; 363 }; 364 365 scu_ic1: interrupt-controller@570 { 366 #interrupt-cells = <1>; 367 compatible = "aspeed,ast2600-scu-ic1"; 368 reg = <0x570 0x4>; 369 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 370 interrupt-controller; 371 }; 372 }; 373 374 rng: hwrng@1e6e2524 { 375 compatible = "timeriomem_rng"; 376 reg = <0x1e6e2524 0x4>; 377 period = <1>; 378 quality = <100>; 379 }; 380 381 gfx: display@1e6e6000 { 382 compatible = "aspeed,ast2600-gfx", "syscon"; 383 reg = <0x1e6e6000 0x1000>; 384 reg-io-width = <4>; 385 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>; 386 resets = <&syscon ASPEED_RESET_GRAPHICS>; 387 syscon = <&syscon>; 388 status = "disabled"; 389 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 390 }; 391 392 xdma: xdma@1e6e7000 { 393 compatible = "aspeed,ast2600-xdma"; 394 reg = <0x1e6e7000 0x100>; 395 clocks = <&syscon ASPEED_CLK_GATE_BCLK>; 396 resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>; 397 reset-names = "device", "root-complex"; 398 interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, 399 <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>; 400 aspeed,pcie-device = "bmc"; 401 aspeed,scu = <&syscon>; 402 status = "disabled"; 403 }; 404 405 adc0: adc@1e6e9000 { 406 compatible = "aspeed,ast2600-adc0"; 407 reg = <0x1e6e9000 0x100>; 408 clocks = <&syscon ASPEED_CLK_APB2>; 409 resets = <&syscon ASPEED_RESET_ADC>; 410 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 411 #io-channel-cells = <1>; 412 status = "disabled"; 413 }; 414 415 adc1: adc@1e6e9100 { 416 compatible = "aspeed,ast2600-adc1"; 417 reg = <0x1e6e9100 0x100>; 418 clocks = <&syscon ASPEED_CLK_APB2>; 419 resets = <&syscon ASPEED_RESET_ADC>; 420 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; 421 #io-channel-cells = <1>; 422 status = "disabled"; 423 }; 424 425 sbc: secure-boot-controller@1e6f2000 { 426 compatible = "aspeed,ast2600-sbc"; 427 reg = <0x1e6f2000 0x1000>; 428 }; 429 430 video: video@1e700000 { 431 compatible = "aspeed,ast2600-video-engine"; 432 reg = <0x1e700000 0x1000>; 433 clocks = <&syscon ASPEED_CLK_GATE_VCLK>, 434 <&syscon ASPEED_CLK_GATE_ECLK>; 435 clock-names = "vclk", "eclk"; 436 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 437 status = "disabled"; 438 }; 439 440 gpio0: gpio@1e780000 { 441 #gpio-cells = <2>; 442 gpio-controller; 443 compatible = "aspeed,ast2600-gpio"; 444 reg = <0x1e780000 0x400>; 445 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 446 gpio-ranges = <&pinctrl 0 0 208>; 447 ngpios = <208>; 448 clocks = <&syscon ASPEED_CLK_APB2>; 449 interrupt-controller; 450 #interrupt-cells = <2>; 451 }; 452 453 sgpiom0: sgpiom@1e780500 { 454 #gpio-cells = <2>; 455 gpio-controller; 456 compatible = "aspeed,ast2600-sgpiom"; 457 reg = <0x1e780500 0x100>; 458 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; 459 clocks = <&syscon ASPEED_CLK_APB2>; 460 interrupt-controller; 461 bus-frequency = <12000000>; 462 pinctrl-names = "default"; 463 pinctrl-0 = <&pinctrl_sgpm1_default>; 464 status = "disabled"; 465 }; 466 467 sgpiom1: sgpiom@1e780600 { 468 #gpio-cells = <2>; 469 gpio-controller; 470 compatible = "aspeed,ast2600-sgpiom"; 471 reg = <0x1e780600 0x100>; 472 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; 473 clocks = <&syscon ASPEED_CLK_APB2>; 474 interrupt-controller; 475 bus-frequency = <12000000>; 476 pinctrl-names = "default"; 477 pinctrl-0 = <&pinctrl_sgpm2_default>; 478 status = "disabled"; 479 }; 480 481 gpio1: gpio@1e780800 { 482 #gpio-cells = <2>; 483 gpio-controller; 484 compatible = "aspeed,ast2600-gpio"; 485 reg = <0x1e780800 0x800>; 486 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 487 gpio-ranges = <&pinctrl 0 208 36>; 488 ngpios = <36>; 489 clocks = <&syscon ASPEED_CLK_APB1>; 490 interrupt-controller; 491 #interrupt-cells = <2>; 492 }; 493 494 rtc: rtc@1e781000 { 495 compatible = "aspeed,ast2600-rtc"; 496 reg = <0x1e781000 0x18>; 497 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 498 status = "disabled"; 499 }; 500 501 timer: timer@1e782000 { 502 compatible = "aspeed,ast2600-timer"; 503 reg = <0x1e782000 0x90>; 504 interrupts-extended = <&gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>, 505 <&gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>, 506 <&gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 507 <&gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, 508 <&gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>, 509 <&gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 510 <&gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>, 511 <&gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 512 clocks = <&syscon ASPEED_CLK_APB1>; 513 clock-names = "PCLK"; 514 status = "disabled"; 515 }; 516 517 uart1: serial@1e783000 { 518 compatible = "ns16550a"; 519 reg = <0x1e783000 0x20>; 520 reg-shift = <2>; 521 reg-io-width = <4>; 522 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 523 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>; 524 resets = <&lpc_reset 4>; 525 no-loopback-test; 526 pinctrl-names = "default"; 527 pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>; 528 status = "disabled"; 529 }; 530 531 uart5: serial@1e784000 { 532 compatible = "ns16550a"; 533 reg = <0x1e784000 0x1000>; 534 reg-shift = <2>; 535 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 536 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>; 537 no-loopback-test; 538 }; 539 540 wdt1: watchdog@1e785000 { 541 compatible = "aspeed,ast2600-wdt"; 542 reg = <0x1e785000 0x40>; 543 }; 544 545 wdt2: watchdog@1e785040 { 546 compatible = "aspeed,ast2600-wdt"; 547 reg = <0x1e785040 0x40>; 548 status = "disabled"; 549 }; 550 551 wdt3: watchdog@1e785080 { 552 compatible = "aspeed,ast2600-wdt"; 553 reg = <0x1e785080 0x40>; 554 status = "disabled"; 555 }; 556 557 wdt4: watchdog@1e7850c0 { 558 compatible = "aspeed,ast2600-wdt"; 559 reg = <0x1e7850C0 0x40>; 560 status = "disabled"; 561 }; 562 563 peci0: peci-controller@1e78b000 { 564 compatible = "aspeed,ast2600-peci"; 565 reg = <0x1e78b000 0x100>; 566 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 567 clocks = <&syscon ASPEED_CLK_GATE_REF0CLK>; 568 resets = <&syscon ASPEED_RESET_PECI>; 569 cmd-timeout-ms = <1000>; 570 clock-frequency = <1000000>; 571 status = "disabled"; 572 }; 573 574 lpc: lpc@1e789000 { 575 compatible = "aspeed,ast2600-lpc-v2", "simple-mfd", "syscon"; 576 reg = <0x1e789000 0x1000>; 577 reg-io-width = <4>; 578 579 #address-cells = <1>; 580 #size-cells = <1>; 581 ranges = <0x0 0x1e789000 0x1000>; 582 583 kcs1: kcs@24 { 584 compatible = "aspeed,ast2500-kcs-bmc-v2"; 585 reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>; 586 interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 587 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 588 kcs_chan = <1>; 589 status = "disabled"; 590 }; 591 592 kcs2: kcs@28 { 593 compatible = "aspeed,ast2500-kcs-bmc-v2"; 594 reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>; 595 interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; 596 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 597 status = "disabled"; 598 }; 599 600 kcs3: kcs@2c { 601 compatible = "aspeed,ast2500-kcs-bmc-v2"; 602 reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>; 603 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 604 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 605 status = "disabled"; 606 }; 607 608 kcs4: kcs@114 { 609 compatible = "aspeed,ast2500-kcs-bmc-v2"; 610 reg = <0x114 0x1>, <0x118 0x1>, <0x11c 0x1>; 611 interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; 612 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 613 status = "disabled"; 614 }; 615 616 lpc_ctrl: lpc-ctrl@80 { 617 compatible = "aspeed,ast2600-lpc-ctrl"; 618 reg = <0x80 0x80>; 619 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 620 status = "disabled"; 621 }; 622 623 lpc_snoop: lpc-snoop@80 { 624 compatible = "aspeed,ast2600-lpc-snoop"; 625 reg = <0x80 0x80>; 626 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 627 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 628 status = "disabled"; 629 }; 630 631 lhc: lhc@a0 { 632 compatible = "aspeed,ast2600-lhc"; 633 reg = <0xa0 0x24 0xc8 0x8>; 634 }; 635 636 lpc_reset: reset-controller@98 { 637 compatible = "aspeed,ast2600-lpc-reset"; 638 reg = <0x98 0x4>; 639 #reset-cells = <1>; 640 }; 641 642 uart_routing: uart-routing@98 { 643 compatible = "aspeed,ast2600-uart-routing"; 644 reg = <0x98 0x8>; 645 status = "disabled"; 646 }; 647 648 ibt: ibt@140 { 649 compatible = "aspeed,ast2600-ibt-bmc"; 650 reg = <0x140 0x18>; 651 interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 652 clocks = <&syscon ASPEED_CLK_GATE_LCLK>; 653 status = "disabled"; 654 }; 655 }; 656 657 sdc: sdc@1e740000 { 658 compatible = "aspeed,ast2600-sd-controller"; 659 reg = <0x1e740000 0x100>; 660 #address-cells = <1>; 661 #size-cells = <1>; 662 ranges = <0 0x1e740000 0x10000>; 663 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>; 664 status = "disabled"; 665 666 sdhci0: sdhci@1e740100 { 667 compatible = "aspeed,ast2600-sdhci", "sdhci"; 668 reg = <0x100 0x100>; 669 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 670 sdhci,auto-cmd12; 671 clocks = <&syscon ASPEED_CLK_SDIO>; 672 status = "disabled"; 673 }; 674 675 sdhci1: sdhci@1e740200 { 676 compatible = "aspeed,ast2600-sdhci", "sdhci"; 677 reg = <0x200 0x100>; 678 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 679 sdhci,auto-cmd12; 680 clocks = <&syscon ASPEED_CLK_SDIO>; 681 status = "disabled"; 682 }; 683 }; 684 685 emmc_controller: sdc@1e750000 { 686 compatible = "aspeed,ast2600-sd-controller"; 687 reg = <0x1e750000 0x100>; 688 #address-cells = <1>; 689 #size-cells = <1>; 690 ranges = <0 0x1e750000 0x10000>; 691 clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>; 692 status = "disabled"; 693 694 emmc: sdhci@1e750100 { 695 compatible = "aspeed,ast2600-sdhci"; 696 reg = <0x100 0x100>; 697 sdhci,auto-cmd12; 698 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 699 clocks = <&syscon ASPEED_CLK_EMMC>; 700 pinctrl-names = "default"; 701 pinctrl-0 = <&pinctrl_emmc_default>; 702 }; 703 }; 704 705 vuart1: serial@1e787000 { 706 compatible = "aspeed,ast2500-vuart"; 707 reg = <0x1e787000 0x40>; 708 reg-shift = <2>; 709 interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 710 clocks = <&syscon ASPEED_CLK_APB1>; 711 no-loopback-test; 712 status = "disabled"; 713 }; 714 715 vuart2: serial@1e788000 { 716 compatible = "aspeed,ast2500-vuart"; 717 reg = <0x1e788000 0x40>; 718 reg-shift = <2>; 719 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 720 clocks = <&syscon ASPEED_CLK_APB1>; 721 no-loopback-test; 722 status = "disabled"; 723 }; 724 725 uart2: serial@1e78d000 { 726 compatible = "ns16550a"; 727 reg = <0x1e78d000 0x20>; 728 reg-shift = <2>; 729 reg-io-width = <4>; 730 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; 731 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>; 732 resets = <&lpc_reset 5>; 733 no-loopback-test; 734 pinctrl-names = "default"; 735 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>; 736 status = "disabled"; 737 }; 738 739 uart3: serial@1e78e000 { 740 compatible = "ns16550a"; 741 reg = <0x1e78e000 0x20>; 742 reg-shift = <2>; 743 reg-io-width = <4>; 744 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 745 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>; 746 resets = <&lpc_reset 6>; 747 no-loopback-test; 748 pinctrl-names = "default"; 749 pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>; 750 status = "disabled"; 751 }; 752 753 uart4: serial@1e78f000 { 754 compatible = "ns16550a"; 755 reg = <0x1e78f000 0x20>; 756 reg-shift = <2>; 757 reg-io-width = <4>; 758 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; 759 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>; 760 resets = <&lpc_reset 7>; 761 no-loopback-test; 762 pinctrl-names = "default"; 763 pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>; 764 status = "disabled"; 765 }; 766 767 uart6: serial@1e790000 { 768 compatible = "ns16550a"; 769 reg = <0x1e790000 0x20>; 770 reg-shift = <2>; 771 reg-io-width = <4>; 772 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; 773 clocks = <&syscon ASPEED_CLK_GATE_UART6CLK>; 774 no-loopback-test; 775 pinctrl-names = "default"; 776 pinctrl-0 = <&pinctrl_uart6_default>; 777 778 status = "disabled"; 779 }; 780 781 uart7: serial@1e790100 { 782 compatible = "ns16550a"; 783 reg = <0x1e790100 0x20>; 784 reg-shift = <2>; 785 reg-io-width = <4>; 786 interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>; 787 clocks = <&syscon ASPEED_CLK_GATE_UART7CLK>; 788 no-loopback-test; 789 pinctrl-names = "default"; 790 pinctrl-0 = <&pinctrl_uart7_default>; 791 792 status = "disabled"; 793 }; 794 795 uart8: serial@1e790200 { 796 compatible = "ns16550a"; 797 reg = <0x1e790200 0x20>; 798 reg-shift = <2>; 799 reg-io-width = <4>; 800 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 801 clocks = <&syscon ASPEED_CLK_GATE_UART8CLK>; 802 no-loopback-test; 803 pinctrl-names = "default"; 804 pinctrl-0 = <&pinctrl_uart8_default>; 805 806 status = "disabled"; 807 }; 808 809 uart9: serial@1e790300 { 810 compatible = "ns16550a"; 811 reg = <0x1e790300 0x20>; 812 reg-shift = <2>; 813 reg-io-width = <4>; 814 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 815 clocks = <&syscon ASPEED_CLK_GATE_UART9CLK>; 816 no-loopback-test; 817 pinctrl-names = "default"; 818 pinctrl-0 = <&pinctrl_uart9_default>; 819 820 status = "disabled"; 821 }; 822 823 i2c: bus@1e78a000 { 824 compatible = "simple-bus"; 825 #address-cells = <1>; 826 #size-cells = <1>; 827 ranges = <0 0x1e78a000 0x1000>; 828 }; 829 830 fsim0: fsi@1e79b000 { 831 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 832 reg = <0x1e79b000 0x94>; 833 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 834 pinctrl-names = "default"; 835 pinctrl-0 = <&pinctrl_fsi1_default>; 836 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 837 status = "disabled"; 838 }; 839 840 fsim1: fsi@1e79b100 { 841 compatible = "aspeed,ast2600-fsi-master", "fsi-master"; 842 reg = <0x1e79b100 0x94>; 843 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 844 pinctrl-names = "default"; 845 pinctrl-0 = <&pinctrl_fsi2_default>; 846 clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; 847 status = "disabled"; 848 }; 849 }; 850 }; 851}; 852 853#include "aspeed-g6-pinctrl.dtsi" 854 855&i2c { 856 i2c0: i2c-bus@80 { 857 #address-cells = <1>; 858 #size-cells = <0>; 859 #interrupt-cells = <1>; 860 reg = <0x80 0x80>; 861 compatible = "aspeed,ast2600-i2c-bus"; 862 clocks = <&syscon ASPEED_CLK_APB2>; 863 resets = <&syscon ASPEED_RESET_I2C>; 864 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 865 bus-frequency = <100000>; 866 pinctrl-names = "default"; 867 pinctrl-0 = <&pinctrl_i2c1_default>; 868 status = "disabled"; 869 }; 870 871 i2c1: i2c-bus@100 { 872 #address-cells = <1>; 873 #size-cells = <0>; 874 #interrupt-cells = <1>; 875 reg = <0x100 0x80>; 876 compatible = "aspeed,ast2600-i2c-bus"; 877 clocks = <&syscon ASPEED_CLK_APB2>; 878 resets = <&syscon ASPEED_RESET_I2C>; 879 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 880 bus-frequency = <100000>; 881 pinctrl-names = "default"; 882 pinctrl-0 = <&pinctrl_i2c2_default>; 883 status = "disabled"; 884 }; 885 886 i2c2: i2c-bus@180 { 887 #address-cells = <1>; 888 #size-cells = <0>; 889 #interrupt-cells = <1>; 890 reg = <0x180 0x80>; 891 compatible = "aspeed,ast2600-i2c-bus"; 892 clocks = <&syscon ASPEED_CLK_APB2>; 893 resets = <&syscon ASPEED_RESET_I2C>; 894 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 895 bus-frequency = <100000>; 896 pinctrl-names = "default"; 897 pinctrl-0 = <&pinctrl_i2c3_default>; 898 status = "disabled"; 899 }; 900 901 i2c3: i2c-bus@200 { 902 #address-cells = <1>; 903 #size-cells = <0>; 904 #interrupt-cells = <1>; 905 reg = <0x200 0x80>; 906 compatible = "aspeed,ast2600-i2c-bus"; 907 clocks = <&syscon ASPEED_CLK_APB2>; 908 resets = <&syscon ASPEED_RESET_I2C>; 909 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; 910 bus-frequency = <100000>; 911 pinctrl-names = "default"; 912 pinctrl-0 = <&pinctrl_i2c4_default>; 913 status = "disabled"; 914 }; 915 916 i2c4: i2c-bus@280 { 917 #address-cells = <1>; 918 #size-cells = <0>; 919 #interrupt-cells = <1>; 920 reg = <0x280 0x80>; 921 compatible = "aspeed,ast2600-i2c-bus"; 922 clocks = <&syscon ASPEED_CLK_APB2>; 923 resets = <&syscon ASPEED_RESET_I2C>; 924 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>; 925 bus-frequency = <100000>; 926 pinctrl-names = "default"; 927 pinctrl-0 = <&pinctrl_i2c5_default>; 928 status = "disabled"; 929 }; 930 931 i2c5: i2c-bus@300 { 932 #address-cells = <1>; 933 #size-cells = <0>; 934 #interrupt-cells = <1>; 935 reg = <0x300 0x80>; 936 compatible = "aspeed,ast2600-i2c-bus"; 937 clocks = <&syscon ASPEED_CLK_APB2>; 938 resets = <&syscon ASPEED_RESET_I2C>; 939 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 940 bus-frequency = <100000>; 941 pinctrl-names = "default"; 942 pinctrl-0 = <&pinctrl_i2c6_default>; 943 status = "disabled"; 944 }; 945 946 i2c6: i2c-bus@380 { 947 #address-cells = <1>; 948 #size-cells = <0>; 949 #interrupt-cells = <1>; 950 reg = <0x380 0x80>; 951 compatible = "aspeed,ast2600-i2c-bus"; 952 clocks = <&syscon ASPEED_CLK_APB2>; 953 resets = <&syscon ASPEED_RESET_I2C>; 954 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 955 bus-frequency = <100000>; 956 pinctrl-names = "default"; 957 pinctrl-0 = <&pinctrl_i2c7_default>; 958 status = "disabled"; 959 }; 960 961 i2c7: i2c-bus@400 { 962 #address-cells = <1>; 963 #size-cells = <0>; 964 #interrupt-cells = <1>; 965 reg = <0x400 0x80>; 966 compatible = "aspeed,ast2600-i2c-bus"; 967 clocks = <&syscon ASPEED_CLK_APB2>; 968 resets = <&syscon ASPEED_RESET_I2C>; 969 interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; 970 bus-frequency = <100000>; 971 pinctrl-names = "default"; 972 pinctrl-0 = <&pinctrl_i2c8_default>; 973 status = "disabled"; 974 }; 975 976 i2c8: i2c-bus@480 { 977 #address-cells = <1>; 978 #size-cells = <0>; 979 #interrupt-cells = <1>; 980 reg = <0x480 0x80>; 981 compatible = "aspeed,ast2600-i2c-bus"; 982 clocks = <&syscon ASPEED_CLK_APB2>; 983 resets = <&syscon ASPEED_RESET_I2C>; 984 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 985 bus-frequency = <100000>; 986 pinctrl-names = "default"; 987 pinctrl-0 = <&pinctrl_i2c9_default>; 988 status = "disabled"; 989 }; 990 991 i2c9: i2c-bus@500 { 992 #address-cells = <1>; 993 #size-cells = <0>; 994 #interrupt-cells = <1>; 995 reg = <0x500 0x80>; 996 compatible = "aspeed,ast2600-i2c-bus"; 997 clocks = <&syscon ASPEED_CLK_APB2>; 998 resets = <&syscon ASPEED_RESET_I2C>; 999 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 1000 bus-frequency = <100000>; 1001 pinctrl-names = "default"; 1002 pinctrl-0 = <&pinctrl_i2c10_default>; 1003 status = "disabled"; 1004 }; 1005 1006 i2c10: i2c-bus@580 { 1007 #address-cells = <1>; 1008 #size-cells = <0>; 1009 #interrupt-cells = <1>; 1010 reg = <0x580 0x80>; 1011 compatible = "aspeed,ast2600-i2c-bus"; 1012 clocks = <&syscon ASPEED_CLK_APB2>; 1013 resets = <&syscon ASPEED_RESET_I2C>; 1014 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 1015 bus-frequency = <100000>; 1016 pinctrl-names = "default"; 1017 pinctrl-0 = <&pinctrl_i2c11_default>; 1018 status = "disabled"; 1019 }; 1020 1021 i2c11: i2c-bus@600 { 1022 #address-cells = <1>; 1023 #size-cells = <0>; 1024 #interrupt-cells = <1>; 1025 reg = <0x600 0x80>; 1026 compatible = "aspeed,ast2600-i2c-bus"; 1027 clocks = <&syscon ASPEED_CLK_APB2>; 1028 resets = <&syscon ASPEED_RESET_I2C>; 1029 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 1030 bus-frequency = <100000>; 1031 pinctrl-names = "default"; 1032 pinctrl-0 = <&pinctrl_i2c12_default>; 1033 status = "disabled"; 1034 }; 1035 1036 i2c12: i2c-bus@680 { 1037 #address-cells = <1>; 1038 #size-cells = <0>; 1039 #interrupt-cells = <1>; 1040 reg = <0x680 0x80>; 1041 compatible = "aspeed,ast2600-i2c-bus"; 1042 clocks = <&syscon ASPEED_CLK_APB2>; 1043 resets = <&syscon ASPEED_RESET_I2C>; 1044 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 1045 bus-frequency = <100000>; 1046 pinctrl-names = "default"; 1047 pinctrl-0 = <&pinctrl_i2c13_default>; 1048 status = "disabled"; 1049 }; 1050 1051 i2c13: i2c-bus@700 { 1052 #address-cells = <1>; 1053 #size-cells = <0>; 1054 #interrupt-cells = <1>; 1055 reg = <0x700 0x80>; 1056 compatible = "aspeed,ast2600-i2c-bus"; 1057 clocks = <&syscon ASPEED_CLK_APB2>; 1058 resets = <&syscon ASPEED_RESET_I2C>; 1059 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; 1060 bus-frequency = <100000>; 1061 pinctrl-names = "default"; 1062 pinctrl-0 = <&pinctrl_i2c14_default>; 1063 status = "disabled"; 1064 }; 1065 1066 i2c14: i2c-bus@780 { 1067 #address-cells = <1>; 1068 #size-cells = <0>; 1069 #interrupt-cells = <1>; 1070 reg = <0x780 0x80>; 1071 compatible = "aspeed,ast2600-i2c-bus"; 1072 clocks = <&syscon ASPEED_CLK_APB2>; 1073 resets = <&syscon ASPEED_RESET_I2C>; 1074 interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; 1075 bus-frequency = <100000>; 1076 pinctrl-names = "default"; 1077 pinctrl-0 = <&pinctrl_i2c15_default>; 1078 status = "disabled"; 1079 }; 1080 1081 i2c15: i2c-bus@800 { 1082 #address-cells = <1>; 1083 #size-cells = <0>; 1084 #interrupt-cells = <1>; 1085 reg = <0x800 0x80>; 1086 compatible = "aspeed,ast2600-i2c-bus"; 1087 clocks = <&syscon ASPEED_CLK_APB2>; 1088 resets = <&syscon ASPEED_RESET_I2C>; 1089 interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; 1090 bus-frequency = <100000>; 1091 pinctrl-names = "default"; 1092 pinctrl-0 = <&pinctrl_i2c16_default>; 1093 status = "disabled"; 1094 }; 1095}; 1096
