1// SPDX-License-Identifier: GPL-2.0-or-later
2// Copyright 2019 IBM Corp.
3
4#include <dt-bindings/interrupt-controller/arm-gic.h>
5#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6#include <dt-bindings/clock/ast2600-clock.h>
7
8/ {
9	model = "Aspeed BMC";
10	compatible = "aspeed,ast2600";
11	#address-cells = <1>;
12	#size-cells = <1>;
13	interrupt-parent = <&gic>;
14
15	aliases {
16		i2c0 = &i2c0;
17		i2c1 = &i2c1;
18		i2c2 = &i2c2;
19		i2c3 = &i2c3;
20		i2c4 = &i2c4;
21		i2c5 = &i2c5;
22		i2c6 = &i2c6;
23		i2c7 = &i2c7;
24		i2c8 = &i2c8;
25		i2c9 = &i2c9;
26		i2c10 = &i2c10;
27		i2c11 = &i2c11;
28		i2c12 = &i2c12;
29		i2c13 = &i2c13;
30		i2c14 = &i2c14;
31		i2c15 = &i2c15;
32		serial0 = &uart1;
33		serial1 = &uart2;
34		serial2 = &uart3;
35		serial3 = &uart4;
36		serial4 = &uart5;
37		serial5 = &vuart1;
38		serial6 = &vuart2;
39	};
40
41
42	cpus {
43		#address-cells = <1>;
44		#size-cells = <0>;
45		enable-method = "aspeed,ast2600-smp";
46
47		cpu@f00 {
48			compatible = "arm,cortex-a7";
49			device_type = "cpu";
50			reg = <0xf00>;
51		};
52
53		cpu@f01 {
54			compatible = "arm,cortex-a7";
55			device_type = "cpu";
56			reg = <0xf01>;
57		};
58	};
59
60	timer {
61		compatible = "arm,armv7-timer";
62		interrupt-parent = <&gic>;
63		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
64			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
65			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
66			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
67		clocks = <&syscon ASPEED_CLK_HPLL>;
68		arm,cpu-registers-not-fw-configured;
69		always-on;
70	};
71
72	ahb {
73		compatible = "simple-bus";
74		#address-cells = <1>;
75		#size-cells = <1>;
76		device_type = "soc";
77		ranges;
78
79		gic: interrupt-controller@40461000 {
80			compatible = "arm,cortex-a7-gic";
81			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
82			#interrupt-cells = <3>;
83			interrupt-controller;
84			interrupt-parent = <&gic>;
85			reg = <0x40461000 0x1000>,
86			    <0x40462000 0x1000>,
87			    <0x40464000 0x2000>,
88			    <0x40466000 0x2000>;
89			};
90
91		fmc: spi@1e620000 {
92			reg = < 0x1e620000 0xc4
93				0x20000000 0x10000000 >;
94			#address-cells = <1>;
95			#size-cells = <0>;
96			compatible = "aspeed,ast2600-fmc";
97			clocks = <&syscon ASPEED_CLK_AHB>;
98			status = "disabled";
99			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
100			flash@0 {
101				reg = < 0 >;
102				compatible = "jedec,spi-nor";
103				spi-max-frequency = <50000000>;
104				status = "disabled";
105			};
106			flash@1 {
107				reg = < 1 >;
108				compatible = "jedec,spi-nor";
109				spi-max-frequency = <50000000>;
110				status = "disabled";
111			};
112			flash@2 {
113				reg = < 2 >;
114				compatible = "jedec,spi-nor";
115				spi-max-frequency = <50000000>;
116				status = "disabled";
117			};
118		};
119
120		spi1: spi@1e630000 {
121			reg = < 0x1e630000 0xc4
122				0x30000000 0x10000000 >;
123			#address-cells = <1>;
124			#size-cells = <0>;
125			compatible = "aspeed,ast2600-spi";
126			clocks = <&syscon ASPEED_CLK_AHB>;
127			status = "disabled";
128			flash@0 {
129				reg = < 0 >;
130				compatible = "jedec,spi-nor";
131				spi-max-frequency = <50000000>;
132				status = "disabled";
133			};
134			flash@1 {
135				reg = < 1 >;
136				compatible = "jedec,spi-nor";
137				spi-max-frequency = <50000000>;
138				status = "disabled";
139			};
140		};
141
142		spi2: spi@1e631000 {
143			reg = < 0x1e631000 0xc4
144				0x50000000 0x10000000 >;
145			#address-cells = <1>;
146			#size-cells = <0>;
147			compatible = "aspeed,ast2600-spi";
148			clocks = <&syscon ASPEED_CLK_AHB>;
149			status = "disabled";
150			flash@0 {
151				reg = < 0 >;
152				compatible = "jedec,spi-nor";
153				spi-max-frequency = <50000000>;
154				status = "disabled";
155			};
156			flash@1 {
157				reg = < 1 >;
158				compatible = "jedec,spi-nor";
159				spi-max-frequency = <50000000>;
160				status = "disabled";
161			};
162			flash@2 {
163				reg = < 2 >;
164				compatible = "jedec,spi-nor";
165				spi-max-frequency = <50000000>;
166				status = "disabled";
167			};
168		};
169
170		mdio0: mdio@1e650000 {
171			compatible = "aspeed,ast2600-mdio";
172			reg = <0x1e650000 0x8>;
173			#address-cells = <1>;
174			#size-cells = <0>;
175			status = "disabled";
176			pinctrl-names = "default";
177			pinctrl-0 = <&pinctrl_mdio1_default>;
178		};
179
180		mdio1: mdio@1e650008 {
181			compatible = "aspeed,ast2600-mdio";
182			reg = <0x1e650008 0x8>;
183			#address-cells = <1>;
184			#size-cells = <0>;
185			status = "disabled";
186			pinctrl-names = "default";
187			pinctrl-0 = <&pinctrl_mdio2_default>;
188		};
189
190		mdio2: mdio@1e650010 {
191			compatible = "aspeed,ast2600-mdio";
192			reg = <0x1e650010 0x8>;
193			#address-cells = <1>;
194			#size-cells = <0>;
195			status = "disabled";
196			pinctrl-names = "default";
197			pinctrl-0 = <&pinctrl_mdio3_default>;
198		};
199
200		mdio3: mdio@1e650018 {
201			compatible = "aspeed,ast2600-mdio";
202			reg = <0x1e650018 0x8>;
203			#address-cells = <1>;
204			#size-cells = <0>;
205			status = "disabled";
206			pinctrl-names = "default";
207			pinctrl-0 = <&pinctrl_mdio4_default>;
208		};
209
210		mac0: ftgmac@1e660000 {
211			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
212			reg = <0x1e660000 0x180>;
213			#address-cells = <1>;
214			#size-cells = <0>;
215			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
216			clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
217			status = "disabled";
218		};
219
220		mac1: ftgmac@1e680000 {
221			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
222			reg = <0x1e680000 0x180>;
223			#address-cells = <1>;
224			#size-cells = <0>;
225			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
226			clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
227			status = "disabled";
228		};
229
230		mac2: ftgmac@1e670000 {
231			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
232			reg = <0x1e670000 0x180>;
233			#address-cells = <1>;
234			#size-cells = <0>;
235			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
236			clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
237			status = "disabled";
238		};
239
240		mac3: ftgmac@1e690000 {
241			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
242			reg = <0x1e690000 0x180>;
243			#address-cells = <1>;
244			#size-cells = <0>;
245			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
246			clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
247			status = "disabled";
248		};
249
250		ehci0: usb@1e6a1000 {
251			compatible = "aspeed,ast2600-ehci", "generic-ehci";
252			reg = <0x1e6a1000 0x100>;
253			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
254			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
255			pinctrl-names = "default";
256			pinctrl-0 = <&pinctrl_usb2ah_default>;
257			status = "disabled";
258		};
259
260		ehci1: usb@1e6a3000 {
261			compatible = "aspeed,ast2600-ehci", "generic-ehci";
262			reg = <0x1e6a3000 0x100>;
263			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
264			clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
265			pinctrl-names = "default";
266			pinctrl-0 = <&pinctrl_usb2bh_default>;
267			status = "disabled";
268		};
269
270		uhci: usb@1e6b0000 {
271			compatible = "aspeed,ast2600-uhci", "generic-uhci";
272			reg = <0x1e6b0000 0x100>;
273			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
274			#ports = <2>;
275			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
276			status = "disabled";
277			/*
278			 * No default pinmux, it will follow EHCI, use an
279			 * explicit pinmux override if EHCI is not enabled.
280			 */
281		};
282
283		vhub: usb-vhub@1e6a0000 {
284			compatible = "aspeed,ast2600-usb-vhub";
285			reg = <0x1e6a0000 0x350>;
286			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
287			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
288			aspeed,vhub-downstream-ports = <7>;
289			aspeed,vhub-generic-endpoints = <21>;
290			pinctrl-names = "default";
291			pinctrl-0 = <&pinctrl_usb2ad_default>;
292			status = "disabled";
293		};
294
295		apb {
296			compatible = "simple-bus";
297			#address-cells = <1>;
298			#size-cells = <1>;
299			ranges;
300
301			syscon: syscon@1e6e2000 {
302				compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
303				reg = <0x1e6e2000 0x1000>;
304				ranges = <0 0x1e6e2000 0x1000>;
305				#address-cells = <1>;
306				#size-cells = <1>;
307				#clock-cells = <1>;
308				#reset-cells = <1>;
309
310				pinctrl: pinctrl {
311					compatible = "aspeed,ast2600-pinctrl";
312				};
313
314				smp-memram@180 {
315					compatible = "aspeed,ast2600-smpmem";
316					reg = <0x180 0x40>;
317				};
318
319				scu_ic0: interrupt-controller@560 {
320					#interrupt-cells = <1>;
321					compatible = "aspeed,ast2600-scu-ic0";
322					reg = <0x560 0x4>;
323					interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
324					interrupt-controller;
325				};
326
327				scu_ic1: interrupt-controller@570 {
328					#interrupt-cells = <1>;
329					compatible = "aspeed,ast2600-scu-ic1";
330					reg = <0x570 0x4>;
331					interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
332					interrupt-controller;
333				};
334			};
335
336			rng: hwrng@1e6e2524 {
337				compatible = "timeriomem_rng";
338				reg = <0x1e6e2524 0x4>;
339				period = <1>;
340				quality = <100>;
341			};
342
343			xdma: xdma@1e6e7000 {
344				compatible = "aspeed,ast2600-xdma";
345				reg = <0x1e6e7000 0x100>;
346				clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
347				resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>;
348				reset-names = "device", "root-complex";
349				interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
350						      <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
351				aspeed,pcie-device = "bmc";
352				aspeed,scu = <&syscon>;
353				status = "disabled";
354			};
355
356			gpio0: gpio@1e780000 {
357				#gpio-cells = <2>;
358				gpio-controller;
359				compatible = "aspeed,ast2600-gpio";
360				reg = <0x1e780000 0x800>;
361				interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
362				gpio-ranges = <&pinctrl 0 0 208>;
363				ngpios = <208>;
364				clocks = <&syscon ASPEED_CLK_APB2>;
365				interrupt-controller;
366				#interrupt-cells = <2>;
367			};
368
369			gpio1: gpio@1e780800 {
370				#gpio-cells = <2>;
371				gpio-controller;
372				compatible = "aspeed,ast2600-gpio";
373				reg = <0x1e780800 0x800>;
374				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
375				gpio-ranges = <&pinctrl 0 208 36>;
376				ngpios = <36>;
377				clocks = <&syscon ASPEED_CLK_APB1>;
378				interrupt-controller;
379				#interrupt-cells = <2>;
380			};
381
382			rtc: rtc@1e781000 {
383				compatible = "aspeed,ast2600-rtc";
384				reg = <0x1e781000 0x18>;
385				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
386				status = "disabled";
387			};
388
389			timer: timer@1e782000 {
390				compatible = "aspeed,ast2600-timer";
391				reg = <0x1e782000 0x90>;
392				interrupts-extended = <&gic  GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
393						<&gic  GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
394						<&gic  GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
395						<&gic  GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
396						<&gic  GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
397						<&gic  GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
398						<&gic  GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
399						<&gic  GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
400				clocks = <&syscon ASPEED_CLK_APB1>;
401				clock-names = "PCLK";
402				status = "disabled";
403                        };
404
405			uart1: serial@1e783000 {
406				compatible = "ns16550a";
407				reg = <0x1e783000 0x20>;
408				reg-shift = <2>;
409				reg-io-width = <4>;
410				interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
411				clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
412				resets = <&lpc_reset 4>;
413				no-loopback-test;
414				pinctrl-names = "default";
415				pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
416				status = "disabled";
417			};
418
419			uart5: serial@1e784000 {
420				compatible = "ns16550a";
421				reg = <0x1e784000 0x1000>;
422				reg-shift = <2>;
423				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
424				clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
425				no-loopback-test;
426			};
427
428			wdt1: watchdog@1e785000 {
429				compatible = "aspeed,ast2600-wdt";
430				reg = <0x1e785000 0x40>;
431			};
432
433			wdt2: watchdog@1e785040 {
434				compatible = "aspeed,ast2600-wdt";
435				reg = <0x1e785040 0x40>;
436				status = "disabled";
437			};
438
439			wdt3: watchdog@1e785080 {
440				compatible = "aspeed,ast2600-wdt";
441				reg = <0x1e785080 0x40>;
442				status = "disabled";
443			};
444
445			wdt4: watchdog@1e7850c0 {
446				compatible = "aspeed,ast2600-wdt";
447				reg = <0x1e7850C0 0x40>;
448				status = "disabled";
449			};
450
451			lpc: lpc@1e789000 {
452				compatible = "aspeed,ast2600-lpc", "simple-mfd";
453				reg = <0x1e789000 0x1000>;
454
455				#address-cells = <1>;
456				#size-cells = <1>;
457				ranges = <0x0 0x1e789000 0x1000>;
458
459				lpc_bmc: lpc-bmc@0 {
460					compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
461					reg = <0x0 0x80>;
462					reg-io-width = <4>;
463
464					#address-cells = <1>;
465					#size-cells = <1>;
466					ranges = <0x0 0x0 0x80>;
467
468					kcs1: kcs@24 {
469						compatible = "aspeed,ast2500-kcs-bmc-v2";
470						reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
471						interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
472						kcs_chan = <1>;
473						status = "disabled";
474					};
475					kcs2: kcs@28 {
476						compatible = "aspeed,ast2500-kcs-bmc-v2";
477						reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
478						interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
479						status = "disabled";
480					};
481					kcs3: kcs@2c {
482						compatible = "aspeed,ast2500-kcs-bmc-v2";
483						reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
484						interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
485						status = "disabled";
486					};
487				};
488
489				lpc_host: lpc-host@80 {
490					compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
491					reg = <0x80 0x1e0>;
492					reg-io-width = <4>;
493
494					#address-cells = <1>;
495					#size-cells = <1>;
496					ranges = <0x0 0x80 0x1e0>;
497
498					kcs4: kcs@94 {
499						compatible = "aspeed,ast2500-kcs-bmc-v2";
500						reg = <0x94 0x1>, <0x98 0x1>, <0x9c 0x1>;
501						interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
502						status = "disabled";
503					};
504
505					lpc_ctrl: lpc-ctrl@0 {
506						compatible = "aspeed,ast2600-lpc-ctrl";
507						reg = <0x0 0x80>;
508						clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
509						status = "disabled";
510					};
511
512					lpc_snoop: lpc-snoop@0 {
513						compatible = "aspeed,ast2600-lpc-snoop";
514						reg = <0x0 0x80>;
515						interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
516						status = "disabled";
517					};
518
519					lhc: lhc@20 {
520						compatible = "aspeed,ast2600-lhc";
521						reg = <0x20 0x24 0x48 0x8>;
522					};
523
524					lpc_reset: reset-controller@18 {
525						compatible = "aspeed,ast2600-lpc-reset";
526						reg = <0x18 0x4>;
527						#reset-cells = <1>;
528					};
529
530					ibt: ibt@c0 {
531						compatible = "aspeed,ast2600-ibt-bmc";
532						reg = <0xc0 0x18>;
533						interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
534						status = "disabled";
535					};
536				};
537			};
538
539			sdc: sdc@1e740000 {
540				compatible = "aspeed,ast2600-sd-controller";
541				reg = <0x1e740000 0x100>;
542				#address-cells = <1>;
543				#size-cells = <1>;
544				ranges = <0 0x1e740000 0x10000>;
545				clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
546				status = "disabled";
547
548				sdhci0: sdhci@1e740100 {
549					compatible = "aspeed,ast2600-sdhci", "sdhci";
550					reg = <0x100 0x100>;
551					interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
552					sdhci,auto-cmd12;
553					clocks = <&syscon ASPEED_CLK_SDIO>;
554					status = "disabled";
555				};
556
557				sdhci1: sdhci@1e740200 {
558					compatible = "aspeed,ast2600-sdhci", "sdhci";
559					reg = <0x200 0x100>;
560					interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
561					sdhci,auto-cmd12;
562					clocks = <&syscon ASPEED_CLK_SDIO>;
563					status = "disabled";
564				};
565			};
566
567			emmc_controller: sdc@1e750000 {
568				compatible = "aspeed,ast2600-sd-controller";
569				reg = <0x1e750000 0x100>;
570				#address-cells = <1>;
571				#size-cells = <1>;
572				ranges = <0 0x1e750000 0x10000>;
573				clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
574				status = "disabled";
575
576				emmc: sdhci@1e750100 {
577					compatible = "aspeed,ast2600-sdhci";
578					reg = <0x100 0x100>;
579					sdhci,auto-cmd12;
580					interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
581					clocks = <&syscon ASPEED_CLK_EMMC>;
582					pinctrl-names = "default";
583					pinctrl-0 = <&pinctrl_emmc_default>;
584				};
585			};
586
587			vuart1: serial@1e787000 {
588				compatible = "aspeed,ast2500-vuart";
589				reg = <0x1e787000 0x40>;
590				reg-shift = <2>;
591				interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
592				clocks = <&syscon ASPEED_CLK_APB1>;
593				no-loopback-test;
594				status = "disabled";
595			};
596
597			vuart2: serial@1e788000 {
598				compatible = "aspeed,ast2500-vuart";
599				reg = <0x1e788000 0x40>;
600				reg-shift = <2>;
601				interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
602				clocks = <&syscon ASPEED_CLK_APB1>;
603				no-loopback-test;
604				status = "disabled";
605			};
606
607			uart2: serial@1e78d000 {
608				compatible = "ns16550a";
609				reg = <0x1e78d000 0x20>;
610				reg-shift = <2>;
611				reg-io-width = <4>;
612				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
613				clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
614				resets = <&lpc_reset 5>;
615				no-loopback-test;
616				pinctrl-names = "default";
617				pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
618				status = "disabled";
619			};
620
621			uart3: serial@1e78e000 {
622				compatible = "ns16550a";
623				reg = <0x1e78e000 0x20>;
624				reg-shift = <2>;
625				reg-io-width = <4>;
626				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
627				clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
628				resets = <&lpc_reset 6>;
629				no-loopback-test;
630				pinctrl-names = "default";
631				pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
632				status = "disabled";
633			};
634
635			uart4: serial@1e78f000 {
636				compatible = "ns16550a";
637				reg = <0x1e78f000 0x20>;
638				reg-shift = <2>;
639				reg-io-width = <4>;
640				interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
641				clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
642				resets = <&lpc_reset 7>;
643				no-loopback-test;
644				pinctrl-names = "default";
645				pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
646				status = "disabled";
647			};
648
649			i2c: bus@1e78a000 {
650				compatible = "simple-bus";
651				#address-cells = <1>;
652				#size-cells = <1>;
653				ranges = <0 0x1e78a000 0x1000>;
654			};
655
656			fsim0: fsi@1e79b000 {
657				compatible = "aspeed,ast2600-fsi-master", "fsi-master";
658				reg = <0x1e79b000 0x94>;
659				interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
660				pinctrl-names = "default";
661				pinctrl-0 = <&pinctrl_fsi1_default>;
662				clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
663				status = "disabled";
664			};
665
666			fsim1: fsi@1e79b100 {
667				compatible = "aspeed,ast2600-fsi-master", "fsi-master";
668				reg = <0x1e79b100 0x94>;
669				interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
670				pinctrl-names = "default";
671				pinctrl-0 = <&pinctrl_fsi2_default>;
672				clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
673				status = "disabled";
674			};
675		};
676	};
677};
678
679#include "aspeed-g6-pinctrl.dtsi"
680
681&i2c {
682	i2c0: i2c-bus@80 {
683		#address-cells = <1>;
684		#size-cells = <0>;
685		#interrupt-cells = <1>;
686		reg = <0x80 0x80>;
687		compatible = "aspeed,ast2600-i2c-bus";
688		clocks = <&syscon ASPEED_CLK_APB2>;
689		resets = <&syscon ASPEED_RESET_I2C>;
690		interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
691		bus-frequency = <100000>;
692		pinctrl-names = "default";
693		pinctrl-0 = <&pinctrl_i2c1_default>;
694		status = "disabled";
695	};
696
697	i2c1: i2c-bus@100 {
698		#address-cells = <1>;
699		#size-cells = <0>;
700		#interrupt-cells = <1>;
701		reg = <0x100 0x80>;
702		compatible = "aspeed,ast2600-i2c-bus";
703		clocks = <&syscon ASPEED_CLK_APB2>;
704		resets = <&syscon ASPEED_RESET_I2C>;
705		interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
706		bus-frequency = <100000>;
707		pinctrl-names = "default";
708		pinctrl-0 = <&pinctrl_i2c2_default>;
709		status = "disabled";
710	};
711
712	i2c2: i2c-bus@180 {
713		#address-cells = <1>;
714		#size-cells = <0>;
715		#interrupt-cells = <1>;
716		reg = <0x180 0x80>;
717		compatible = "aspeed,ast2600-i2c-bus";
718		clocks = <&syscon ASPEED_CLK_APB2>;
719		resets = <&syscon ASPEED_RESET_I2C>;
720		interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
721		bus-frequency = <100000>;
722		pinctrl-names = "default";
723		pinctrl-0 = <&pinctrl_i2c3_default>;
724		status = "disabled";
725	};
726
727	i2c3: i2c-bus@200 {
728		#address-cells = <1>;
729		#size-cells = <0>;
730		#interrupt-cells = <1>;
731		reg = <0x200 0x80>;
732		compatible = "aspeed,ast2600-i2c-bus";
733		clocks = <&syscon ASPEED_CLK_APB2>;
734		resets = <&syscon ASPEED_RESET_I2C>;
735		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
736		bus-frequency = <100000>;
737		pinctrl-names = "default";
738		pinctrl-0 = <&pinctrl_i2c4_default>;
739		status = "disabled";
740	};
741
742	i2c4: i2c-bus@280 {
743		#address-cells = <1>;
744		#size-cells = <0>;
745		#interrupt-cells = <1>;
746		reg = <0x280 0x80>;
747		compatible = "aspeed,ast2600-i2c-bus";
748		clocks = <&syscon ASPEED_CLK_APB2>;
749		resets = <&syscon ASPEED_RESET_I2C>;
750		interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
751		bus-frequency = <100000>;
752		pinctrl-names = "default";
753		pinctrl-0 = <&pinctrl_i2c5_default>;
754		status = "disabled";
755	};
756
757	i2c5: i2c-bus@300 {
758		#address-cells = <1>;
759		#size-cells = <0>;
760		#interrupt-cells = <1>;
761		reg = <0x300 0x80>;
762		compatible = "aspeed,ast2600-i2c-bus";
763		clocks = <&syscon ASPEED_CLK_APB2>;
764		resets = <&syscon ASPEED_RESET_I2C>;
765		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
766		bus-frequency = <100000>;
767		pinctrl-names = "default";
768		pinctrl-0 = <&pinctrl_i2c6_default>;
769		status = "disabled";
770	};
771
772	i2c6: i2c-bus@380 {
773		#address-cells = <1>;
774		#size-cells = <0>;
775		#interrupt-cells = <1>;
776		reg = <0x380 0x80>;
777		compatible = "aspeed,ast2600-i2c-bus";
778		clocks = <&syscon ASPEED_CLK_APB2>;
779		resets = <&syscon ASPEED_RESET_I2C>;
780		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
781		bus-frequency = <100000>;
782		pinctrl-names = "default";
783		pinctrl-0 = <&pinctrl_i2c7_default>;
784		status = "disabled";
785	};
786
787	i2c7: i2c-bus@400 {
788		#address-cells = <1>;
789		#size-cells = <0>;
790		#interrupt-cells = <1>;
791		reg = <0x400 0x80>;
792		compatible = "aspeed,ast2600-i2c-bus";
793		clocks = <&syscon ASPEED_CLK_APB2>;
794		resets = <&syscon ASPEED_RESET_I2C>;
795		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
796		bus-frequency = <100000>;
797		pinctrl-names = "default";
798		pinctrl-0 = <&pinctrl_i2c8_default>;
799		status = "disabled";
800	};
801
802	i2c8: i2c-bus@480 {
803		#address-cells = <1>;
804		#size-cells = <0>;
805		#interrupt-cells = <1>;
806		reg = <0x480 0x80>;
807		compatible = "aspeed,ast2600-i2c-bus";
808		clocks = <&syscon ASPEED_CLK_APB2>;
809		resets = <&syscon ASPEED_RESET_I2C>;
810		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
811		bus-frequency = <100000>;
812		pinctrl-names = "default";
813		pinctrl-0 = <&pinctrl_i2c9_default>;
814		status = "disabled";
815	};
816
817	i2c9: i2c-bus@500 {
818		#address-cells = <1>;
819		#size-cells = <0>;
820		#interrupt-cells = <1>;
821		reg = <0x500 0x80>;
822		compatible = "aspeed,ast2600-i2c-bus";
823		clocks = <&syscon ASPEED_CLK_APB2>;
824		resets = <&syscon ASPEED_RESET_I2C>;
825		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
826		bus-frequency = <100000>;
827		pinctrl-names = "default";
828		pinctrl-0 = <&pinctrl_i2c10_default>;
829		status = "disabled";
830	};
831
832	i2c10: i2c-bus@580 {
833		#address-cells = <1>;
834		#size-cells = <0>;
835		#interrupt-cells = <1>;
836		reg = <0x580 0x80>;
837		compatible = "aspeed,ast2600-i2c-bus";
838		clocks = <&syscon ASPEED_CLK_APB2>;
839		resets = <&syscon ASPEED_RESET_I2C>;
840		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
841		bus-frequency = <100000>;
842		pinctrl-names = "default";
843		pinctrl-0 = <&pinctrl_i2c11_default>;
844		status = "disabled";
845	};
846
847	i2c11: i2c-bus@600 {
848		#address-cells = <1>;
849		#size-cells = <0>;
850		#interrupt-cells = <1>;
851		reg = <0x600 0x80>;
852		compatible = "aspeed,ast2600-i2c-bus";
853		clocks = <&syscon ASPEED_CLK_APB2>;
854		resets = <&syscon ASPEED_RESET_I2C>;
855		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
856		bus-frequency = <100000>;
857		pinctrl-names = "default";
858		pinctrl-0 = <&pinctrl_i2c12_default>;
859		status = "disabled";
860	};
861
862	i2c12: i2c-bus@680 {
863		#address-cells = <1>;
864		#size-cells = <0>;
865		#interrupt-cells = <1>;
866		reg = <0x680 0x80>;
867		compatible = "aspeed,ast2600-i2c-bus";
868		clocks = <&syscon ASPEED_CLK_APB2>;
869		resets = <&syscon ASPEED_RESET_I2C>;
870		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
871		bus-frequency = <100000>;
872		pinctrl-names = "default";
873		pinctrl-0 = <&pinctrl_i2c13_default>;
874		status = "disabled";
875	};
876
877	i2c13: i2c-bus@700 {
878		#address-cells = <1>;
879		#size-cells = <0>;
880		#interrupt-cells = <1>;
881		reg = <0x700 0x80>;
882		compatible = "aspeed,ast2600-i2c-bus";
883		clocks = <&syscon ASPEED_CLK_APB2>;
884		resets = <&syscon ASPEED_RESET_I2C>;
885		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
886		bus-frequency = <100000>;
887		pinctrl-names = "default";
888		pinctrl-0 = <&pinctrl_i2c14_default>;
889		status = "disabled";
890	};
891
892	i2c14: i2c-bus@780 {
893		#address-cells = <1>;
894		#size-cells = <0>;
895		#interrupt-cells = <1>;
896		reg = <0x780 0x80>;
897		compatible = "aspeed,ast2600-i2c-bus";
898		clocks = <&syscon ASPEED_CLK_APB2>;
899		resets = <&syscon ASPEED_RESET_I2C>;
900		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
901		bus-frequency = <100000>;
902		pinctrl-names = "default";
903		pinctrl-0 = <&pinctrl_i2c15_default>;
904		status = "disabled";
905	};
906
907	i2c15: i2c-bus@800 {
908		#address-cells = <1>;
909		#size-cells = <0>;
910		#interrupt-cells = <1>;
911		reg = <0x800 0x80>;
912		compatible = "aspeed,ast2600-i2c-bus";
913		clocks = <&syscon ASPEED_CLK_APB2>;
914		resets = <&syscon ASPEED_RESET_I2C>;
915		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
916		bus-frequency = <100000>;
917		pinctrl-names = "default";
918		pinctrl-0 = <&pinctrl_i2c16_default>;
919		status = "disabled";
920	};
921};
922