1 /*
2 * arch/arm/mach-iop32x/iq31244.c
3 *
4 * Board support code for the Intel EP80219 and IQ31244 platforms.
5 *
6 * Author: Rory Bolt <rorybolt@pacbell.net>
7 * Copyright (C) 2002 Rory Bolt
8 * Copyright 2003 (c) MontaVista, Software, Inc.
9 * Copyright (C) 2004 Intel Corp.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17 #include <linux/mm.h>
18 #include <linux/init.h>
19 #include <linux/delay.h>
20 #include <linux/kernel.h>
21 #include <linux/pci.h>
22 #include <linux/pm.h>
23 #include <linux/string.h>
24 #include <linux/serial_core.h>
25 #include <linux/serial_8250.h>
26 #include <linux/mtd/physmap.h>
27 #include <linux/platform_device.h>
28 #include <linux/io.h>
29 #include <mach/hardware.h>
30 #include <asm/cputype.h>
31 #include <asm/irq.h>
32 #include <asm/mach/arch.h>
33 #include <asm/mach/map.h>
34 #include <asm/mach/pci.h>
35 #include <asm/mach/time.h>
36 #include <asm/mach-types.h>
37 #include <asm/page.h>
38 #include <asm/pgtable.h>
39 #include <mach/time.h>
40 #include "gpio-iop32x.h"
41
42 /*
43 * Until March of 2007 iq31244 platforms and ep80219 platforms shared the
44 * same machine id, and the processor type was used to select board type.
45 * However this assumption breaks for an iq80219 board which is an iop219
46 * processor on an iq31244 board. The force_ep80219 flag has been added
47 * for old boot loaders using the iq31244 machine id for an ep80219 platform.
48 */
49 static int force_ep80219;
50
is_80219(void)51 static int is_80219(void)
52 {
53 return !!((read_cpuid_id() & 0xffffffe0) == 0x69052e20);
54 }
55
is_ep80219(void)56 static int is_ep80219(void)
57 {
58 if (machine_is_ep80219() || force_ep80219)
59 return 1;
60 else
61 return 0;
62 }
63
64
65 /*
66 * EP80219/IQ31244 timer tick configuration.
67 */
iq31244_timer_init(void)68 static void __init iq31244_timer_init(void)
69 {
70 if (is_ep80219()) {
71 /* 33.333 MHz crystal. */
72 iop_init_time(200000000);
73 } else {
74 /* 33.000 MHz crystal. */
75 iop_init_time(198000000);
76 }
77 }
78
79
80 /*
81 * IQ31244 I/O.
82 */
83 static struct map_desc iq31244_io_desc[] __initdata = {
84 { /* on-board devices */
85 .virtual = IQ31244_UART,
86 .pfn = __phys_to_pfn(IQ31244_UART),
87 .length = 0x00100000,
88 .type = MT_DEVICE,
89 },
90 };
91
iq31244_map_io(void)92 void __init iq31244_map_io(void)
93 {
94 iop3xx_map_io();
95 iotable_init(iq31244_io_desc, ARRAY_SIZE(iq31244_io_desc));
96 }
97
98
99 /*
100 * EP80219/IQ31244 PCI.
101 */
102 static int __init
ep80219_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)103 ep80219_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
104 {
105 int irq;
106
107 if (slot == 0) {
108 /* CFlash */
109 irq = IRQ_IOP32X_XINT1;
110 } else if (slot == 1) {
111 /* 82551 Pro 100 */
112 irq = IRQ_IOP32X_XINT0;
113 } else if (slot == 2) {
114 /* PCI-X Slot */
115 irq = IRQ_IOP32X_XINT3;
116 } else if (slot == 3) {
117 /* SATA */
118 irq = IRQ_IOP32X_XINT2;
119 } else {
120 printk(KERN_ERR "ep80219_pci_map_irq() called for unknown "
121 "device PCI:%d:%d:%d\n", dev->bus->number,
122 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
123 irq = -1;
124 }
125
126 return irq;
127 }
128
129 static struct hw_pci ep80219_pci __initdata = {
130 .nr_controllers = 1,
131 .ops = &iop3xx_ops,
132 .setup = iop3xx_pci_setup,
133 .preinit = iop3xx_pci_preinit,
134 .map_irq = ep80219_pci_map_irq,
135 };
136
137 static int __init
iq31244_pci_map_irq(const struct pci_dev * dev,u8 slot,u8 pin)138 iq31244_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
139 {
140 int irq;
141
142 if (slot == 0) {
143 /* CFlash */
144 irq = IRQ_IOP32X_XINT1;
145 } else if (slot == 1) {
146 /* SATA */
147 irq = IRQ_IOP32X_XINT2;
148 } else if (slot == 2) {
149 /* PCI-X Slot */
150 irq = IRQ_IOP32X_XINT3;
151 } else if (slot == 3) {
152 /* 82546 GigE */
153 irq = IRQ_IOP32X_XINT0;
154 } else {
155 printk(KERN_ERR "iq31244_pci_map_irq called for unknown "
156 "device PCI:%d:%d:%d\n", dev->bus->number,
157 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
158 irq = -1;
159 }
160
161 return irq;
162 }
163
164 static struct hw_pci iq31244_pci __initdata = {
165 .nr_controllers = 1,
166 .ops = &iop3xx_ops,
167 .setup = iop3xx_pci_setup,
168 .preinit = iop3xx_pci_preinit,
169 .map_irq = iq31244_pci_map_irq,
170 };
171
iq31244_pci_init(void)172 static int __init iq31244_pci_init(void)
173 {
174 if (is_ep80219())
175 pci_common_init(&ep80219_pci);
176 else if (machine_is_iq31244()) {
177 if (is_80219()) {
178 printk("note: iq31244 board type has been selected\n");
179 printk("note: to select ep80219 operation:\n");
180 printk("\t1/ specify \"force_ep80219\" on the kernel"
181 " command line\n");
182 printk("\t2/ update boot loader to pass"
183 " the ep80219 id: %d\n", MACH_TYPE_EP80219);
184 }
185 pci_common_init(&iq31244_pci);
186 }
187
188 return 0;
189 }
190
191 subsys_initcall(iq31244_pci_init);
192
193
194 /*
195 * IQ31244 machine initialisation.
196 */
197 static struct physmap_flash_data iq31244_flash_data = {
198 .width = 2,
199 };
200
201 static struct resource iq31244_flash_resource = {
202 .start = 0xf0000000,
203 .end = 0xf07fffff,
204 .flags = IORESOURCE_MEM,
205 };
206
207 static struct platform_device iq31244_flash_device = {
208 .name = "physmap-flash",
209 .id = 0,
210 .dev = {
211 .platform_data = &iq31244_flash_data,
212 },
213 .num_resources = 1,
214 .resource = &iq31244_flash_resource,
215 };
216
217 static struct plat_serial8250_port iq31244_serial_port[] = {
218 {
219 .mapbase = IQ31244_UART,
220 .membase = (char *)IQ31244_UART,
221 .irq = IRQ_IOP32X_XINT1,
222 .flags = UPF_SKIP_TEST,
223 .iotype = UPIO_MEM,
224 .regshift = 0,
225 .uartclk = 1843200,
226 },
227 { },
228 };
229
230 static struct resource iq31244_uart_resource = {
231 .start = IQ31244_UART,
232 .end = IQ31244_UART + 7,
233 .flags = IORESOURCE_MEM,
234 };
235
236 static struct platform_device iq31244_serial_device = {
237 .name = "serial8250",
238 .id = PLAT8250_DEV_PLATFORM,
239 .dev = {
240 .platform_data = iq31244_serial_port,
241 },
242 .num_resources = 1,
243 .resource = &iq31244_uart_resource,
244 };
245
246 /*
247 * This function will send a SHUTDOWN_COMPLETE message to the PIC
248 * controller over I2C. We are not using the i2c subsystem since
249 * we are going to power off and it may be removed
250 */
ep80219_power_off(void)251 void ep80219_power_off(void)
252 {
253 /*
254 * Send the Address byte w/ the start condition
255 */
256 *IOP3XX_IDBR1 = 0x60;
257 *IOP3XX_ICR1 = 0xE9;
258 mdelay(1);
259
260 /*
261 * Send the START_MSG byte w/ no start or stop condition
262 */
263 *IOP3XX_IDBR1 = 0x0F;
264 *IOP3XX_ICR1 = 0xE8;
265 mdelay(1);
266
267 /*
268 * Send the SHUTDOWN_COMPLETE Message ID byte w/ no start or
269 * stop condition
270 */
271 *IOP3XX_IDBR1 = 0x03;
272 *IOP3XX_ICR1 = 0xE8;
273 mdelay(1);
274
275 /*
276 * Send an ignored byte w/ stop condition
277 */
278 *IOP3XX_IDBR1 = 0x00;
279 *IOP3XX_ICR1 = 0xEA;
280
281 while (1)
282 ;
283 }
284
iq31244_init_machine(void)285 static void __init iq31244_init_machine(void)
286 {
287 register_iop32x_gpio();
288 platform_device_register(&iop3xx_i2c0_device);
289 platform_device_register(&iop3xx_i2c1_device);
290 platform_device_register(&iq31244_flash_device);
291 platform_device_register(&iq31244_serial_device);
292 platform_device_register(&iop3xx_dma_0_channel);
293 platform_device_register(&iop3xx_dma_1_channel);
294
295 if (is_ep80219())
296 pm_power_off = ep80219_power_off;
297
298 if (!is_80219())
299 platform_device_register(&iop3xx_aau_channel);
300 }
301
force_ep80219_setup(char * str)302 static int __init force_ep80219_setup(char *str)
303 {
304 force_ep80219 = 1;
305 return 1;
306 }
307
308 __setup("force_ep80219", force_ep80219_setup);
309
310 MACHINE_START(IQ31244, "Intel IQ31244")
311 /* Maintainer: Intel Corp. */
312 .atag_offset = 0x100,
313 .map_io = iq31244_map_io,
314 .init_irq = iop32x_init_irq,
315 .init_time = iq31244_timer_init,
316 .init_machine = iq31244_init_machine,
317 .restart = iop3xx_restart,
318 MACHINE_END
319
320 /* There should have been an ep80219 machine identifier from the beginning.
321 * Boot roms older than March 2007 do not know the ep80219 machine id. Pass
322 * "force_ep80219" on the kernel command line, otherwise iq31244 operation
323 * will be selected.
324 */
325 MACHINE_START(EP80219, "Intel EP80219")
326 /* Maintainer: Intel Corp. */
327 .atag_offset = 0x100,
328 .map_io = iq31244_map_io,
329 .init_irq = iop32x_init_irq,
330 .init_time = iq31244_timer_init,
331 .init_machine = iq31244_init_machine,
332 .restart = iop3xx_restart,
333 MACHINE_END
334
