1 /*
2  *  linux/arch/arm/kernel/smp.c
3  *
4  *  Copyright (C) 2002 ARM Limited, All Rights Reserved.
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/module.h>
11 #include <linux/delay.h>
12 #include <linux/init.h>
13 #include <linux/spinlock.h>
14 #include <linux/sched/mm.h>
15 #include <linux/sched/hotplug.h>
16 #include <linux/sched/task_stack.h>
17 #include <linux/interrupt.h>
18 #include <linux/cache.h>
19 #include <linux/profile.h>
20 #include <linux/errno.h>
21 #include <linux/mm.h>
22 #include <linux/err.h>
23 #include <linux/cpu.h>
24 #include <linux/seq_file.h>
25 #include <linux/irq.h>
26 #include <linux/nmi.h>
27 #include <linux/percpu.h>
28 #include <linux/clockchips.h>
29 #include <linux/completion.h>
30 #include <linux/cpufreq.h>
31 #include <linux/irq_work.h>
32 
33 #include <linux/atomic.h>
34 #include <asm/bugs.h>
35 #include <asm/smp.h>
36 #include <asm/cacheflush.h>
37 #include <asm/cpu.h>
38 #include <asm/cputype.h>
39 #include <asm/exception.h>
40 #include <asm/idmap.h>
41 #include <asm/topology.h>
42 #include <asm/mmu_context.h>
43 #include <asm/pgtable.h>
44 #include <asm/pgalloc.h>
45 #include <asm/processor.h>
46 #include <asm/sections.h>
47 #include <asm/tlbflush.h>
48 #include <asm/ptrace.h>
49 #include <asm/smp_plat.h>
50 #include <asm/virt.h>
51 #include <asm/mach/arch.h>
52 #include <asm/mpu.h>
53 
54 #define CREATE_TRACE_POINTS
55 #include <trace/events/ipi.h>
56 
57 /*
58  * as from 2.5, kernels no longer have an init_tasks structure
59  * so we need some other way of telling a new secondary core
60  * where to place its SVC stack
61  */
62 struct secondary_data secondary_data;
63 
64 /*
65  * control for which core is the next to come out of the secondary
66  * boot "holding pen"
67  */
68 volatile int pen_release = -1;
69 
70 enum ipi_msg_type {
71 	IPI_WAKEUP,
72 	IPI_TIMER,
73 	IPI_RESCHEDULE,
74 	IPI_CALL_FUNC,
75 	IPI_CPU_STOP,
76 	IPI_IRQ_WORK,
77 	IPI_COMPLETION,
78 	IPI_CPU_BACKTRACE,
79 	/*
80 	 * SGI8-15 can be reserved by secure firmware, and thus may
81 	 * not be usable by the kernel. Please keep the above limited
82 	 * to at most 8 entries.
83 	 */
84 };
85 
86 static DECLARE_COMPLETION(cpu_running);
87 
88 static struct smp_operations smp_ops __ro_after_init;
89 
smp_set_ops(const struct smp_operations * ops)90 void __init smp_set_ops(const struct smp_operations *ops)
91 {
92 	if (ops)
93 		smp_ops = *ops;
94 };
95 
get_arch_pgd(pgd_t * pgd)96 static unsigned long get_arch_pgd(pgd_t *pgd)
97 {
98 #ifdef CONFIG_ARM_LPAE
99 	return __phys_to_pfn(virt_to_phys(pgd));
100 #else
101 	return virt_to_phys(pgd);
102 #endif
103 }
104 
__cpu_up(unsigned int cpu,struct task_struct * idle)105 int __cpu_up(unsigned int cpu, struct task_struct *idle)
106 {
107 	int ret;
108 
109 	if (!smp_ops.smp_boot_secondary)
110 		return -ENOSYS;
111 
112 	/*
113 	 * We need to tell the secondary core where to find
114 	 * its stack and the page tables.
115 	 */
116 	secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
117 #ifdef CONFIG_ARM_MPU
118 	secondary_data.mpu_rgn_info = &mpu_rgn_info;
119 #endif
120 
121 #ifdef CONFIG_MMU
122 	secondary_data.pgdir = virt_to_phys(idmap_pgd);
123 	secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
124 #endif
125 	sync_cache_w(&secondary_data);
126 
127 	/*
128 	 * Now bring the CPU into our world.
129 	 */
130 	ret = smp_ops.smp_boot_secondary(cpu, idle);
131 	if (ret == 0) {
132 		/*
133 		 * CPU was successfully started, wait for it
134 		 * to come online or time out.
135 		 */
136 		wait_for_completion_timeout(&cpu_running,
137 						 msecs_to_jiffies(1000));
138 
139 		if (!cpu_online(cpu)) {
140 			pr_crit("CPU%u: failed to come online\n", cpu);
141 			ret = -EIO;
142 		}
143 	} else {
144 		pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
145 	}
146 
147 
148 	memset(&secondary_data, 0, sizeof(secondary_data));
149 	return ret;
150 }
151 
152 /* platform specific SMP operations */
smp_init_cpus(void)153 void __init smp_init_cpus(void)
154 {
155 	if (smp_ops.smp_init_cpus)
156 		smp_ops.smp_init_cpus();
157 }
158 
platform_can_secondary_boot(void)159 int platform_can_secondary_boot(void)
160 {
161 	return !!smp_ops.smp_boot_secondary;
162 }
163 
platform_can_cpu_hotplug(void)164 int platform_can_cpu_hotplug(void)
165 {
166 #ifdef CONFIG_HOTPLUG_CPU
167 	if (smp_ops.cpu_kill)
168 		return 1;
169 #endif
170 
171 	return 0;
172 }
173 
174 #ifdef CONFIG_HOTPLUG_CPU
platform_cpu_kill(unsigned int cpu)175 static int platform_cpu_kill(unsigned int cpu)
176 {
177 	if (smp_ops.cpu_kill)
178 		return smp_ops.cpu_kill(cpu);
179 	return 1;
180 }
181 
platform_cpu_disable(unsigned int cpu)182 static int platform_cpu_disable(unsigned int cpu)
183 {
184 	if (smp_ops.cpu_disable)
185 		return smp_ops.cpu_disable(cpu);
186 
187 	return 0;
188 }
189 
platform_can_hotplug_cpu(unsigned int cpu)190 int platform_can_hotplug_cpu(unsigned int cpu)
191 {
192 	/* cpu_die must be specified to support hotplug */
193 	if (!smp_ops.cpu_die)
194 		return 0;
195 
196 	if (smp_ops.cpu_can_disable)
197 		return smp_ops.cpu_can_disable(cpu);
198 
199 	/*
200 	 * By default, allow disabling all CPUs except the first one,
201 	 * since this is special on a lot of platforms, e.g. because
202 	 * of clock tick interrupts.
203 	 */
204 	return cpu != 0;
205 }
206 
207 /*
208  * __cpu_disable runs on the processor to be shutdown.
209  */
__cpu_disable(void)210 int __cpu_disable(void)
211 {
212 	unsigned int cpu = smp_processor_id();
213 	int ret;
214 
215 	ret = platform_cpu_disable(cpu);
216 	if (ret)
217 		return ret;
218 
219 	/*
220 	 * Take this CPU offline.  Once we clear this, we can't return,
221 	 * and we must not schedule until we're ready to give up the cpu.
222 	 */
223 	set_cpu_online(cpu, false);
224 
225 	/*
226 	 * OK - migrate IRQs away from this CPU
227 	 */
228 	migrate_irqs();
229 
230 	/*
231 	 * Flush user cache and TLB mappings, and then remove this CPU
232 	 * from the vm mask set of all processes.
233 	 *
234 	 * Caches are flushed to the Level of Unification Inner Shareable
235 	 * to write-back dirty lines to unified caches shared by all CPUs.
236 	 */
237 	flush_cache_louis();
238 	local_flush_tlb_all();
239 
240 	return 0;
241 }
242 
243 static DECLARE_COMPLETION(cpu_died);
244 
245 /*
246  * called on the thread which is asking for a CPU to be shutdown -
247  * waits until shutdown has completed, or it is timed out.
248  */
__cpu_die(unsigned int cpu)249 void __cpu_die(unsigned int cpu)
250 {
251 	if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
252 		pr_err("CPU%u: cpu didn't die\n", cpu);
253 		return;
254 	}
255 	pr_debug("CPU%u: shutdown\n", cpu);
256 
257 	clear_tasks_mm_cpumask(cpu);
258 	/*
259 	 * platform_cpu_kill() is generally expected to do the powering off
260 	 * and/or cutting of clocks to the dying CPU.  Optionally, this may
261 	 * be done by the CPU which is dying in preference to supporting
262 	 * this call, but that means there is _no_ synchronisation between
263 	 * the requesting CPU and the dying CPU actually losing power.
264 	 */
265 	if (!platform_cpu_kill(cpu))
266 		pr_err("CPU%u: unable to kill\n", cpu);
267 }
268 
269 /*
270  * Called from the idle thread for the CPU which has been shutdown.
271  *
272  * Note that we disable IRQs here, but do not re-enable them
273  * before returning to the caller. This is also the behaviour
274  * of the other hotplug-cpu capable cores, so presumably coming
275  * out of idle fixes this.
276  */
arch_cpu_idle_dead(void)277 void arch_cpu_idle_dead(void)
278 {
279 	unsigned int cpu = smp_processor_id();
280 
281 	idle_task_exit();
282 
283 	local_irq_disable();
284 
285 	/*
286 	 * Flush the data out of the L1 cache for this CPU.  This must be
287 	 * before the completion to ensure that data is safely written out
288 	 * before platform_cpu_kill() gets called - which may disable
289 	 * *this* CPU and power down its cache.
290 	 */
291 	flush_cache_louis();
292 
293 	/*
294 	 * Tell __cpu_die() that this CPU is now safe to dispose of.  Once
295 	 * this returns, power and/or clocks can be removed at any point
296 	 * from this CPU and its cache by platform_cpu_kill().
297 	 */
298 	complete(&cpu_died);
299 
300 	/*
301 	 * Ensure that the cache lines associated with that completion are
302 	 * written out.  This covers the case where _this_ CPU is doing the
303 	 * powering down, to ensure that the completion is visible to the
304 	 * CPU waiting for this one.
305 	 */
306 	flush_cache_louis();
307 
308 	/*
309 	 * The actual CPU shutdown procedure is at least platform (if not
310 	 * CPU) specific.  This may remove power, or it may simply spin.
311 	 *
312 	 * Platforms are generally expected *NOT* to return from this call,
313 	 * although there are some which do because they have no way to
314 	 * power down the CPU.  These platforms are the _only_ reason we
315 	 * have a return path which uses the fragment of assembly below.
316 	 *
317 	 * The return path should not be used for platforms which can
318 	 * power off the CPU.
319 	 */
320 	if (smp_ops.cpu_die)
321 		smp_ops.cpu_die(cpu);
322 
323 	pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
324 		cpu);
325 
326 	/*
327 	 * Do not return to the idle loop - jump back to the secondary
328 	 * cpu initialisation.  There's some initialisation which needs
329 	 * to be repeated to undo the effects of taking the CPU offline.
330 	 */
331 	__asm__("mov	sp, %0\n"
332 	"	mov	fp, #0\n"
333 	"	b	secondary_start_kernel"
334 		:
335 		: "r" (task_stack_page(current) + THREAD_SIZE - 8));
336 }
337 #endif /* CONFIG_HOTPLUG_CPU */
338 
339 /*
340  * Called by both boot and secondaries to move global data into
341  * per-processor storage.
342  */
smp_store_cpu_info(unsigned int cpuid)343 static void smp_store_cpu_info(unsigned int cpuid)
344 {
345 	struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
346 
347 	cpu_info->loops_per_jiffy = loops_per_jiffy;
348 	cpu_info->cpuid = read_cpuid_id();
349 
350 	store_cpu_topology(cpuid);
351 }
352 
353 /*
354  * This is the secondary CPU boot entry.  We're using this CPUs
355  * idle thread stack, but a set of temporary page tables.
356  */
secondary_start_kernel(void)357 asmlinkage void secondary_start_kernel(void)
358 {
359 	struct mm_struct *mm = &init_mm;
360 	unsigned int cpu;
361 
362 	/*
363 	 * The identity mapping is uncached (strongly ordered), so
364 	 * switch away from it before attempting any exclusive accesses.
365 	 */
366 	cpu_switch_mm(mm->pgd, mm);
367 	local_flush_bp_all();
368 	enter_lazy_tlb(mm, current);
369 	local_flush_tlb_all();
370 
371 	/*
372 	 * All kernel threads share the same mm context; grab a
373 	 * reference and switch to it.
374 	 */
375 	cpu = smp_processor_id();
376 	mmgrab(mm);
377 	current->active_mm = mm;
378 	cpumask_set_cpu(cpu, mm_cpumask(mm));
379 
380 	cpu_init();
381 
382 #ifndef CONFIG_MMU
383 	setup_vectors_base();
384 #endif
385 	pr_debug("CPU%u: Booted secondary processor\n", cpu);
386 
387 	preempt_disable();
388 	trace_hardirqs_off();
389 
390 	/*
391 	 * Give the platform a chance to do its own initialisation.
392 	 */
393 	if (smp_ops.smp_secondary_init)
394 		smp_ops.smp_secondary_init(cpu);
395 
396 	notify_cpu_starting(cpu);
397 
398 	calibrate_delay();
399 
400 	smp_store_cpu_info(cpu);
401 
402 	/*
403 	 * OK, now it's safe to let the boot CPU continue.  Wait for
404 	 * the CPU migration code to notice that the CPU is online
405 	 * before we continue - which happens after __cpu_up returns.
406 	 */
407 	set_cpu_online(cpu, true);
408 
409 	check_other_bugs();
410 
411 	complete(&cpu_running);
412 
413 	local_irq_enable();
414 	local_fiq_enable();
415 	local_abt_enable();
416 
417 	/*
418 	 * OK, it's off to the idle thread for us
419 	 */
420 	cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
421 }
422 
smp_cpus_done(unsigned int max_cpus)423 void __init smp_cpus_done(unsigned int max_cpus)
424 {
425 	int cpu;
426 	unsigned long bogosum = 0;
427 
428 	for_each_online_cpu(cpu)
429 		bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
430 
431 	printk(KERN_INFO "SMP: Total of %d processors activated "
432 	       "(%lu.%02lu BogoMIPS).\n",
433 	       num_online_cpus(),
434 	       bogosum / (500000/HZ),
435 	       (bogosum / (5000/HZ)) % 100);
436 
437 	hyp_mode_check();
438 }
439 
smp_prepare_boot_cpu(void)440 void __init smp_prepare_boot_cpu(void)
441 {
442 	set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
443 }
444 
smp_prepare_cpus(unsigned int max_cpus)445 void __init smp_prepare_cpus(unsigned int max_cpus)
446 {
447 	unsigned int ncores = num_possible_cpus();
448 
449 	init_cpu_topology();
450 
451 	smp_store_cpu_info(smp_processor_id());
452 
453 	/*
454 	 * are we trying to boot more cores than exist?
455 	 */
456 	if (max_cpus > ncores)
457 		max_cpus = ncores;
458 	if (ncores > 1 && max_cpus) {
459 		/*
460 		 * Initialise the present map, which describes the set of CPUs
461 		 * actually populated at the present time. A platform should
462 		 * re-initialize the map in the platforms smp_prepare_cpus()
463 		 * if present != possible (e.g. physical hotplug).
464 		 */
465 		init_cpu_present(cpu_possible_mask);
466 
467 		/*
468 		 * Initialise the SCU if there are more than one CPU
469 		 * and let them know where to start.
470 		 */
471 		if (smp_ops.smp_prepare_cpus)
472 			smp_ops.smp_prepare_cpus(max_cpus);
473 	}
474 }
475 
476 static void (*__smp_cross_call)(const struct cpumask *, unsigned int);
477 
set_smp_cross_call(void (* fn)(const struct cpumask *,unsigned int))478 void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
479 {
480 	if (!__smp_cross_call)
481 		__smp_cross_call = fn;
482 }
483 
484 static const char *ipi_types[NR_IPI] __tracepoint_string = {
485 #define S(x,s)	[x] = s
486 	S(IPI_WAKEUP, "CPU wakeup interrupts"),
487 	S(IPI_TIMER, "Timer broadcast interrupts"),
488 	S(IPI_RESCHEDULE, "Rescheduling interrupts"),
489 	S(IPI_CALL_FUNC, "Function call interrupts"),
490 	S(IPI_CPU_STOP, "CPU stop interrupts"),
491 	S(IPI_IRQ_WORK, "IRQ work interrupts"),
492 	S(IPI_COMPLETION, "completion interrupts"),
493 };
494 
smp_cross_call(const struct cpumask * target,unsigned int ipinr)495 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
496 {
497 	trace_ipi_raise_rcuidle(target, ipi_types[ipinr]);
498 	__smp_cross_call(target, ipinr);
499 }
500 
show_ipi_list(struct seq_file * p,int prec)501 void show_ipi_list(struct seq_file *p, int prec)
502 {
503 	unsigned int cpu, i;
504 
505 	for (i = 0; i < NR_IPI; i++) {
506 		seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
507 
508 		for_each_online_cpu(cpu)
509 			seq_printf(p, "%10u ",
510 				   __get_irq_stat(cpu, ipi_irqs[i]));
511 
512 		seq_printf(p, " %s\n", ipi_types[i]);
513 	}
514 }
515 
smp_irq_stat_cpu(unsigned int cpu)516 u64 smp_irq_stat_cpu(unsigned int cpu)
517 {
518 	u64 sum = 0;
519 	int i;
520 
521 	for (i = 0; i < NR_IPI; i++)
522 		sum += __get_irq_stat(cpu, ipi_irqs[i]);
523 
524 	return sum;
525 }
526 
arch_send_call_function_ipi_mask(const struct cpumask * mask)527 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
528 {
529 	smp_cross_call(mask, IPI_CALL_FUNC);
530 }
531 
arch_send_wakeup_ipi_mask(const struct cpumask * mask)532 void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
533 {
534 	smp_cross_call(mask, IPI_WAKEUP);
535 }
536 
arch_send_call_function_single_ipi(int cpu)537 void arch_send_call_function_single_ipi(int cpu)
538 {
539 	smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
540 }
541 
542 #ifdef CONFIG_IRQ_WORK
arch_irq_work_raise(void)543 void arch_irq_work_raise(void)
544 {
545 	if (arch_irq_work_has_interrupt())
546 		smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
547 }
548 #endif
549 
550 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
tick_broadcast(const struct cpumask * mask)551 void tick_broadcast(const struct cpumask *mask)
552 {
553 	smp_cross_call(mask, IPI_TIMER);
554 }
555 #endif
556 
557 static DEFINE_RAW_SPINLOCK(stop_lock);
558 
559 /*
560  * ipi_cpu_stop - handle IPI from smp_send_stop()
561  */
ipi_cpu_stop(unsigned int cpu)562 static void ipi_cpu_stop(unsigned int cpu)
563 {
564 	if (system_state <= SYSTEM_RUNNING) {
565 		raw_spin_lock(&stop_lock);
566 		pr_crit("CPU%u: stopping\n", cpu);
567 		dump_stack();
568 		raw_spin_unlock(&stop_lock);
569 	}
570 
571 	set_cpu_online(cpu, false);
572 
573 	local_fiq_disable();
574 	local_irq_disable();
575 
576 	while (1)
577 		cpu_relax();
578 }
579 
580 static DEFINE_PER_CPU(struct completion *, cpu_completion);
581 
register_ipi_completion(struct completion * completion,int cpu)582 int register_ipi_completion(struct completion *completion, int cpu)
583 {
584 	per_cpu(cpu_completion, cpu) = completion;
585 	return IPI_COMPLETION;
586 }
587 
ipi_complete(unsigned int cpu)588 static void ipi_complete(unsigned int cpu)
589 {
590 	complete(per_cpu(cpu_completion, cpu));
591 }
592 
593 /*
594  * Main handler for inter-processor interrupts
595  */
do_IPI(int ipinr,struct pt_regs * regs)596 asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
597 {
598 	handle_IPI(ipinr, regs);
599 }
600 
handle_IPI(int ipinr,struct pt_regs * regs)601 void handle_IPI(int ipinr, struct pt_regs *regs)
602 {
603 	unsigned int cpu = smp_processor_id();
604 	struct pt_regs *old_regs = set_irq_regs(regs);
605 
606 	if ((unsigned)ipinr < NR_IPI) {
607 		trace_ipi_entry_rcuidle(ipi_types[ipinr]);
608 		__inc_irq_stat(cpu, ipi_irqs[ipinr]);
609 	}
610 
611 	switch (ipinr) {
612 	case IPI_WAKEUP:
613 		break;
614 
615 #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
616 	case IPI_TIMER:
617 		irq_enter();
618 		tick_receive_broadcast();
619 		irq_exit();
620 		break;
621 #endif
622 
623 	case IPI_RESCHEDULE:
624 		scheduler_ipi();
625 		break;
626 
627 	case IPI_CALL_FUNC:
628 		irq_enter();
629 		generic_smp_call_function_interrupt();
630 		irq_exit();
631 		break;
632 
633 	case IPI_CPU_STOP:
634 		irq_enter();
635 		ipi_cpu_stop(cpu);
636 		irq_exit();
637 		break;
638 
639 #ifdef CONFIG_IRQ_WORK
640 	case IPI_IRQ_WORK:
641 		irq_enter();
642 		irq_work_run();
643 		irq_exit();
644 		break;
645 #endif
646 
647 	case IPI_COMPLETION:
648 		irq_enter();
649 		ipi_complete(cpu);
650 		irq_exit();
651 		break;
652 
653 	case IPI_CPU_BACKTRACE:
654 		printk_nmi_enter();
655 		irq_enter();
656 		nmi_cpu_backtrace(regs);
657 		irq_exit();
658 		printk_nmi_exit();
659 		break;
660 
661 	default:
662 		pr_crit("CPU%u: Unknown IPI message 0x%x\n",
663 		        cpu, ipinr);
664 		break;
665 	}
666 
667 	if ((unsigned)ipinr < NR_IPI)
668 		trace_ipi_exit_rcuidle(ipi_types[ipinr]);
669 	set_irq_regs(old_regs);
670 }
671 
smp_send_reschedule(int cpu)672 void smp_send_reschedule(int cpu)
673 {
674 	smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
675 }
676 
smp_send_stop(void)677 void smp_send_stop(void)
678 {
679 	unsigned long timeout;
680 	struct cpumask mask;
681 
682 	cpumask_copy(&mask, cpu_online_mask);
683 	cpumask_clear_cpu(smp_processor_id(), &mask);
684 	if (!cpumask_empty(&mask))
685 		smp_cross_call(&mask, IPI_CPU_STOP);
686 
687 	/* Wait up to one second for other CPUs to stop */
688 	timeout = USEC_PER_SEC;
689 	while (num_online_cpus() > 1 && timeout--)
690 		udelay(1);
691 
692 	if (num_online_cpus() > 1)
693 		pr_warn("SMP: failed to stop secondary CPUs\n");
694 }
695 
696 /*
697  * not supported here
698  */
setup_profiling_timer(unsigned int multiplier)699 int setup_profiling_timer(unsigned int multiplier)
700 {
701 	return -EINVAL;
702 }
703 
704 #ifdef CONFIG_CPU_FREQ
705 
706 static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
707 static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
708 static unsigned long global_l_p_j_ref;
709 static unsigned long global_l_p_j_ref_freq;
710 
cpufreq_callback(struct notifier_block * nb,unsigned long val,void * data)711 static int cpufreq_callback(struct notifier_block *nb,
712 					unsigned long val, void *data)
713 {
714 	struct cpufreq_freqs *freq = data;
715 	int cpu = freq->cpu;
716 
717 	if (freq->flags & CPUFREQ_CONST_LOOPS)
718 		return NOTIFY_OK;
719 
720 	if (!per_cpu(l_p_j_ref, cpu)) {
721 		per_cpu(l_p_j_ref, cpu) =
722 			per_cpu(cpu_data, cpu).loops_per_jiffy;
723 		per_cpu(l_p_j_ref_freq, cpu) = freq->old;
724 		if (!global_l_p_j_ref) {
725 			global_l_p_j_ref = loops_per_jiffy;
726 			global_l_p_j_ref_freq = freq->old;
727 		}
728 	}
729 
730 	if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
731 	    (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
732 		loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
733 						global_l_p_j_ref_freq,
734 						freq->new);
735 		per_cpu(cpu_data, cpu).loops_per_jiffy =
736 			cpufreq_scale(per_cpu(l_p_j_ref, cpu),
737 					per_cpu(l_p_j_ref_freq, cpu),
738 					freq->new);
739 	}
740 	return NOTIFY_OK;
741 }
742 
743 static struct notifier_block cpufreq_notifier = {
744 	.notifier_call  = cpufreq_callback,
745 };
746 
register_cpufreq_notifier(void)747 static int __init register_cpufreq_notifier(void)
748 {
749 	return cpufreq_register_notifier(&cpufreq_notifier,
750 						CPUFREQ_TRANSITION_NOTIFIER);
751 }
752 core_initcall(register_cpufreq_notifier);
753 
754 #endif
755 
raise_nmi(cpumask_t * mask)756 static void raise_nmi(cpumask_t *mask)
757 {
758 	smp_cross_call(mask, IPI_CPU_BACKTRACE);
759 }
760 
arch_trigger_cpumask_backtrace(const cpumask_t * mask,bool exclude_self)761 void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
762 {
763 	nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_nmi);
764 }
765