1// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2// Copyright 2021 Jonathan Neuschäfer
3
4#include <dt-bindings/interrupt-controller/irq.h>
5
6/ {
7	compatible = "nuvoton,wpcm450";
8	#address-cells = <1>;
9	#size-cells = <1>;
10
11	aliases {
12		gpio0 = &gpio0;
13		gpio1 = &gpio1;
14		gpio2 = &gpio2;
15		gpio3 = &gpio3;
16		gpio4 = &gpio4;
17		gpio5 = &gpio5;
18		gpio6 = &gpio6;
19		gpio7 = &gpio7;
20	};
21
22	cpus {
23		#address-cells = <1>;
24		#size-cells = <0>;
25
26		cpu@0 {
27			compatible = "arm,arm926ej-s";
28			device_type = "cpu";
29			reg = <0>;
30		};
31	};
32
33	clk24m: clock-24mhz {
34		/* 24 MHz dummy clock */
35		compatible = "fixed-clock";
36		clock-frequency = <24000000>;
37		#clock-cells = <0>;
38	};
39
40	soc {
41		compatible = "simple-bus";
42		#address-cells = <1>;
43		#size-cells = <1>;
44		interrupt-parent = <&aic>;
45		ranges;
46
47		gcr: syscon@b0000000 {
48			compatible = "nuvoton,wpcm450-gcr", "syscon", "simple-mfd";
49			reg = <0xb0000000 0x200>;
50		};
51
52		serial0: serial@b8000000 {
53			compatible = "nuvoton,wpcm450-uart";
54			reg = <0xb8000000 0x20>;
55			reg-shift = <2>;
56			interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
57			clocks = <&clk24m>;
58			pinctrl-names = "default";
59			pinctrl-0 = <&bsp_pins>;
60			status = "disabled";
61		};
62
63		serial1: serial@b8000100 {
64			compatible = "nuvoton,wpcm450-uart";
65			reg = <0xb8000100 0x20>;
66			reg-shift = <2>;
67			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
68			clocks = <&clk24m>;
69			status = "disabled";
70		};
71
72		timer0: timer@b8001000 {
73			compatible = "nuvoton,wpcm450-timer";
74			interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
75			reg = <0xb8001000 0x1c>;
76			clocks = <&clk24m>;
77		};
78
79		watchdog0: watchdog@b800101c {
80			compatible = "nuvoton,wpcm450-wdt";
81			interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
82			reg = <0xb800101c 0x4>;
83			clocks = <&clk24m>;
84			status = "disabled";
85		};
86
87		aic: interrupt-controller@b8002000 {
88			compatible = "nuvoton,wpcm450-aic";
89			reg = <0xb8002000 0x1000>;
90			interrupt-controller;
91			#interrupt-cells = <2>;
92		};
93
94		pinctrl: pinctrl@b8003000 {
95			compatible = "nuvoton,wpcm450-pinctrl";
96			reg = <0xb8003000 0x1000>;
97			#address-cells = <1>;
98			#size-cells = <0>;
99
100			gpio0: gpio@0 {
101				reg = <0>;
102				gpio-controller;
103				#gpio-cells = <2>;
104				interrupts = <2 IRQ_TYPE_LEVEL_HIGH>,
105					     <3 IRQ_TYPE_LEVEL_HIGH>,
106					     <4 IRQ_TYPE_LEVEL_HIGH>;
107				interrupt-controller;
108			};
109
110			gpio1: gpio@1 {
111				reg = <1>;
112				gpio-controller;
113				#gpio-cells = <2>;
114				interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
115				interrupt-controller;
116			};
117
118			gpio2: gpio@2 {
119				reg = <2>;
120				gpio-controller;
121				#gpio-cells = <2>;
122			};
123
124			gpio3: gpio@3 {
125				reg = <3>;
126				gpio-controller;
127				#gpio-cells = <2>;
128			};
129
130			gpio4: gpio@4 {
131				reg = <4>;
132				gpio-controller;
133				#gpio-cells = <2>;
134			};
135
136			gpio5: gpio@5 {
137				reg = <5>;
138				gpio-controller;
139				#gpio-cells = <2>;
140			};
141
142			gpio6: gpio@6 {
143				reg = <6>;
144				gpio-controller;
145				#gpio-cells = <2>;
146			};
147
148			gpio7: gpio@7 {
149				reg = <7>;
150				gpio-controller;
151				#gpio-cells = <2>;
152			};
153
154			smb3_pins: mux-smb3 {
155				groups = "smb3";
156				function = "smb3";
157			};
158
159			smb4_pins: mux-smb4 {
160				groups = "smb4";
161				function = "smb4";
162			};
163
164			smb5_pins: mux-smb5 {
165				groups = "smb5";
166				function = "smb5";
167			};
168
169			scs1_pins: mux-scs1 {
170				groups = "scs1";
171				function = "scs1";
172			};
173
174			scs2_pins: mux-scs2 {
175				groups = "scs2";
176				function = "scs2";
177			};
178
179			scs3_pins: mux-scs3 {
180				groups = "scs3";
181				function = "scs3";
182			};
183
184			smb0_pins: mux-smb0 {
185				groups = "smb0";
186				function = "smb0";
187			};
188
189			smb1_pins: mux-smb1 {
190				groups = "smb1";
191				function = "smb1";
192			};
193
194			smb2_pins: mux-smb2 {
195				groups = "smb2";
196				function = "smb2";
197			};
198
199			bsp_pins: mux-bsp {
200				groups = "bsp";
201				function = "bsp";
202			};
203
204			hsp1_pins: mux-hsp1 {
205				groups = "hsp1";
206				function = "hsp1";
207			};
208
209			hsp2_pins: mux-hsp2 {
210				groups = "hsp2";
211				function = "hsp2";
212			};
213
214			r1err_pins: mux-r1err {
215				groups = "r1err";
216				function = "r1err";
217			};
218
219			r1md_pins: mux-r1md {
220				groups = "r1md";
221				function = "r1md";
222			};
223
224			rmii2_pins: mux-rmii2 {
225				groups = "rmii2";
226				function = "rmii2";
227			};
228
229			r2err_pins: mux-r2err {
230				groups = "r2err";
231				function = "r2err";
232			};
233
234			r2md_pins: mux-r2md {
235				groups = "r2md";
236				function = "r2md";
237			};
238
239			kbcc_pins: mux-kbcc {
240				groups = "kbcc";
241				function = "kbcc";
242			};
243
244			dvo0_pins: mux-dvo0 {
245				groups = "dvo";
246				function = "dvo0";
247			};
248
249			dvo3_pins: mux-dvo3 {
250				groups = "dvo";
251				function = "dvo3";
252			};
253
254			clko_pins: mux-clko {
255				groups = "clko";
256				function = "clko";
257			};
258
259			smi_pins: mux-smi {
260				groups = "smi";
261				function = "smi";
262			};
263
264			uinc_pins: mux-uinc {
265				groups = "uinc";
266				function = "uinc";
267			};
268
269			gspi_pins: mux-gspi {
270				groups = "gspi";
271				function = "gspi";
272			};
273
274			mben_pins: mux-mben {
275				groups = "mben";
276				function = "mben";
277			};
278
279			xcs2_pins: mux-xcs2 {
280				groups = "xcs2";
281				function = "xcs2";
282			};
283
284			xcs1_pins: mux-xcs1 {
285				groups = "xcs1";
286				function = "xcs1";
287			};
288
289			sdio_pins: mux-sdio {
290				groups = "sdio";
291				function = "sdio";
292			};
293
294			sspi_pins: mux-sspi {
295				groups = "sspi";
296				function = "sspi";
297			};
298
299			fi0_pins: mux-fi0 {
300				groups = "fi0";
301				function = "fi0";
302			};
303
304			fi1_pins: mux-fi1 {
305				groups = "fi1";
306				function = "fi1";
307			};
308
309			fi2_pins: mux-fi2 {
310				groups = "fi2";
311				function = "fi2";
312			};
313
314			fi3_pins: mux-fi3 {
315				groups = "fi3";
316				function = "fi3";
317			};
318
319			fi4_pins: mux-fi4 {
320				groups = "fi4";
321				function = "fi4";
322			};
323
324			fi5_pins: mux-fi5 {
325				groups = "fi5";
326				function = "fi5";
327			};
328
329			fi6_pins: mux-fi6 {
330				groups = "fi6";
331				function = "fi6";
332			};
333
334			fi7_pins: mux-fi7 {
335				groups = "fi7";
336				function = "fi7";
337			};
338
339			fi8_pins: mux-fi8 {
340				groups = "fi8";
341				function = "fi8";
342			};
343
344			fi9_pins: mux-fi9 {
345				groups = "fi9";
346				function = "fi9";
347			};
348
349			fi10_pins: mux-fi10 {
350				groups = "fi10";
351				function = "fi10";
352			};
353
354			fi11_pins: mux-fi11 {
355				groups = "fi11";
356				function = "fi11";
357			};
358
359			fi12_pins: mux-fi12 {
360				groups = "fi12";
361				function = "fi12";
362			};
363
364			fi13_pins: mux-fi13 {
365				groups = "fi13";
366				function = "fi13";
367			};
368
369			fi14_pins: mux-fi14 {
370				groups = "fi14";
371				function = "fi14";
372			};
373
374			fi15_pins: mux-fi15 {
375				groups = "fi15";
376				function = "fi15";
377			};
378
379			pwm0_pins: mux-pwm0 {
380				groups = "pwm0";
381				function = "pwm0";
382			};
383
384			pwm1_pins: mux-pwm1 {
385				groups = "pwm1";
386				function = "pwm1";
387			};
388
389			pwm2_pins: mux-pwm2 {
390				groups = "pwm2";
391				function = "pwm2";
392			};
393
394			pwm3_pins: mux-pwm3 {
395				groups = "pwm3";
396				function = "pwm3";
397			};
398
399			pwm4_pins: mux-pwm4 {
400				groups = "pwm4";
401				function = "pwm4";
402			};
403
404			pwm5_pins: mux-pwm5 {
405				groups = "pwm5";
406				function = "pwm5";
407			};
408
409			pwm6_pins: mux-pwm6 {
410				groups = "pwm6";
411				function = "pwm6";
412			};
413
414			pwm7_pins: mux-pwm7 {
415				groups = "pwm7";
416				function = "pwm7";
417			};
418
419			hg0_pins: mux-hg0 {
420				groups = "hg0";
421				function = "hg0";
422			};
423
424			hg1_pins: mux-hg1 {
425				groups = "hg1";
426				function = "hg1";
427			};
428
429			hg2_pins: mux-hg2 {
430				groups = "hg2";
431				function = "hg2";
432			};
433
434			hg3_pins: mux-hg3 {
435				groups = "hg3";
436				function = "hg3";
437			};
438
439			hg4_pins: mux-hg4 {
440				groups = "hg4";
441				function = "hg4";
442			};
443
444			hg5_pins: mux-hg5 {
445				groups = "hg5";
446				function = "hg5";
447			};
448
449			hg6_pins: mux-hg6 {
450				groups = "hg6";
451				function = "hg6";
452			};
453
454			hg7_pins: mux-hg7 {
455				groups = "hg7";
456				function = "hg7";
457			};
458		};
459	};
460};
461