1Overview of Linux kernel SPI support 2==================================== 3 402-Feb-2012 5 6What is SPI? 7------------ 8The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial 9link used to connect microcontrollers to sensors, memory, and peripherals. 10It's a simple "de facto" standard, not complicated enough to acquire a 11standardization body. SPI uses a master/slave configuration. 12 13The three signal wires hold a clock (SCK, often on the order of 10 MHz), 14and parallel data lines with "Master Out, Slave In" (MOSI) or "Master In, 15Slave Out" (MISO) signals. (Other names are also used.) There are four 16clocking modes through which data is exchanged; mode-0 and mode-3 are most 17commonly used. Each clock cycle shifts data out and data in; the clock 18doesn't cycle except when there is a data bit to shift. Not all data bits 19are used though; not every protocol uses those full duplex capabilities. 20 21SPI masters use a fourth "chip select" line to activate a given SPI slave 22device, so those three signal wires may be connected to several chips 23in parallel. All SPI slaves support chipselects; they are usually active 24low signals, labeled nCSx for slave 'x' (e.g. nCS0). Some devices have 25other signals, often including an interrupt to the master. 26 27Unlike serial busses like USB or SMBus, even low level protocols for 28SPI slave functions are usually not interoperable between vendors 29(except for commodities like SPI memory chips). 30 31 - SPI may be used for request/response style device protocols, as with 32 touchscreen sensors and memory chips. 33 34 - It may also be used to stream data in either direction (half duplex), 35 or both of them at the same time (full duplex). 36 37 - Some devices may use eight bit words. Others may use different word 38 lengths, such as streams of 12-bit or 20-bit digital samples. 39 40 - Words are usually sent with their most significant bit (MSB) first, 41 but sometimes the least significant bit (LSB) goes first instead. 42 43 - Sometimes SPI is used to daisy-chain devices, like shift registers. 44 45In the same way, SPI slaves will only rarely support any kind of automatic 46discovery/enumeration protocol. The tree of slave devices accessible from 47a given SPI master will normally be set up manually, with configuration 48tables. 49 50SPI is only one of the names used by such four-wire protocols, and 51most controllers have no problem handling "MicroWire" (think of it as 52half-duplex SPI, for request/response protocols), SSP ("Synchronous 53Serial Protocol"), PSP ("Programmable Serial Protocol"), and other 54related protocols. 55 56Some chips eliminate a signal line by combining MOSI and MISO, and 57limiting themselves to half-duplex at the hardware level. In fact 58some SPI chips have this signal mode as a strapping option. These 59can be accessed using the same programming interface as SPI, but of 60course they won't handle full duplex transfers. You may find such 61chips described as using "three wire" signaling: SCK, data, nCSx. 62(That data line is sometimes called MOMI or SISO.) 63 64Microcontrollers often support both master and slave sides of the SPI 65protocol. This document (and Linux) supports both the master and slave 66sides of SPI interactions. 67 68 69Who uses it? On what kinds of systems? 70--------------------------------------- 71Linux developers using SPI are probably writing device drivers for embedded 72systems boards. SPI is used to control external chips, and it is also a 73protocol supported by every MMC or SD memory card. (The older "DataFlash" 74cards, predating MMC cards but using the same connectors and card shape, 75support only SPI.) Some PC hardware uses SPI flash for BIOS code. 76 77SPI slave chips range from digital/analog converters used for analog 78sensors and codecs, to memory, to peripherals like USB controllers 79or Ethernet adapters; and more. 80 81Most systems using SPI will integrate a few devices on a mainboard. 82Some provide SPI links on expansion connectors; in cases where no 83dedicated SPI controller exists, GPIO pins can be used to create a 84low speed "bitbanging" adapter. Very few systems will "hotplug" an SPI 85controller; the reasons to use SPI focus on low cost and simple operation, 86and if dynamic reconfiguration is important, USB will often be a more 87appropriate low-pincount peripheral bus. 88 89Many microcontrollers that can run Linux integrate one or more I/O 90interfaces with SPI modes. Given SPI support, they could use MMC or SD 91cards without needing a special purpose MMC/SD/SDIO controller. 92 93 94I'm confused. What are these four SPI "clock modes"? 95----------------------------------------------------- 96It's easy to be confused here, and the vendor documentation you'll 97find isn't necessarily helpful. The four modes combine two mode bits: 98 99 - CPOL indicates the initial clock polarity. CPOL=0 means the 100 clock starts low, so the first (leading) edge is rising, and 101 the second (trailing) edge is falling. CPOL=1 means the clock 102 starts high, so the first (leading) edge is falling. 103 104 - CPHA indicates the clock phase used to sample data; CPHA=0 says 105 sample on the leading edge, CPHA=1 means the trailing edge. 106 107 Since the signal needs to stablize before it's sampled, CPHA=0 108 implies that its data is written half a clock before the first 109 clock edge. The chipselect may have made it become available. 110 111Chip specs won't always say "uses SPI mode X" in as many words, 112but their timing diagrams will make the CPOL and CPHA modes clear. 113 114In the SPI mode number, CPOL is the high order bit and CPHA is the 115low order bit. So when a chip's timing diagram shows the clock 116starting low (CPOL=0) and data stabilized for sampling during the 117trailing clock edge (CPHA=1), that's SPI mode 1. 118 119Note that the clock mode is relevant as soon as the chipselect goes 120active. So the master must set the clock to inactive before selecting 121a slave, and the slave can tell the chosen polarity by sampling the 122clock level when its select line goes active. That's why many devices 123support for example both modes 0 and 3: they don't care about polarity, 124and always clock data in/out on rising clock edges. 125 126 127How do these driver programming interfaces work? 128------------------------------------------------ 129The <linux/spi/spi.h> header file includes kerneldoc, as does the 130main source code, and you should certainly read that chapter of the 131kernel API document. This is just an overview, so you get the big 132picture before those details. 133 134SPI requests always go into I/O queues. Requests for a given SPI device 135are always executed in FIFO order, and complete asynchronously through 136completion callbacks. There are also some simple synchronous wrappers 137for those calls, including ones for common transaction types like writing 138a command and then reading its response. 139 140There are two types of SPI driver, here called: 141 142 Controller drivers ... controllers may be built into System-On-Chip 143 processors, and often support both Master and Slave roles. 144 These drivers touch hardware registers and may use DMA. 145 Or they can be PIO bitbangers, needing just GPIO pins. 146 147 Protocol drivers ... these pass messages through the controller 148 driver to communicate with a Slave or Master device on the 149 other side of an SPI link. 150 151So for example one protocol driver might talk to the MTD layer to export 152data to filesystems stored on SPI flash like DataFlash; and others might 153control audio interfaces, present touchscreen sensors as input interfaces, 154or monitor temperature and voltage levels during industrial processing. 155And those might all be sharing the same controller driver. 156 157A "struct spi_device" encapsulates the controller-side interface between 158those two types of drivers. 159 160There is a minimal core of SPI programming interfaces, focussing on 161using the driver model to connect controller and protocol drivers using 162device tables provided by board specific initialization code. SPI 163shows up in sysfs in several locations: 164 165 /sys/devices/.../CTLR ... physical node for a given SPI controller 166 167 /sys/devices/.../CTLR/spiB.C ... spi_device on bus "B", 168 chipselect C, accessed through CTLR. 169 170 /sys/bus/spi/devices/spiB.C ... symlink to that physical 171 .../CTLR/spiB.C device 172 173 /sys/devices/.../CTLR/spiB.C/modalias ... identifies the driver 174 that should be used with this device (for hotplug/coldplug) 175 176 /sys/bus/spi/drivers/D ... driver for one or more spi*.* devices 177 178 /sys/class/spi_master/spiB ... symlink (or actual device node) to 179 a logical node which could hold class related state for the SPI 180 master controller managing bus "B". All spiB.* devices share one 181 physical SPI bus segment, with SCLK, MOSI, and MISO. 182 183 /sys/devices/.../CTLR/slave ... virtual file for (un)registering the 184 slave device for an SPI slave controller. 185 Writing the driver name of an SPI slave handler to this file 186 registers the slave device; writing "(null)" unregisters the slave 187 device. 188 Reading from this file shows the name of the slave device ("(null)" 189 if not registered). 190 191 /sys/class/spi_slave/spiB ... symlink (or actual device node) to 192 a logical node which could hold class related state for the SPI 193 slave controller on bus "B". When registered, a single spiB.* 194 device is present here, possible sharing the physical SPI bus 195 segment with other SPI slave devices. 196 197Note that the actual location of the controller's class state depends 198on whether you enabled CONFIG_SYSFS_DEPRECATED or not. At this time, 199the only class-specific state is the bus number ("B" in "spiB"), so 200those /sys/class entries are only useful to quickly identify busses. 201 202 203How does board-specific init code declare SPI devices? 204------------------------------------------------------ 205Linux needs several kinds of information to properly configure SPI devices. 206That information is normally provided by board-specific code, even for 207chips that do support some of automated discovery/enumeration. 208 209DECLARE CONTROLLERS 210 211The first kind of information is a list of what SPI controllers exist. 212For System-on-Chip (SOC) based boards, these will usually be platform 213devices, and the controller may need some platform_data in order to 214operate properly. The "struct platform_device" will include resources 215like the physical address of the controller's first register and its IRQ. 216 217Platforms will often abstract the "register SPI controller" operation, 218maybe coupling it with code to initialize pin configurations, so that 219the arch/.../mach-*/board-*.c files for several boards can all share the 220same basic controller setup code. This is because most SOCs have several 221SPI-capable controllers, and only the ones actually usable on a given 222board should normally be set up and registered. 223 224So for example arch/.../mach-*/board-*.c files might have code like: 225 226 #include <mach/spi.h> /* for mysoc_spi_data */ 227 228 /* if your mach-* infrastructure doesn't support kernels that can 229 * run on multiple boards, pdata wouldn't benefit from "__init". 230 */ 231 static struct mysoc_spi_data pdata __initdata = { ... }; 232 233 static __init board_init(void) 234 { 235 ... 236 /* this board only uses SPI controller #2 */ 237 mysoc_register_spi(2, &pdata); 238 ... 239 } 240 241And SOC-specific utility code might look something like: 242 243 #include <mach/spi.h> 244 245 static struct platform_device spi2 = { ... }; 246 247 void mysoc_register_spi(unsigned n, struct mysoc_spi_data *pdata) 248 { 249 struct mysoc_spi_data *pdata2; 250 251 pdata2 = kmalloc(sizeof *pdata2, GFP_KERNEL); 252 *pdata2 = pdata; 253 ... 254 if (n == 2) { 255 spi2->dev.platform_data = pdata2; 256 register_platform_device(&spi2); 257 258 /* also: set up pin modes so the spi2 signals are 259 * visible on the relevant pins ... bootloaders on 260 * production boards may already have done this, but 261 * developer boards will often need Linux to do it. 262 */ 263 } 264 ... 265 } 266 267Notice how the platform_data for boards may be different, even if the 268same SOC controller is used. For example, on one board SPI might use 269an external clock, where another derives the SPI clock from current 270settings of some master clock. 271 272 273DECLARE SLAVE DEVICES 274 275The second kind of information is a list of what SPI slave devices exist 276on the target board, often with some board-specific data needed for the 277driver to work correctly. 278 279Normally your arch/.../mach-*/board-*.c files would provide a small table 280listing the SPI devices on each board. (This would typically be only a 281small handful.) That might look like: 282 283 static struct ads7846_platform_data ads_info = { 284 .vref_delay_usecs = 100, 285 .x_plate_ohms = 580, 286 .y_plate_ohms = 410, 287 }; 288 289 static struct spi_board_info spi_board_info[] __initdata = { 290 { 291 .modalias = "ads7846", 292 .platform_data = &ads_info, 293 .mode = SPI_MODE_0, 294 .irq = GPIO_IRQ(31), 295 .max_speed_hz = 120000 /* max sample rate at 3V */ * 16, 296 .bus_num = 1, 297 .chip_select = 0, 298 }, 299 }; 300 301Again, notice how board-specific information is provided; each chip may need 302several types. This example shows generic constraints like the fastest SPI 303clock to allow (a function of board voltage in this case) or how an IRQ pin 304is wired, plus chip-specific constraints like an important delay that's 305changed by the capacitance at one pin. 306 307(There's also "controller_data", information that may be useful to the 308controller driver. An example would be peripheral-specific DMA tuning 309data or chipselect callbacks. This is stored in spi_device later.) 310 311The board_info should provide enough information to let the system work 312without the chip's driver being loaded. The most troublesome aspect of 313that is likely the SPI_CS_HIGH bit in the spi_device.mode field, since 314sharing a bus with a device that interprets chipselect "backwards" is 315not possible until the infrastructure knows how to deselect it. 316 317Then your board initialization code would register that table with the SPI 318infrastructure, so that it's available later when the SPI master controller 319driver is registered: 320 321 spi_register_board_info(spi_board_info, ARRAY_SIZE(spi_board_info)); 322 323Like with other static board-specific setup, you won't unregister those. 324 325The widely used "card" style computers bundle memory, cpu, and little else 326onto a card that's maybe just thirty square centimeters. On such systems, 327your arch/.../mach-.../board-*.c file would primarily provide information 328about the devices on the mainboard into which such a card is plugged. That 329certainly includes SPI devices hooked up through the card connectors! 330 331 332NON-STATIC CONFIGURATIONS 333 334Developer boards often play by different rules than product boards, and one 335example is the potential need to hotplug SPI devices and/or controllers. 336 337For those cases you might need to use spi_busnum_to_master() to look 338up the spi bus master, and will likely need spi_new_device() to provide the 339board info based on the board that was hotplugged. Of course, you'd later 340call at least spi_unregister_device() when that board is removed. 341 342When Linux includes support for MMC/SD/SDIO/DataFlash cards through SPI, those 343configurations will also be dynamic. Fortunately, such devices all support 344basic device identification probes, so they should hotplug normally. 345 346 347How do I write an "SPI Protocol Driver"? 348---------------------------------------- 349Most SPI drivers are currently kernel drivers, but there's also support 350for userspace drivers. Here we talk only about kernel drivers. 351 352SPI protocol drivers somewhat resemble platform device drivers: 353 354 static struct spi_driver CHIP_driver = { 355 .driver = { 356 .name = "CHIP", 357 .owner = THIS_MODULE, 358 .pm = &CHIP_pm_ops, 359 }, 360 361 .probe = CHIP_probe, 362 .remove = CHIP_remove, 363 }; 364 365The driver core will automatically attempt to bind this driver to any SPI 366device whose board_info gave a modalias of "CHIP". Your probe() code 367might look like this unless you're creating a device which is managing 368a bus (appearing under /sys/class/spi_master). 369 370 static int CHIP_probe(struct spi_device *spi) 371 { 372 struct CHIP *chip; 373 struct CHIP_platform_data *pdata; 374 375 /* assuming the driver requires board-specific data: */ 376 pdata = &spi->dev.platform_data; 377 if (!pdata) 378 return -ENODEV; 379 380 /* get memory for driver's per-chip state */ 381 chip = kzalloc(sizeof *chip, GFP_KERNEL); 382 if (!chip) 383 return -ENOMEM; 384 spi_set_drvdata(spi, chip); 385 386 ... etc 387 return 0; 388 } 389 390As soon as it enters probe(), the driver may issue I/O requests to 391the SPI device using "struct spi_message". When remove() returns, 392or after probe() fails, the driver guarantees that it won't submit 393any more such messages. 394 395 - An spi_message is a sequence of protocol operations, executed 396 as one atomic sequence. SPI driver controls include: 397 398 + when bidirectional reads and writes start ... by how its 399 sequence of spi_transfer requests is arranged; 400 401 + which I/O buffers are used ... each spi_transfer wraps a 402 buffer for each transfer direction, supporting full duplex 403 (two pointers, maybe the same one in both cases) and half 404 duplex (one pointer is NULL) transfers; 405 406 + optionally defining short delays after transfers ... using 407 the spi_transfer.delay_usecs setting (this delay can be the 408 only protocol effect, if the buffer length is zero); 409 410 + whether the chipselect becomes inactive after a transfer and 411 any delay ... by using the spi_transfer.cs_change flag; 412 413 + hinting whether the next message is likely to go to this same 414 device ... using the spi_transfer.cs_change flag on the last 415 transfer in that atomic group, and potentially saving costs 416 for chip deselect and select operations. 417 418 - Follow standard kernel rules, and provide DMA-safe buffers in 419 your messages. That way controller drivers using DMA aren't forced 420 to make extra copies unless the hardware requires it (e.g. working 421 around hardware errata that force the use of bounce buffering). 422 423 If standard dma_map_single() handling of these buffers is inappropriate, 424 you can use spi_message.is_dma_mapped to tell the controller driver 425 that you've already provided the relevant DMA addresses. 426 427 - The basic I/O primitive is spi_async(). Async requests may be 428 issued in any context (irq handler, task, etc) and completion 429 is reported using a callback provided with the message. 430 After any detected error, the chip is deselected and processing 431 of that spi_message is aborted. 432 433 - There are also synchronous wrappers like spi_sync(), and wrappers 434 like spi_read(), spi_write(), and spi_write_then_read(). These 435 may be issued only in contexts that may sleep, and they're all 436 clean (and small, and "optional") layers over spi_async(). 437 438 - The spi_write_then_read() call, and convenience wrappers around 439 it, should only be used with small amounts of data where the 440 cost of an extra copy may be ignored. It's designed to support 441 common RPC-style requests, such as writing an eight bit command 442 and reading a sixteen bit response -- spi_w8r16() being one its 443 wrappers, doing exactly that. 444 445Some drivers may need to modify spi_device characteristics like the 446transfer mode, wordsize, or clock rate. This is done with spi_setup(), 447which would normally be called from probe() before the first I/O is 448done to the device. However, that can also be called at any time 449that no message is pending for that device. 450 451While "spi_device" would be the bottom boundary of the driver, the 452upper boundaries might include sysfs (especially for sensor readings), 453the input layer, ALSA, networking, MTD, the character device framework, 454or other Linux subsystems. 455 456Note that there are two types of memory your driver must manage as part 457of interacting with SPI devices. 458 459 - I/O buffers use the usual Linux rules, and must be DMA-safe. 460 You'd normally allocate them from the heap or free page pool. 461 Don't use the stack, or anything that's declared "static". 462 463 - The spi_message and spi_transfer metadata used to glue those 464 I/O buffers into a group of protocol transactions. These can 465 be allocated anywhere it's convenient, including as part of 466 other allocate-once driver data structures. Zero-init these. 467 468If you like, spi_message_alloc() and spi_message_free() convenience 469routines are available to allocate and zero-initialize an spi_message 470with several transfers. 471 472 473How do I write an "SPI Master Controller Driver"? 474------------------------------------------------- 475An SPI controller will probably be registered on the platform_bus; write 476a driver to bind to the device, whichever bus is involved. 477 478The main task of this type of driver is to provide an "spi_master". 479Use spi_alloc_master() to allocate the master, and spi_master_get_devdata() 480to get the driver-private data allocated for that device. 481 482 struct spi_master *master; 483 struct CONTROLLER *c; 484 485 master = spi_alloc_master(dev, sizeof *c); 486 if (!master) 487 return -ENODEV; 488 489 c = spi_master_get_devdata(master); 490 491The driver will initialize the fields of that spi_master, including the 492bus number (maybe the same as the platform device ID) and three methods 493used to interact with the SPI core and SPI protocol drivers. It will 494also initialize its own internal state. (See below about bus numbering 495and those methods.) 496 497After you initialize the spi_master, then use spi_register_master() to 498publish it to the rest of the system. At that time, device nodes for the 499controller and any predeclared spi devices will be made available, and 500the driver model core will take care of binding them to drivers. 501 502If you need to remove your SPI controller driver, spi_unregister_master() 503will reverse the effect of spi_register_master(). 504 505 506BUS NUMBERING 507 508Bus numbering is important, since that's how Linux identifies a given 509SPI bus (shared SCK, MOSI, MISO). Valid bus numbers start at zero. On 510SOC systems, the bus numbers should match the numbers defined by the chip 511manufacturer. For example, hardware controller SPI2 would be bus number 2, 512and spi_board_info for devices connected to it would use that number. 513 514If you don't have such hardware-assigned bus number, and for some reason 515you can't just assign them, then provide a negative bus number. That will 516then be replaced by a dynamically assigned number. You'd then need to treat 517this as a non-static configuration (see above). 518 519 520SPI MASTER METHODS 521 522 master->setup(struct spi_device *spi) 523 This sets up the device clock rate, SPI mode, and word sizes. 524 Drivers may change the defaults provided by board_info, and then 525 call spi_setup(spi) to invoke this routine. It may sleep. 526 527 Unless each SPI slave has its own configuration registers, don't 528 change them right away ... otherwise drivers could corrupt I/O 529 that's in progress for other SPI devices. 530 531 ** BUG ALERT: for some reason the first version of 532 ** many spi_master drivers seems to get this wrong. 533 ** When you code setup(), ASSUME that the controller 534 ** is actively processing transfers for another device. 535 536 master->cleanup(struct spi_device *spi) 537 Your controller driver may use spi_device.controller_state to hold 538 state it dynamically associates with that device. If you do that, 539 be sure to provide the cleanup() method to free that state. 540 541 master->prepare_transfer_hardware(struct spi_master *master) 542 This will be called by the queue mechanism to signal to the driver 543 that a message is coming in soon, so the subsystem requests the 544 driver to prepare the transfer hardware by issuing this call. 545 This may sleep. 546 547 master->unprepare_transfer_hardware(struct spi_master *master) 548 This will be called by the queue mechanism to signal to the driver 549 that there are no more messages pending in the queue and it may 550 relax the hardware (e.g. by power management calls). This may sleep. 551 552 master->transfer_one_message(struct spi_master *master, 553 struct spi_message *mesg) 554 The subsystem calls the driver to transfer a single message while 555 queuing transfers that arrive in the meantime. When the driver is 556 finished with this message, it must call 557 spi_finalize_current_message() so the subsystem can issue the next 558 message. This may sleep. 559 560 master->transfer_one(struct spi_master *master, struct spi_device *spi, 561 struct spi_transfer *transfer) 562 The subsystem calls the driver to transfer a single transfer while 563 queuing transfers that arrive in the meantime. When the driver is 564 finished with this transfer, it must call 565 spi_finalize_current_transfer() so the subsystem can issue the next 566 transfer. This may sleep. Note: transfer_one and transfer_one_message 567 are mutually exclusive; when both are set, the generic subsystem does 568 not call your transfer_one callback. 569 570 Return values: 571 negative errno: error 572 0: transfer is finished 573 1: transfer is still in progress 574 575 DEPRECATED METHODS 576 577 master->transfer(struct spi_device *spi, struct spi_message *message) 578 This must not sleep. Its responsibility is to arrange that the 579 transfer happens and its complete() callback is issued. The two 580 will normally happen later, after other transfers complete, and 581 if the controller is idle it will need to be kickstarted. This 582 method is not used on queued controllers and must be NULL if 583 transfer_one_message() and (un)prepare_transfer_hardware() are 584 implemented. 585 586 587SPI MESSAGE QUEUE 588 589If you are happy with the standard queueing mechanism provided by the 590SPI subsystem, just implement the queued methods specified above. Using 591the message queue has the upside of centralizing a lot of code and 592providing pure process-context execution of methods. The message queue 593can also be elevated to realtime priority on high-priority SPI traffic. 594 595Unless the queueing mechanism in the SPI subsystem is selected, the bulk 596of the driver will be managing the I/O queue fed by the now deprecated 597function transfer(). 598 599That queue could be purely conceptual. For example, a driver used only 600for low-frequency sensor access might be fine using synchronous PIO. 601 602But the queue will probably be very real, using message->queue, PIO, 603often DMA (especially if the root filesystem is in SPI flash), and 604execution contexts like IRQ handlers, tasklets, or workqueues (such 605as keventd). Your driver can be as fancy, or as simple, as you need. 606Such a transfer() method would normally just add the message to a 607queue, and then start some asynchronous transfer engine (unless it's 608already running). 609 610 611THANKS TO 612--------- 613Contributors to Linux-SPI discussions include (in alphabetical order, 614by last name): 615 616Mark Brown 617David Brownell 618Russell King 619Grant Likely 620Dmitry Pervushin 621Stephen Street 622Mark Underwood 623Andrew Victor 624Linus Walleij 625Vitaly Wool 626