1===========================
2 drm/i915 Intel GFX Driver
3===========================
4
5The drm/i915 driver supports all (with the exception of some very early
6models) integrated GFX chipsets with both Intel display and rendering
7blocks. This excludes a set of SoC platforms with an SGX rendering unit,
8those have basic support through the gma500 drm driver.
9
10Core Driver Infrastructure
11==========================
12
13This section covers core driver infrastructure used by both the display
14and the GEM parts of the driver.
15
16Runtime Power Management
17------------------------
18
19.. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
20   :doc: runtime pm
21
22.. kernel-doc:: drivers/gpu/drm/i915/intel_runtime_pm.c
23   :internal:
24
25.. kernel-doc:: drivers/gpu/drm/i915/intel_uncore.c
26   :internal:
27
28Interrupt Handling
29------------------
30
31.. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
32   :doc: interrupt handling
33
34.. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
35   :functions: intel_irq_init intel_irq_init_hw intel_hpd_init
36
37.. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
38   :functions: intel_runtime_pm_disable_interrupts
39
40.. kernel-doc:: drivers/gpu/drm/i915/i915_irq.c
41   :functions: intel_runtime_pm_enable_interrupts
42
43Intel GVT-g Guest Support(vGPU)
44-------------------------------
45
46.. kernel-doc:: drivers/gpu/drm/i915/i915_vgpu.c
47   :doc: Intel GVT-g guest support
48
49.. kernel-doc:: drivers/gpu/drm/i915/i915_vgpu.c
50   :internal:
51
52Intel GVT-g Host Support(vGPU device model)
53-------------------------------------------
54
55.. kernel-doc:: drivers/gpu/drm/i915/intel_gvt.c
56   :doc: Intel GVT-g host support
57
58.. kernel-doc:: drivers/gpu/drm/i915/intel_gvt.c
59   :internal:
60
61Workarounds
62-----------
63
64.. kernel-doc:: drivers/gpu/drm/i915/intel_workarounds.c
65   :doc: Hardware workarounds
66
67Display Hardware Handling
68=========================
69
70This section covers everything related to the display hardware including
71the mode setting infrastructure, plane, sprite and cursor handling and
72display, output probing and related topics.
73
74Mode Setting Infrastructure
75---------------------------
76
77The i915 driver is thus far the only DRM driver which doesn't use the
78common DRM helper code to implement mode setting sequences. Thus it has
79its own tailor-made infrastructure for executing a display configuration
80change.
81
82Frontbuffer Tracking
83--------------------
84
85.. kernel-doc:: drivers/gpu/drm/i915/intel_frontbuffer.c
86   :doc: frontbuffer tracking
87
88.. kernel-doc:: drivers/gpu/drm/i915/intel_frontbuffer.h
89   :internal:
90
91.. kernel-doc:: drivers/gpu/drm/i915/intel_frontbuffer.c
92   :internal:
93
94.. kernel-doc:: drivers/gpu/drm/i915/i915_gem.c
95   :functions: i915_gem_track_fb
96
97Display FIFO Underrun Reporting
98-------------------------------
99
100.. kernel-doc:: drivers/gpu/drm/i915/intel_fifo_underrun.c
101   :doc: fifo underrun handling
102
103.. kernel-doc:: drivers/gpu/drm/i915/intel_fifo_underrun.c
104   :internal:
105
106Plane Configuration
107-------------------
108
109This section covers plane configuration and composition with the primary
110plane, sprites, cursors and overlays. This includes the infrastructure
111to do atomic vsync'ed updates of all this state and also tightly coupled
112topics like watermark setup and computation, framebuffer compression and
113panel self refresh.
114
115Atomic Plane Helpers
116--------------------
117
118.. kernel-doc:: drivers/gpu/drm/i915/intel_atomic_plane.c
119   :doc: atomic plane helpers
120
121.. kernel-doc:: drivers/gpu/drm/i915/intel_atomic_plane.c
122   :internal:
123
124Output Probing
125--------------
126
127This section covers output probing and related infrastructure like the
128hotplug interrupt storm detection and mitigation code. Note that the
129i915 driver still uses most of the common DRM helper code for output
130probing, so those sections fully apply.
131
132Hotplug
133-------
134
135.. kernel-doc:: drivers/gpu/drm/i915/intel_hotplug.c
136   :doc: Hotplug
137
138.. kernel-doc:: drivers/gpu/drm/i915/intel_hotplug.c
139   :internal:
140
141High Definition Audio
142---------------------
143
144.. kernel-doc:: drivers/gpu/drm/i915/intel_audio.c
145   :doc: High Definition Audio over HDMI and Display Port
146
147.. kernel-doc:: drivers/gpu/drm/i915/intel_audio.c
148   :internal:
149
150.. kernel-doc:: include/drm/i915_component.h
151   :internal:
152
153Intel HDMI LPE Audio Support
154----------------------------
155
156.. kernel-doc:: drivers/gpu/drm/i915/intel_lpe_audio.c
157   :doc: LPE Audio integration for HDMI or DP playback
158
159.. kernel-doc:: drivers/gpu/drm/i915/intel_lpe_audio.c
160   :internal:
161
162Panel Self Refresh PSR (PSR/SRD)
163--------------------------------
164
165.. kernel-doc:: drivers/gpu/drm/i915/intel_psr.c
166   :doc: Panel Self Refresh (PSR/SRD)
167
168.. kernel-doc:: drivers/gpu/drm/i915/intel_psr.c
169   :internal:
170
171Frame Buffer Compression (FBC)
172------------------------------
173
174.. kernel-doc:: drivers/gpu/drm/i915/intel_fbc.c
175   :doc: Frame Buffer Compression (FBC)
176
177.. kernel-doc:: drivers/gpu/drm/i915/intel_fbc.c
178   :internal:
179
180Display Refresh Rate Switching (DRRS)
181-------------------------------------
182
183.. kernel-doc:: drivers/gpu/drm/i915/intel_dp.c
184   :doc: Display Refresh Rate Switching (DRRS)
185
186.. kernel-doc:: drivers/gpu/drm/i915/intel_dp.c
187   :functions: intel_dp_set_drrs_state
188
189.. kernel-doc:: drivers/gpu/drm/i915/intel_dp.c
190   :functions: intel_edp_drrs_enable
191
192.. kernel-doc:: drivers/gpu/drm/i915/intel_dp.c
193   :functions: intel_edp_drrs_disable
194
195.. kernel-doc:: drivers/gpu/drm/i915/intel_dp.c
196   :functions: intel_edp_drrs_invalidate
197
198.. kernel-doc:: drivers/gpu/drm/i915/intel_dp.c
199   :functions: intel_edp_drrs_flush
200
201.. kernel-doc:: drivers/gpu/drm/i915/intel_dp.c
202   :functions: intel_dp_drrs_init
203
204DPIO
205----
206
207.. kernel-doc:: drivers/gpu/drm/i915/intel_dpio_phy.c
208   :doc: DPIO
209
210CSR firmware support for DMC
211----------------------------
212
213.. kernel-doc:: drivers/gpu/drm/i915/intel_csr.c
214   :doc: csr support for dmc
215
216.. kernel-doc:: drivers/gpu/drm/i915/intel_csr.c
217   :internal:
218
219Video BIOS Table (VBT)
220----------------------
221
222.. kernel-doc:: drivers/gpu/drm/i915/intel_bios.c
223   :doc: Video BIOS Table (VBT)
224
225.. kernel-doc:: drivers/gpu/drm/i915/intel_bios.c
226   :internal:
227
228.. kernel-doc:: drivers/gpu/drm/i915/intel_vbt_defs.h
229   :internal:
230
231Display clocks
232--------------
233
234.. kernel-doc:: drivers/gpu/drm/i915/intel_cdclk.c
235   :doc: CDCLK / RAWCLK
236
237.. kernel-doc:: drivers/gpu/drm/i915/intel_cdclk.c
238   :internal:
239
240Display PLLs
241------------
242
243.. kernel-doc:: drivers/gpu/drm/i915/intel_dpll_mgr.c
244   :doc: Display PLLs
245
246.. kernel-doc:: drivers/gpu/drm/i915/intel_dpll_mgr.c
247   :internal:
248
249.. kernel-doc:: drivers/gpu/drm/i915/intel_dpll_mgr.h
250   :internal:
251
252Memory Management and Command Submission
253========================================
254
255This sections covers all things related to the GEM implementation in the
256i915 driver.
257
258Intel GPU Basics
259----------------
260
261An Intel GPU has multiple engines. There are several engine types.
262
263- RCS engine is for rendering 3D and performing compute, this is named
264  `I915_EXEC_RENDER` in user space.
265- BCS is a blitting (copy) engine, this is named `I915_EXEC_BLT` in user
266  space.
267- VCS is a video encode and decode engine, this is named `I915_EXEC_BSD`
268  in user space
269- VECS is video enhancement engine, this is named `I915_EXEC_VEBOX` in user
270  space.
271- The enumeration `I915_EXEC_DEFAULT` does not refer to specific engine;
272  instead it is to be used by user space to specify a default rendering
273  engine (for 3D) that may or may not be the same as RCS.
274
275The Intel GPU family is a family of integrated GPU's using Unified
276Memory Access. For having the GPU "do work", user space will feed the
277GPU batch buffers via one of the ioctls `DRM_IOCTL_I915_GEM_EXECBUFFER2`
278or `DRM_IOCTL_I915_GEM_EXECBUFFER2_WR`. Most such batchbuffers will
279instruct the GPU to perform work (for example rendering) and that work
280needs memory from which to read and memory to which to write. All memory
281is encapsulated within GEM buffer objects (usually created with the ioctl
282`DRM_IOCTL_I915_GEM_CREATE`). An ioctl providing a batchbuffer for the GPU
283to create will also list all GEM buffer objects that the batchbuffer reads
284and/or writes. For implementation details of memory management see
285`GEM BO Management Implementation Details`_.
286
287The i915 driver allows user space to create a context via the ioctl
288`DRM_IOCTL_I915_GEM_CONTEXT_CREATE` which is identified by a 32-bit
289integer. Such a context should be viewed by user-space as -loosely-
290analogous to the idea of a CPU process of an operating system. The i915
291driver guarantees that commands issued to a fixed context are to be
292executed so that writes of a previously issued command are seen by
293reads of following commands. Actions issued between different contexts
294(even if from the same file descriptor) are NOT given that guarantee
295and the only way to synchronize across contexts (even from the same
296file descriptor) is through the use of fences. At least as far back as
297Gen4, also have that a context carries with it a GPU HW context;
298the HW context is essentially (most of atleast) the state of a GPU.
299In addition to the ordering guarantees, the kernel will restore GPU
300state via HW context when commands are issued to a context, this saves
301user space the need to restore (most of atleast) the GPU state at the
302start of each batchbuffer. The non-deprecated ioctls to submit batchbuffer
303work can pass that ID (in the lower bits of drm_i915_gem_execbuffer2::rsvd1)
304to identify what context to use with the command.
305
306The GPU has its own memory management and address space. The kernel
307driver maintains the memory translation table for the GPU. For older
308GPUs (i.e. those before Gen8), there is a single global such translation
309table, a global Graphics Translation Table (GTT). For newer generation
310GPUs each context has its own translation table, called Per-Process
311Graphics Translation Table (PPGTT). Of important note, is that although
312PPGTT is named per-process it is actually per context. When user space
313submits a batchbuffer, the kernel walks the list of GEM buffer objects
314used by the batchbuffer and guarantees that not only is the memory of
315each such GEM buffer object resident but it is also present in the
316(PP)GTT. If the GEM buffer object is not yet placed in the (PP)GTT,
317then it is given an address. Two consequences of this are: the kernel
318needs to edit the batchbuffer submitted to write the correct value of
319the GPU address when a GEM BO is assigned a GPU address and the kernel
320might evict a different GEM BO from the (PP)GTT to make address room
321for another GEM BO. Consequently, the ioctls submitting a batchbuffer
322for execution also include a list of all locations within buffers that
323refer to GPU-addresses so that the kernel can edit the buffer correctly.
324This process is dubbed relocation.
325
326GEM BO Management Implementation Details
327----------------------------------------
328
329.. kernel-doc:: drivers/gpu/drm/i915/i915_vma.h
330   :doc: Virtual Memory Address
331
332Buffer Object Eviction
333----------------------
334
335This section documents the interface functions for evicting buffer
336objects to make space available in the virtual gpu address spaces. Note
337that this is mostly orthogonal to shrinking buffer objects caches, which
338has the goal to make main memory (shared with the gpu through the
339unified memory architecture) available.
340
341.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_evict.c
342   :internal:
343
344Buffer Object Memory Shrinking
345------------------------------
346
347This section documents the interface function for shrinking memory usage
348of buffer object caches. Shrinking is used to make main memory
349available. Note that this is mostly orthogonal to evicting buffer
350objects, which has the goal to make space in gpu virtual address spaces.
351
352.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_shrinker.c
353   :internal:
354
355Batchbuffer Parsing
356-------------------
357
358.. kernel-doc:: drivers/gpu/drm/i915/i915_cmd_parser.c
359   :doc: batch buffer command parser
360
361.. kernel-doc:: drivers/gpu/drm/i915/i915_cmd_parser.c
362   :internal:
363
364Batchbuffer Pools
365-----------------
366
367.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_batch_pool.c
368   :doc: batch pool
369
370.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_batch_pool.c
371   :internal:
372
373User Batchbuffer Execution
374--------------------------
375
376.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_execbuffer.c
377   :doc: User command execution
378
379Logical Rings, Logical Ring Contexts and Execlists
380--------------------------------------------------
381
382.. kernel-doc:: drivers/gpu/drm/i915/intel_lrc.c
383   :doc: Logical Rings, Logical Ring Contexts and Execlists
384
385.. kernel-doc:: drivers/gpu/drm/i915/intel_lrc.c
386   :internal:
387
388Global GTT views
389----------------
390
391.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_gtt.c
392   :doc: Global GTT views
393
394.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_gtt.c
395   :internal:
396
397GTT Fences and Swizzling
398------------------------
399
400.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_fence_reg.c
401   :internal:
402
403Global GTT Fence Handling
404~~~~~~~~~~~~~~~~~~~~~~~~~
405
406.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_fence_reg.c
407   :doc: fence register handling
408
409Hardware Tiling and Swizzling Details
410~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
411
412.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_fence_reg.c
413   :doc: tiling swizzling details
414
415Object Tiling IOCTLs
416--------------------
417
418.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_tiling.c
419   :internal:
420
421.. kernel-doc:: drivers/gpu/drm/i915/i915_gem_tiling.c
422   :doc: buffer object tiling
423
424WOPCM
425=====
426
427WOPCM Layout
428------------
429
430.. kernel-doc:: drivers/gpu/drm/i915/intel_wopcm.c
431   :doc: WOPCM Layout
432
433GuC
434===
435
436GuC-specific firmware loader
437----------------------------
438
439.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_fw.c
440   :internal:
441
442GuC-based command submission
443----------------------------
444
445.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_submission.c
446   :doc: GuC-based command submission
447
448.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_submission.c
449   :internal:
450
451GuC Firmware Layout
452-------------------
453
454.. kernel-doc:: drivers/gpu/drm/i915/intel_guc_fwif.h
455   :doc: GuC Firmware Layout
456
457GuC Address Space
458-----------------
459
460.. kernel-doc:: drivers/gpu/drm/i915/intel_guc.c
461   :doc: GuC Address Space
462
463Tracing
464=======
465
466This sections covers all things related to the tracepoints implemented
467in the i915 driver.
468
469i915_ppgtt_create and i915_ppgtt_release
470----------------------------------------
471
472.. kernel-doc:: drivers/gpu/drm/i915/i915_trace.h
473   :doc: i915_ppgtt_create and i915_ppgtt_release tracepoints
474
475i915_context_create and i915_context_free
476-----------------------------------------
477
478.. kernel-doc:: drivers/gpu/drm/i915/i915_trace.h
479   :doc: i915_context_create and i915_context_free tracepoints
480
481switch_mm
482---------
483
484.. kernel-doc:: drivers/gpu/drm/i915/i915_trace.h
485   :doc: switch_mm tracepoint
486
487Perf
488====
489
490Overview
491--------
492.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
493   :doc: i915 Perf Overview
494
495Comparison with Core Perf
496-------------------------
497.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
498   :doc: i915 Perf History and Comparison with Core Perf
499
500i915 Driver Entry Points
501------------------------
502
503This section covers the entrypoints exported outside of i915_perf.c to
504integrate with drm/i915 and to handle the `DRM_I915_PERF_OPEN` ioctl.
505
506.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
507   :functions: i915_perf_init
508.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
509   :functions: i915_perf_fini
510.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
511   :functions: i915_perf_register
512.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
513   :functions: i915_perf_unregister
514.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
515   :functions: i915_perf_open_ioctl
516.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
517   :functions: i915_perf_release
518.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
519   :functions: i915_perf_add_config_ioctl
520.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
521   :functions: i915_perf_remove_config_ioctl
522
523i915 Perf Stream
524----------------
525
526This section covers the stream-semantics-agnostic structures and functions
527for representing an i915 perf stream FD and associated file operations.
528
529.. kernel-doc:: drivers/gpu/drm/i915/i915_drv.h
530   :functions: i915_perf_stream
531.. kernel-doc:: drivers/gpu/drm/i915/i915_drv.h
532   :functions: i915_perf_stream_ops
533
534.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
535   :functions: read_properties_unlocked
536.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
537   :functions: i915_perf_open_ioctl_locked
538.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
539   :functions: i915_perf_destroy_locked
540.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
541   :functions: i915_perf_read
542.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
543   :functions: i915_perf_ioctl
544.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
545   :functions: i915_perf_enable_locked
546.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
547   :functions: i915_perf_disable_locked
548.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
549   :functions: i915_perf_poll
550.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
551   :functions: i915_perf_poll_locked
552
553i915 Perf Observation Architecture Stream
554-----------------------------------------
555
556.. kernel-doc:: drivers/gpu/drm/i915/i915_drv.h
557   :functions: i915_oa_ops
558
559.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
560   :functions: i915_oa_stream_init
561.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
562   :functions: i915_oa_read
563.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
564   :functions: i915_oa_stream_enable
565.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
566   :functions: i915_oa_stream_disable
567.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
568   :functions: i915_oa_wait_unlocked
569.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
570   :functions: i915_oa_poll_wait
571
572All i915 Perf Internals
573-----------------------
574
575This section simply includes all currently documented i915 perf internals, in
576no particular order, but may include some more minor utilities or platform
577specific details than found in the more high-level sections.
578
579.. kernel-doc:: drivers/gpu/drm/i915/i915_perf.c
580   :internal:
581
582Style
583=====
584
585The drm/i915 driver codebase has some style rules in addition to (and, in some
586cases, deviating from) the kernel coding style.
587
588Register macro definition style
589-------------------------------
590
591The style guide for ``i915_reg.h``.
592
593.. kernel-doc:: drivers/gpu/drm/i915/i915_reg.h
594   :doc: The i915 register macro definition style guide
595