1* Freescale Fast Ethernet Controller (FEC)
2
3Required properties:
4- compatible : Should be "fsl,<soc>-fec"
5- reg : Address and length of the register set for the device
6- interrupts : Should contain fec interrupt
7- phy-mode : See ethernet.txt file in the same directory
8
9Optional properties:
10- phy-supply : regulator that powers the Ethernet PHY.
11- phy-handle : phandle to the PHY device connected to this device.
12- fixed-link : Assume a fixed link. See fixed-link.txt in the same directory.
13  Use instead of phy-handle.
14- fsl,num-tx-queues : The property is valid for enet-avb IP, which supports
15  hw multi queues. Should specify the tx queue number, otherwise set tx queue
16  number to 1.
17- fsl,num-rx-queues : The property is valid for enet-avb IP, which supports
18  hw multi queues. Should specify the rx queue number, otherwise set rx queue
19  number to 1.
20- fsl,magic-packet : If present, indicates that the hardware supports waking
21  up via magic packet.
22- fsl,err006687-workaround-present: If present indicates that the system has
23  the hardware workaround for ERR006687 applied and does not need a software
24  workaround.
25 -interrupt-names:  names of the interrupts listed in interrupts property in
26  the same order. The defaults if not specified are
27  __Number of interrupts__   __Default__
28	1			"int0"
29	2			"int0", "pps"
30	3			"int0", "int1", "int2"
31	4			"int0", "int1", "int2", "pps"
32  The order may be changed as long as they correspond to the interrupts
33  property. Currently, only i.mx7 uses "int1" and "int2". They correspond to
34  tx/rx queues 1 and 2. "int0" will be used for queue 0 and ENET_MII interrupts.
35  For imx6sx, "int0" handles all 3 queues and ENET_MII. "pps" is for the pulse
36  per second interrupt associated with 1588 precision time protocol(PTP).
37
38Optional subnodes:
39- mdio : specifies the mdio bus in the FEC, used as a container for phy nodes
40  according to phy.txt in the same directory
41
42Deprecated optional properties:
43	To avoid these, create a phy node according to phy.txt in the same
44	directory, and point the fec's "phy-handle" property to it. Then use
45	the phy's reset binding, again described by phy.txt.
46- phy-reset-gpios : Should specify the gpio for phy reset
47- phy-reset-duration : Reset duration in milliseconds.  Should present
48  only if property "phy-reset-gpios" is available.  Missing the property
49  will have the duration be 1 millisecond.  Numbers greater than 1000 are
50  invalid and 1 millisecond will be used instead.
51- phy-reset-active-high : If present then the reset sequence using the GPIO
52  specified in the "phy-reset-gpios" property is reversed (H=reset state,
53  L=operation state).
54- phy-reset-post-delay : Post reset delay in milliseconds. If present then
55  a delay of phy-reset-post-delay milliseconds will be observed after the
56  phy-reset-gpios has been toggled. Can be omitted thus no delay is
57  observed. Delay is in range of 1ms to 1000ms. Other delays are invalid.
58
59Example:
60
61ethernet@83fec000 {
62	compatible = "fsl,imx51-fec", "fsl,imx27-fec";
63	reg = <0x83fec000 0x4000>;
64	interrupts = <87>;
65	phy-mode = "mii";
66	phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; /* GPIO2_14 */
67	local-mac-address = [00 04 9F 01 1B B9];
68	phy-supply = <&reg_fec_supply>;
69};
70
71Example with phy specified:
72
73ethernet@83fec000 {
74	compatible = "fsl,imx51-fec", "fsl,imx27-fec";
75	reg = <0x83fec000 0x4000>;
76	interrupts = <87>;
77	phy-mode = "mii";
78	phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; /* GPIO2_14 */
79	local-mac-address = [00 04 9F 01 1B B9];
80	phy-supply = <&reg_fec_supply>;
81	phy-handle = <&ethphy>;
82	mdio {
83		ethphy: ethernet-phy@6 {
84			compatible = "ethernet-phy-ieee802.3-c22";
85			reg = <6>;
86			max-speed = <100>;
87		};
88	};
89};
90