1Davinci/Keystone GPIO controller bindings
2
3Required Properties:
4- compatible: should be "ti,dm6441-gpio": for Davinci da850 SoCs
5			"ti,keystone-gpio": for Keystone 2 66AK2H/K, 66AK2L,
6						66AK2E SoCs
7			"ti,k2g-gpio", "ti,keystone-gpio": for 66AK2G
8
9- reg: Physical base address of the controller and the size of memory mapped
10       registers.
11
12- gpio-controller : Marks the device node as a gpio controller.
13
14- #gpio-cells : Should be two.
15  - first cell is the pin number
16  - second cell is used to specify optional parameters (unused)
17
18- interrupts: Array of GPIO interrupt number. Only banked or unbanked IRQs are
19	      supported at a time.
20
21- ti,ngpio: The number of GPIO pins supported.
22
23- ti,davinci-gpio-unbanked: The number of GPIOs that have an individual interrupt
24		            line to processor.
25
26- clocks: Should contain the device's input clock, and should be defined as per
27          the appropriate clock bindings consumer usage in,
28
29          Documentation/devicetree/bindings/clock/keystone-gate.txt
30                            for 66AK2HK/66AK2L/66AK2E SoCs or,
31
32          Documentation/devicetree/bindings/clock/ti,sci-clk.txt
33                            for 66AK2G SoCs
34
35- clock-names: Name should be "gpio";
36
37Currently clock-names and clocks are needed for all keystone 2 platforms
38Davinci platforms do not have DT clocks as of now.
39
40The GPIO controller also acts as an interrupt controller. It uses the default
41two cells specifier as described in Documentation/devicetree/bindings/
42interrupt-controller/interrupts.txt.
43
44Example:
45
46gpio: gpio@1e26000 {
47	compatible = "ti,dm6441-gpio";
48	gpio-controller;
49	#gpio-cells = <2>;
50	reg = <0x226000 0x1000>;
51	interrupt-parent = <&intc>;
52	interrupts = <42 IRQ_TYPE_EDGE_BOTH 43 IRQ_TYPE_EDGE_BOTH
53		44 IRQ_TYPE_EDGE_BOTH 45 IRQ_TYPE_EDGE_BOTH
54		46 IRQ_TYPE_EDGE_BOTH 47 IRQ_TYPE_EDGE_BOTH
55		48 IRQ_TYPE_EDGE_BOTH 49 IRQ_TYPE_EDGE_BOTH
56		50 IRQ_TYPE_EDGE_BOTH>;
57	ti,ngpio = <144>;
58	ti,davinci-gpio-unbanked = <0>;
59	interrupt-controller;
60	#interrupt-cells = <2>;
61};
62
63leds {
64	compatible = "gpio-leds";
65
66	led1 {
67		label = "davinci:green:usr1";
68		gpios = <&gpio 10 GPIO_ACTIVE_HIGH>;
69		...
70	};
71
72	led2 {
73		label = "davinci:red:debug1";
74		gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
75		...
76	};
77};
78
79Example for 66AK2G:
80
81gpio0: gpio@2603000 {
82	compatible = "ti,k2g-gpio", "ti,keystone-gpio";
83	reg = <0x02603000 0x100>;
84	gpio-controller;
85	#gpio-cells = <2>;
86	interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>,
87			<GIC_SPI 433 IRQ_TYPE_EDGE_RISING>,
88			<GIC_SPI 434 IRQ_TYPE_EDGE_RISING>,
89			<GIC_SPI 435 IRQ_TYPE_EDGE_RISING>,
90			<GIC_SPI 436 IRQ_TYPE_EDGE_RISING>,
91			<GIC_SPI 437 IRQ_TYPE_EDGE_RISING>,
92			<GIC_SPI 438 IRQ_TYPE_EDGE_RISING>,
93			<GIC_SPI 439 IRQ_TYPE_EDGE_RISING>,
94			<GIC_SPI 440 IRQ_TYPE_EDGE_RISING>;
95	interrupt-controller;
96	#interrupt-cells = <2>;
97	ti,ngpio = <144>;
98	ti,davinci-gpio-unbanked = <0>;
99	clocks = <&k2g_clks 0x001b 0x0>;
100	clock-names = "gpio";
101};
102
103Example for 66AK2HK/66AK2L/66AK2E:
104
105gpio0: gpio@260bf00 {
106	compatible = "ti,keystone-gpio";
107	reg = <0x0260bf00 0x100>;
108	gpio-controller;
109	#gpio-cells = <2>;
110	/* HW Interrupts mapped to GPIO pins */
111	interrupts = <GIC_SPI 120 IRQ_TYPE_EDGE_RISING>,
112			<GIC_SPI 121 IRQ_TYPE_EDGE_RISING>,
113			<GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
114			<GIC_SPI 123 IRQ_TYPE_EDGE_RISING>,
115			<GIC_SPI 124 IRQ_TYPE_EDGE_RISING>,
116			<GIC_SPI 125 IRQ_TYPE_EDGE_RISING>,
117			<GIC_SPI 126 IRQ_TYPE_EDGE_RISING>,
118			<GIC_SPI 127 IRQ_TYPE_EDGE_RISING>,
119			<GIC_SPI 128 IRQ_TYPE_EDGE_RISING>,
120			<GIC_SPI 129 IRQ_TYPE_EDGE_RISING>,
121			<GIC_SPI 130 IRQ_TYPE_EDGE_RISING>,
122			<GIC_SPI 131 IRQ_TYPE_EDGE_RISING>,
123			<GIC_SPI 132 IRQ_TYPE_EDGE_RISING>,
124			<GIC_SPI 133 IRQ_TYPE_EDGE_RISING>,
125			<GIC_SPI 134 IRQ_TYPE_EDGE_RISING>,
126			<GIC_SPI 135 IRQ_TYPE_EDGE_RISING>,
127			<GIC_SPI 136 IRQ_TYPE_EDGE_RISING>,
128			<GIC_SPI 137 IRQ_TYPE_EDGE_RISING>,
129			<GIC_SPI 138 IRQ_TYPE_EDGE_RISING>,
130			<GIC_SPI 139 IRQ_TYPE_EDGE_RISING>,
131			<GIC_SPI 140 IRQ_TYPE_EDGE_RISING>,
132			<GIC_SPI 141 IRQ_TYPE_EDGE_RISING>,
133			<GIC_SPI 142 IRQ_TYPE_EDGE_RISING>,
134			<GIC_SPI 143 IRQ_TYPE_EDGE_RISING>,
135			<GIC_SPI 144 IRQ_TYPE_EDGE_RISING>,
136			<GIC_SPI 145 IRQ_TYPE_EDGE_RISING>,
137			<GIC_SPI 146 IRQ_TYPE_EDGE_RISING>,
138			<GIC_SPI 147 IRQ_TYPE_EDGE_RISING>,
139			<GIC_SPI 148 IRQ_TYPE_EDGE_RISING>,
140			<GIC_SPI 149 IRQ_TYPE_EDGE_RISING>,
141			<GIC_SPI 150 IRQ_TYPE_EDGE_RISING>,
142			<GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
143			clocks = <&clkgpio>;
144	clock-names = "gpio";
145	ti,ngpio = <32>;
146	ti,davinci-gpio-unbanked = <32>;
147};
148