1UniPhier outer cache controller
2
3UniPhier SoCs are integrated with a full-custom outer cache controller system.
4All of them have a level 2 cache controller, and some have a level 3 cache
5controller as well.
6
7Required properties:
8- compatible: should be "socionext,uniphier-system-cache"
9- reg: offsets and lengths of the register sets for the device.  It should
10  contain 3 regions: control register, revision register, operation register,
11  in this order.
12- cache-unified: specifies the cache is a unified cache.
13- cache-size: specifies the size in bytes of the cache
14- cache-sets: specifies the number of associativity sets of the cache
15- cache-line-size: specifies the line size in bytes
16- cache-level: specifies the level in the cache hierarchy.  The value should
17  be 2 for L2 cache, 3 for L3 cache, etc.
18
19Optional properties:
20- next-level-cache: phandle to the next level cache if present.  The next level
21  cache should be also compatible with "socionext,uniphier-system-cache".
22
23The L2 cache must exist to use the L3 cache; the cache hierarchy must be
24indicated correctly with "next-level-cache" properties.
25
26Example 1 (system with L2):
27	l2: l2-cache@500c0000 {
28		compatible = "socionext,uniphier-system-cache";
29		reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
30		      <0x506c0000 0x400>;
31		cache-unified;
32		cache-size = <0x80000>;
33		cache-sets = <256>;
34		cache-line-size = <128>;
35		cache-level = <2>;
36	};
37
38Example 2 (system with L2 and L3):
39	l2: l2-cache@500c0000 {
40		compatible = "socionext,uniphier-system-cache";
41		reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
42		      <0x506c0000 0x400>;
43		cache-unified;
44		cache-size = <0x200000>;
45		cache-sets = <512>;
46		cache-line-size = <128>;
47		cache-level = <2>;
48		next-level-cache = <&l3>;
49	};
50
51	l3: l3-cache@500c8000 {
52		compatible = "socionext,uniphier-system-cache";
53		reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
54		      <0x506c8000 0x400>;
55		cache-unified;
56		cache-size = <0x400000>;
57		cache-sets = <512>;
58		cache-line-size = <256>;
59		cache-level = <3>;
60	};
61