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/Linux-v6.1/Documentation/devicetree/bindings/power/reset/
Dxlnx,zynqmp-power.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/xlnx,zynqmp-power.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michal Simek <michal.simek@xilinx.com>
13 The zynqmp-power node describes the power management configurations.
18 const: xlnx,zynqmp-power
25 Standard property to specify a Mailbox. Each value of
27 mailbox controller device node and an args specifier
28 that will be the phandle to the intended sub-mailbox
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/Linux-v6.1/Documentation/devicetree/bindings/mailbox/
Dxlnx,zynqmp-ipi-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/mailbox/xlnx,zynqmp-ipi-mailbox.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Xilinx IPI(Inter Processor Interrupt) mailbox controller
10 The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage
14 +-------------------------------------+
15 | Xilinx ZynqMP IPI Controller |
16 +-------------------------------------+
17 +--------------------------------------------------+
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/Linux-v6.1/drivers/mailbox/
Dzynqmp-ipi-mailbox.c1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx Inter Processor Interrupt(IPI) Mailbox Driver
8 #include <linux/arm-smccc.h>
15 #include <linux/mailbox/zynqmp-ipi-message.h>
26 /* indicate if ZynqMP IPI mailbox driver uses SMC calls or HVC calls */
49 /* IPI mailbox status */
54 #define IPI_MB_CHNL_TX 0 /* IPI mailbox TX channel */
55 #define IPI_MB_CHNL_RX 1 /* IPI mailbox RX channel */
58 * struct zynqmp_ipi_mchan - Description of a Xilinx ZynqMP IPI mailbox channel
78 * struct zynqmp_ipi_mbox - Description of a ZynqMP IPI mailbox
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menuconfig MAILBOX config
3 bool "Mailbox Hardware Support"
5 Mailbox is a framework to control hardware communication between
6 on-chip processors through queued messages and interrupt driven
9 if MAILBOX
12 tristate "Apple Mailbox driver"
16 Apple SoCs have various co-processors required for certain
18 driver adds support for the mailbox controller used to
24 tristate "ARM MHU Mailbox"
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # Generic MAILBOX API
4 obj-$(CONFIG_MAILBOX) += mailbox.o
6 obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
8 obj-$(CONFIG_ARM_MHU) += arm_mhu.o arm_mhu_db.o
10 obj-$(CONFIG_ARM_MHU_V2) += arm_mhuv2.o
12 obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o
14 obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) += armada-37xx-rwtm-mailbox.o
16 obj-$(CONFIG_PLATFORM_MHU) += platform_mhu.o
18 obj-$(CONFIG_PL320_MBOX) += pl320-ipc.o
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/Linux-v6.1/drivers/soc/xilinx/
Dzynqmp_power.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2019 Xilinx, Inc.
18 #include <linux/firmware/xlnx-zynqmp.h>
19 #include <linux/firmware/xlnx-event-manager.h>
20 #include <linux/mailbox/zynqmp-ipi-message.h>
23 * struct zynqmp_pm_work_struct - Wrapper for struct work_struct
46 [PM_SUSPEND_MODE_POWER_OFF] = "power-off",
59 if (work_pending(&zynqmp_pm_init_suspend_work->callback_work)) in suspend_event_callback()
63 memcpy(zynqmp_pm_init_suspend_work->args, &payload[1], in suspend_event_callback()
64 sizeof(zynqmp_pm_init_suspend_work->args)); in suspend_event_callback()
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/Linux-v6.1/arch/arm64/boot/dts/xilinx/
Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * dts file for Xilinx ZynqMP
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/power/xlnx-zynqmp-power.h>
17 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
20 compatible = "xlnx,zynqmp";
21 #address-cells = <2>;
22 #size-cells = <2>;
25 #address-cells = <1>;
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/Linux-v6.1/arch/arm64/
DKconfig.platforms1 # SPDX-License-Identifier: GPL-2.0-only
12 bool "Allwinner sunxi 64-bit SoC Family"
33 This enables support for Apple's in-house ARM SoC family, starting
67 Say Y if you intend to run the kernel on a Broadcom Broadband ARM-based
70 This enables support for Broadcom BCA ARM-based broadband chipsets,
74 bool "Broadcom Set-Top-Box SoCs"
115 This enables support for the Microchip Sparx5 ARMv8-based
116 SoC family of TSN-capable gigabit switches.
118 The SparX-5 Ethernet switch family provides a rich set of
119 switching features such as advanced TCAM-based VLAN and QoS
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/Linux-v6.1/Documentation/devicetree/bindings/media/
Dallegro,al5e.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Tretter <m.tretter@pengutronix.de>
12 description: |-
13 Allegro DVT video IP codecs present in the Xilinx ZynqMP SoC. The IP core may
17 software uses a provided mailbox interface to communicate with the MCU. The
23 - items:
24 - const: allegro,al5e-1.1
25 - const: allegro,al5e
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/Linux-v6.1/drivers/crypto/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
39 called padlock-aes.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
143 and uses triple-DES to generate secure random numbers like the
144 ANSI X9.17 standard. User-space programs access the
145 pseudo-random-number device through the char device /dev/prandom.
161 sub-units. One set provides the Modular Arithmetic Unit,
277 This option provides the kernel-side support for the TRNG hardware
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/Linux-v6.1/drivers/dma/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
111 tristate "Analog Devices AXI-DMAC DMA support"
117 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
124 depends on MAILBOX && RAID6_PQ
153 tristate "SA-11x0 DMA support"
158 Support the DMA engine found on Intel StrongARM SA-1100 and
159 SA-1110 SoCs. This DMA engine can only be used with on-chip
218 This module can be found on Freescale Vybrid and LS-1 SoCs.
261 Enable support for the IMG multi-threaded DMA controller (MDC).
281 tristate "Intel integrated DMA 64-bit support"
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/Linux-v6.1/drivers/gpio/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
57 non-sleeping contexts. They can make bitbanged serial protocols
116 tristate "GPIO driver for 74xx-ICs with MMIO access"
120 Say yes here to support GPIO functionality for 74xx-compatible ICs
136 If driver is built as a module it will be called gpio-altera.
180 the firmware mailbox to communicate with VideoCore on BCM283x chips.
297 tristate "Generic memory-mapped GPIO controller support (MMIO platform device)"
300 Say yes here to support basic platform_device memory-mapped GPIO controllers.
319 This GPIO controller supports double-edge interrupt and multi-core
338 ICH-based chipsets. Currently supported devices: ICH6, ICH7, ICH8
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/Linux-v6.1/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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